[PULL v2 00/32] target-arm queue

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MAINTAINERS                                        |    3 +
docs/conf.py                                       |    4 +-
docs/sphinx/kerneldoc.py                           |    7 +-
docs/system/arm/emulation.rst                      |    4 +
accel/tcg/atomic_template.h                        |   80 +-
accel/tcg/tcg-runtime.h                            |   12 +
bsd-user/aarch64/target_arch_elf.h                 |    2 +-
host/include/aarch64/host/atomic128-cas.h          |   45 -
include/accel/tcg/cpu-ldst-common.h                |   13 +-
include/hw/arm/stm32f205_soc.h                     |    2 +-
include/hw/intc/arm_gicv3_common.h                 |    3 +
include/tcg/tcg-op-common.h                        |    7 +
include/tcg/tcg-op.h                               |    3 +
target/arm/cpu-features.h                          |   24 +-
target/arm/cpu.h                                   |   17 +
target/arm/internals.h                             |   28 +-
tests/qtest/libqtest.h                             |    2 +-
host/include/aarch64/host/atomic128-cas.h.inc      |  102 +
host/include/generic/host/atomic128-cas.h.inc      |   96 +
target/arm/tcg/a64.decode                          |   26 +
hw/arm/boot.c                                      |   42 +
hw/arm/stm32f205_soc.c                             |   10 +-
hw/arm/virt.c                                      |    8 +-
hw/intc/arm_gicv3_kvm.c                            |   15 +
linux-user/aarch64/elfload.c                       |    4 +-
target/arm/cpregs-pmu.c                            |   34 +-
target/arm/cpu.c                                   |    6 +
target/arm/helper.c                                |  168 +-
target/arm/ptw.c                                   |    8 +-
target/arm/tcg/cpu64.c                             |    9 +-
target/arm/tcg/translate-a64.c                     |  195 +-
tcg/tcg-op-ldst.c                                  |   97 +-
accel/tcg/atomic_common.c.inc                      |    9 +
.editorconfig                                      |    2 +-
scripts/kernel-doc                                 | 2442 --------------------
scripts/kernel-doc.py                              |  325 +++
scripts/lib/kdoc/kdoc_files.py                     |  291 +++
scripts/lib/kdoc/kdoc_item.py                      |   42 +
scripts/lib/kdoc/kdoc_output.py                    |  749 ++++++
scripts/lib/kdoc/kdoc_parser.py                    | 1670 +++++++++++++
scripts/lib/kdoc/kdoc_re.py                        |  270 +++
.../functional/aarch64/test_device_passthrough.py  |   27 +-
tests/functional/aarch64/test_rme_sbsaref.py       |   64 +-
tests/functional/aarch64/test_rme_virt.py          |   85 +-
44 files changed, 4389 insertions(+), 2663 deletions(-)
delete mode 100644 host/include/aarch64/host/atomic128-cas.h
create mode 100644 host/include/aarch64/host/atomic128-cas.h.inc
delete mode 100755 scripts/kernel-doc
create mode 100755 scripts/kernel-doc.py
create mode 100644 scripts/lib/kdoc/kdoc_files.py
create mode 100644 scripts/lib/kdoc/kdoc_item.py
create mode 100644 scripts/lib/kdoc/kdoc_output.py
create mode 100644 scripts/lib/kdoc/kdoc_parser.py
create mode 100644 scripts/lib/kdoc/kdoc_re.py
[PULL v2 00/32] target-arm queue
Posted by Peter Maydell 4 weeks ago
v2: handle bsd-user in the rename of isar_feature_aa64_atomics

-- PMM

The following changes since commit 4791f22a5f5571cb248b1eddff98630545b3fd3e:

  Merge tag 'pull-lu-20250830' of https://gitlab.com/rth7680/qemu into staging (2025-08-30 08:24:48 +1000)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20250830

for you to fetch changes up to 2e27650bddd35477d994a795a3b1cb57c8ed5c76:

  hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects (2025-08-30 16:38:47 +0100)

----------------------------------------------------------------
target-arm queue:
 * Implement FEAT_SCTLR2
 * Implement FEAT_TCR2
 * Implement FEAT_CSSC
 * Implement FEAT_LSE128
 * Clean up of register field definitions
 * Trap PMCR when MDCR_EL2.TPMCR is set
 * tests/functional: update aarch64 RME test images
 * hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr
 * hw/arm: add static NVDIMMs in device tree
 * hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
 * scripts/kernel-doc: Avoid new Perl precedence warning
 * scripts/kernel-doc: Update to kernel's new Python implementation

----------------------------------------------------------------
Gustavo Romero (3):
      target/arm: Clean up of register field definitions
      target/arm: Implement FEAT_SCTLR2 and enable with -cpu max
      target/arm: Implement FEAT_TCR2 and enable with -cpu max

Manos Pitsidianakis (1):
      hw/arm: add static NVDIMMs in device tree

Peter Maydell (12):
      target/arm: Implement CTZ, CNT, ABS
      scripts/kernel-doc: Avoid new Perl precedence warning
      docs/sphinx/kerneldoc.py: Handle new LINENO syntax
      tests/qtest/libqtest.h: Remove stray space from doc comment
      scripts: Import Python kerneldoc from Linux kernel
      scripts/kernel-doc: strip QEMU_ from function definitions
      scripts/kernel-doc: tweak for QEMU coding standards
      scripts/kerneldoc: Switch to the Python kernel-doc script
      scripts/kernel-doc: Delete the old Perl kernel-doc script
      MAINTAINERS: Put kernel-doc under the "docs build machinery" section
      target/arm: Correct condition of aa64_atomics feature function
      hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects

Pierrick Bouvier (2):
      tests/functional/test_aarch64_device_passthrough: update image
      tests/functional/test_aarch64_rme: update image

Richard Henderson (12):
      target/arm: Add feature predicate for FEAT_CSSC
      target/arm: Implement MIN/MAX (immediate)
      target/arm: Implement MIN/MAX (register)
      target/arm: Split out gen_wrap2_i32 helper
      target/arm: Enable FEAT_CSSC for -cpu max
      qemu/atomic: Finish renaming atomic128-cas.h headers
      qemu/atomic: Add atomic16 primitives for xchg, fetch_and, fetch_or
      accel/tcg: Add cpu_atomic_*_mmu for 16-byte xchg, fetch_and, fetch_or
      tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128
      target/arm: Rename isar_feature_aa64_atomics
      target/arm: Implement FEAT_LSE128
      target/arm: Enable FEAT_LSE128 for -cpu max

Smail AIDER (1):
      target/arm: Trap PMCR when MDCR_EL2.TPMCR is set

Steve Sistare (1):
      hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr

 MAINTAINERS                                        |    3 +
 docs/conf.py                                       |    4 +-
 docs/sphinx/kerneldoc.py                           |    7 +-
 docs/system/arm/emulation.rst                      |    4 +
 accel/tcg/atomic_template.h                        |   80 +-
 accel/tcg/tcg-runtime.h                            |   12 +
 bsd-user/aarch64/target_arch_elf.h                 |    2 +-
 host/include/aarch64/host/atomic128-cas.h          |   45 -
 include/accel/tcg/cpu-ldst-common.h                |   13 +-
 include/hw/arm/stm32f205_soc.h                     |    2 +-
 include/hw/intc/arm_gicv3_common.h                 |    3 +
 include/tcg/tcg-op-common.h                        |    7 +
 include/tcg/tcg-op.h                               |    3 +
 target/arm/cpu-features.h                          |   24 +-
 target/arm/cpu.h                                   |   17 +
 target/arm/internals.h                             |   28 +-
 tests/qtest/libqtest.h                             |    2 +-
 host/include/aarch64/host/atomic128-cas.h.inc      |  102 +
 host/include/generic/host/atomic128-cas.h.inc      |   96 +
 target/arm/tcg/a64.decode                          |   26 +
 hw/arm/boot.c                                      |   42 +
 hw/arm/stm32f205_soc.c                             |   10 +-
 hw/arm/virt.c                                      |    8 +-
 hw/intc/arm_gicv3_kvm.c                            |   15 +
 linux-user/aarch64/elfload.c                       |    4 +-
 target/arm/cpregs-pmu.c                            |   34 +-
 target/arm/cpu.c                                   |    6 +
 target/arm/helper.c                                |  168 +-
 target/arm/ptw.c                                   |    8 +-
 target/arm/tcg/cpu64.c                             |    9 +-
 target/arm/tcg/translate-a64.c                     |  195 +-
 tcg/tcg-op-ldst.c                                  |   97 +-
 accel/tcg/atomic_common.c.inc                      |    9 +
 .editorconfig                                      |    2 +-
 scripts/kernel-doc                                 | 2442 --------------------
 scripts/kernel-doc.py                              |  325 +++
 scripts/lib/kdoc/kdoc_files.py                     |  291 +++
 scripts/lib/kdoc/kdoc_item.py                      |   42 +
 scripts/lib/kdoc/kdoc_output.py                    |  749 ++++++
 scripts/lib/kdoc/kdoc_parser.py                    | 1670 +++++++++++++
 scripts/lib/kdoc/kdoc_re.py                        |  270 +++
 .../functional/aarch64/test_device_passthrough.py  |   27 +-
 tests/functional/aarch64/test_rme_sbsaref.py       |   64 +-
 tests/functional/aarch64/test_rme_virt.py          |   85 +-
 44 files changed, 4389 insertions(+), 2663 deletions(-)
 delete mode 100644 host/include/aarch64/host/atomic128-cas.h
 create mode 100644 host/include/aarch64/host/atomic128-cas.h.inc
 delete mode 100755 scripts/kernel-doc
 create mode 100755 scripts/kernel-doc.py
 create mode 100644 scripts/lib/kdoc/kdoc_files.py
 create mode 100644 scripts/lib/kdoc/kdoc_item.py
 create mode 100644 scripts/lib/kdoc/kdoc_output.py
 create mode 100644 scripts/lib/kdoc/kdoc_parser.py
 create mode 100644 scripts/lib/kdoc/kdoc_re.py
Re: [PULL v2 00/32] target-arm queue
Posted by Richard Henderson 4 weeks ago
On 8/31/25 02:08, Peter Maydell wrote:
> v2: handle bsd-user in the rename of isar_feature_aa64_atomics
> 
> -- PMM
> 
> The following changes since commit 4791f22a5f5571cb248b1eddff98630545b3fd3e:
> 
>    Merge tag 'pull-lu-20250830' ofhttps://gitlab.com/rth7680/qemu into staging (2025-08-30 08:24:48 +1000)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20250830
> 
> for you to fetch changes up to 2e27650bddd35477d994a795a3b1cb57c8ed5c76:
> 
>    hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects (2025-08-30 16:38:47 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * Implement FEAT_SCTLR2
>   * Implement FEAT_TCR2
>   * Implement FEAT_CSSC
>   * Implement FEAT_LSE128
>   * Clean up of register field definitions
>   * Trap PMCR when MDCR_EL2.TPMCR is set
>   * tests/functional: update aarch64 RME test images
>   * hw/intc/arm_gicv3_kvm: preserve pending interrupts during cpr
>   * hw/arm: add static NVDIMMs in device tree
>   * hw/arm/stm32f205_soc: Don't leak TYPE_OR_IRQ objects
>   * scripts/kernel-doc: Avoid new Perl precedence warning
>   * scripts/kernel-doc: Update to kernel's new Python implementation


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~