On Sat, 30 Aug 2025 at 18:18, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Use delay_exception_el to move the exception out of line.
> Use TCG_COND_TSTNE instead of separate AND+NE.
>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/tcg/translate.c | 18 ++++--------------
> 1 file changed, 4 insertions(+), 14 deletions(-)
>
> diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
> index c4dd3a747c..f6fdfaa551 100644
> --- a/target/arm/tcg/translate.c
> +++ b/target/arm/tcg/translate.c
> @@ -3033,21 +3033,11 @@ static void do_coproc_insn(DisasContext *s, int cpnum, int is64,
>
> if (maskbit != 4 && maskbit != 14) {
> /* T4 and T14 are RES0 so never cause traps */
> - TCGv_i32 t;
> - DisasLabel over = gen_disas_label(s);
> + TCGLabel *fail = delay_exception_el(s, EXCP_UDEF, syndrome, 2);
> + TCGv_i32 t =
> + load_cpu_offset(offsetoflow32(CPUARMState, cp15.hstr_el2));
>
> - t = load_cpu_offset(offsetoflow32(CPUARMState, cp15.hstr_el2));
I almost certainly originally wrote this line with the declaration
of t and its initialization split to avoid this awkward linebreak
that you get if you put them together...
> - tcg_gen_andi_i32(t, t, 1u << maskbit);
> - tcg_gen_brcondi_i32(TCG_COND_EQ, t, 0, over.label);
> -
> - gen_exception_insn_el(s, 0, EXCP_UDEF, syndrome, 2);
> - /*
> - * gen_exception_insn() will set is_jmp to DISAS_NORETURN,
> - * but since we're conditionally branching over it, we want
> - * to assume continue-to-next-instruction.
> - */
> - s->base.is_jmp = DISAS_NEXT;
> - set_disas_label(s, over);
> + tcg_gen_brcondi_i32(TCG_COND_TSTNE, t, 1u << maskbit, fail);
> }
> }
-- PMM