On Wed, 27 Aug 2025 04:04, Richard Henderson <richard.henderson@linaro.org> wrote:
>Give a name to the bit we're already using.
>
>Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>---
> target/arm/cpregs.h | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
>diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h
>index b6c8eff0dd..3dc4c9927b 100644
>--- a/target/arm/cpregs.h
>+++ b/target/arm/cpregs.h
>@@ -178,9 +178,14 @@ enum {
> #define CP_REG_NS_SHIFT 29
> #define CP_REG_NS_MASK (1 << CP_REG_NS_SHIFT)
>
>+/* Distinguish 32-bit and 64-bit views of AArch32 system registers. */
>+#define CP_REG_AA32_64BIT_SHIFT 15
>+#define CP_REG_AA32_64BIT_MASK (1 << CP_REG_AA32_64BIT_SHIFT)
You could use include/qemu/bitops.h
>+
> #define ENCODE_CP_REG(cp, is64, ns, crn, crm, opc1, opc2) \
>- ((ns) << CP_REG_NS_SHIFT | ((cp) << 16) | ((is64) << 15) | \
>- ((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2))
>+ (((ns) << CP_REG_NS_SHIFT) | \
>+ ((is64) << CP_REG_AA32_64BIT_SHIFT) | \
>+ ((cp) << 16) | ((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2))
>
> #define ENCODE_AA64_CP_REG(cp, crn, crm, op0, op1, op2) \
> (CP_REG_AA64_MASK | \
>@@ -202,7 +207,7 @@ static inline uint32_t kvm_to_cpreg_id(uint64_t kvmid)
> cpregid |= CP_REG_AA64_MASK;
> } else {
> if ((kvmid & CP_REG_SIZE_MASK) == CP_REG_SIZE_U64) {
>- cpregid |= (1 << 15);
>+ cpregid |= CP_REG_AA32_64BIT_MASK;
> }
>
> /*
>@@ -226,8 +231,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
> kvmid = cpregid & ~CP_REG_AA64_MASK;
> kvmid |= CP_REG_SIZE_U64 | CP_REG_ARM64;
> } else {
>- kvmid = cpregid & ~(1 << 15);
>- if (cpregid & (1 << 15)) {
>+ kvmid = cpregid & ~CP_REG_AA32_64BIT_MASK;
>+ if (cpregid & CP_REG_AA32_64BIT_MASK) {
> kvmid |= CP_REG_SIZE_U64 | CP_REG_ARM;
> } else {
> kvmid |= CP_REG_SIZE_U32 | CP_REG_ARM;
>--
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
>2.43.0
>
>