Currently, HPET uses unsafe address_space_stl_le() to store MSI message.

Considerring HPET is used for x86 machines, and they're little endian.
So address_space_stl_le() equals to address_space_stl(), which makes it
possible to replace address_space_stl_le() with AddressSpace::store().

Therefore, use the safe binding - AddressSpace::store(), to access
address space.

Since then, the last unsafe piece of HPET has been filled in.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 rust/hw/timer/hpet/src/device.rs | 27 ++++++++++-----------------
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/rust/hw/timer/hpet/src/device.rs b/rust/hw/timer/hpet/src/device.rs
index 9fd75bf096e4..e7d5b57f2fe2 100644
--- a/rust/hw/timer/hpet/src/device.rs
+++ b/rust/hw/timer/hpet/src/device.rs
@@ -6,19 +6,17 @@
     ffi::{c_int, c_void, CStr},
     mem::MaybeUninit,
     pin::Pin,
-    ptr::{addr_of_mut, null_mut, NonNull},
+    ptr::NonNull,
     slice::from_ref,
 };
 
 use qemu_api::{
-    bindings::{
-        address_space_memory, address_space_stl_le, qdev_prop_bit, qdev_prop_bool,
-        qdev_prop_uint32, qdev_prop_usize,
-    },
+    bindings::{qdev_prop_bit, qdev_prop_bool, qdev_prop_uint32, qdev_prop_usize},
     cell::{BqlCell, BqlRefCell},
     irq::InterruptSource,
     memory::{
-        hwaddr, MemoryRegion, MemoryRegionOps, MemoryRegionOpsBuilder, MEMTXATTRS_UNSPECIFIED,
+        hwaddr, GuestAddress, MemoryRegion, MemoryRegionOps, MemoryRegionOpsBuilder,
+        ADDRESS_SPACE_MEMORY,
     },
     prelude::*,
     qdev::{DeviceImpl, DeviceState, Property, ResetType, ResettablePhasesImpl},
@@ -327,17 +325,12 @@ fn set_irq(&mut self, set: bool) {
 
         if set && self.is_int_enabled() && self.get_state().is_hpet_enabled() {
             if self.is_fsb_route_enabled() {
-                // SAFETY:
-                // the parameters are valid.
-                unsafe {
-                    address_space_stl_le(
-                        addr_of_mut!(address_space_memory),
-                        self.fsb >> 32,  // Timer N FSB int addr
-                        self.fsb as u32, // Timer N FSB int value, truncate!
-                        MEMTXATTRS_UNSPECIFIED,
-                        null_mut(),
-                    );
-                }
+                ADDRESS_SPACE_MEMORY
+                    .store(
+                        GuestAddress(self.fsb >> 32), // Timer N FSB int addr
+                        self.fsb as u32,              // Timer N FSB int value, truncate!
+                    )
+                    .expect("Failed to store into ADDRESS_SPACE_MEMORY.");
             } else if self.is_int_level_triggered() {
                 self.get_state().irqs[route].raise();
             } else {
-- 
2.34.1