Like ARM defines ARMASIdx, do the same to define X86ASIdx as enum. So
that it's more clear what index 0 is for memory and index 1 is for SMM.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
accel/kvm/kvm-all.c | 2 +-
target/i386/cpu.h | 5 +++++
target/i386/kvm/kvm-cpu.c | 2 +-
target/i386/kvm/kvm.c | 4 ++--
target/i386/tcg/system/tcg-cpu.c | 4 ++--
5 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 890d5ea9f865..e56c217a5a0d 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -2797,7 +2797,7 @@ static int kvm_init(AccelState *as, MachineState *ms)
s->memory_listener.listener.coalesced_io_del = kvm_uncoalesce_mmio_region;
kvm_memory_listener_register(s, &s->memory_listener,
- &address_space_memory, 0, "kvm-memory");
+ &address_space_memory, X86ASIdx_MEM, "kvm-memory");
memory_listener_register(&kvm_io_listener,
&address_space_io);
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index f977fc49a774..e0be7a740685 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2574,6 +2574,11 @@ static inline bool x86_has_cpuid_0x1f(X86CPU *cpu)
void x86_cpu_set_a20(X86CPU *cpu, int a20_state);
void cpu_sync_avx_hflag(CPUX86State *env);
+typedef enum X86ASIdx {
+ X86ASIdx_MEM = 0,
+ X86ASIdx_SMM = 1,
+} X86ASIdx;
+
#ifndef CONFIG_USER_ONLY
static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
{
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index aa657c2a4627..36f5892d330e 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -99,7 +99,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
* register_smram_listener() after machine init done.
*/
cs->num_ases = x86_machine_is_smm_enabled(X86_MACHINE(current_machine)) ? 2 : 1;
- cpu_address_space_init(cs, 0, "cpu-mmeory", cs->memory);
+ cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-mmeory", cs->memory);
return true;
}
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 47fb5c673c8e..5621200be0f0 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -2728,10 +2728,10 @@ static void register_smram_listener(Notifier *n, void *unused)
address_space_init(&smram_address_space, &smram_as_root, "KVM-SMRAM");
kvm_memory_listener_register(kvm_state, &smram_listener,
- &smram_address_space, 1, "kvm-smram");
+ &smram_address_space, X86ASIdx_SMM, "kvm-smram");
CPU_FOREACH(cpu) {
- cpu_address_space_init(cpu, 1, "cpu-smm", &smram_as_root);
+ cpu_address_space_init(cpu, X86ASIdx_SMM, "cpu-smm", &smram_as_root);
}
}
diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-cpu.c
index 0538a4fd51a3..7255862c2449 100644
--- a/target/i386/tcg/system/tcg-cpu.c
+++ b/target/i386/tcg/system/tcg-cpu.c
@@ -74,8 +74,8 @@ bool tcg_cpu_realizefn(CPUState *cs, Error **errp)
memory_region_set_enabled(cpu->cpu_as_mem, true);
cs->num_ases = 2;
- cpu_address_space_init(cs, 0, "cpu-memory", cs->memory);
- cpu_address_space_init(cs, 1, "cpu-smm", cpu->cpu_as_root);
+ cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory);
+ cpu_address_space_init(cs, X86ASIdx_SMM, "cpu-smm", cpu->cpu_as_root);
/* ... SMRAM with higher priority, linked from /machine/smram. */
cpu->machine_done.notify = tcg_cpu_machine_done;
--
2.43.0On Tue, Jul 29, 2025 at 01:40:23PM +0800, Xiaoyao Li wrote: > Date: Tue, 29 Jul 2025 13:40:23 +0800 > From: Xiaoyao Li <xiaoyao.li@intel.com> > Subject: [PATCH 2/2] target/i386: Define enum X86ASIdx for x86's address > spaces > X-Mailer: git-send-email 2.43.0 > > Like ARM defines ARMASIdx, do the same to define X86ASIdx as enum. So > that it's more clear what index 0 is for memory and index 1 is for SMM. Maybe: Define X86ASIdx as the enum, like ARM's ARMASIdx, so that index 0 is clearly for memory and index 1 for SMM. > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> > --- > accel/kvm/kvm-all.c | 2 +- > target/i386/cpu.h | 5 +++++ > target/i386/kvm/kvm-cpu.c | 2 +- > target/i386/kvm/kvm.c | 4 ++-- > target/i386/tcg/system/tcg-cpu.c | 4 ++-- > 5 files changed, 11 insertions(+), 6 deletions(-) Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
On 29/7/25 07:40, Xiaoyao Li wrote: > Like ARM defines ARMASIdx, do the same to define X86ASIdx as enum. So > that it's more clear what index 0 is for memory and index 1 is for SMM. > > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> > --- > accel/kvm/kvm-all.c | 2 +- > target/i386/cpu.h | 5 +++++ > target/i386/kvm/kvm-cpu.c | 2 +- > target/i386/kvm/kvm.c | 4 ++-- > target/i386/tcg/system/tcg-cpu.c | 4 ++-- > 5 files changed, 11 insertions(+), 6 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-By: Kirill Martynov <stdcalllevi@yandex-team.ru <mailto:stdcalllevi@yandex-team.ru>> > On 29 Jul 2025, at 10:11, Philippe Mathieu-Daudé <philmd@linaro.org> wrote: > > On 29/7/25 07:40, Xiaoyao Li wrote: >> Like ARM defines ARMASIdx, do the same to define X86ASIdx as enum. So >> that it's more clear what index 0 is for memory and index 1 is for SMM. >> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> >> --- >> accel/kvm/kvm-all.c | 2 +- >> target/i386/cpu.h | 5 +++++ >> target/i386/kvm/kvm-cpu.c | 2 +- >> target/i386/kvm/kvm.c | 4 ++-- >> target/i386/tcg/system/tcg-cpu.c | 4 ++-- >> 5 files changed, 11 insertions(+), 6 deletions(-) > > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> >
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