Move arm_reset_sve_state() calls to aarch64_set_svcr().
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-5-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 7f2a01e7368f960fadea38f437d0f6de7f249686)
---
target/arm/cpu.h | 1 -
linux-user/aarch64/cpu_loop.c | 1 -
linux-user/aarch64/signal.c | 8 +-------
target/arm/helper.c | 13 +++++++++++++
target/arm/sme_helper.c | 10 ----------
5 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8acfd3af4c..02a084c962 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1119,7 +1119,6 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64);
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask);
-void arm_reset_sve_state(CPUARMState *env);
/*
* SVE registers are encoded in KVM's memory in an endianness-invariant format.
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index d53742e10b..5e93d27d8f 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -96,7 +96,6 @@ void cpu_loop(CPUARMState *env)
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
if (FIELD_EX64(env->svcr, SVCR, SM)) {
arm_rebuild_hflags(env);
- arm_reset_sve_state(env);
}
ret = do_syscall(env,
env->xregs[8],
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
index b6e4dcb494..a326a6def5 100644
--- a/linux-user/aarch64/signal.c
+++ b/linux-user/aarch64/signal.c
@@ -665,14 +665,8 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
env->btype = 2;
}
- /*
- * Invoke the signal handler with both SM and ZA disabled.
- * When clearing SM, ResetSVEState, per SMSTOP.
- */
+ /* Invoke the signal handler with both SM and ZA disabled. */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
- if (FIELD_EX64(env->svcr, SVCR, SM)) {
- arm_reset_sve_state(env);
- }
if (env->svcr) {
arm_rebuild_hflags(env);
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 86b97daf7e..94a6f431a9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6429,11 +6429,24 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri,
return CP_ACCESS_OK;
}
+/* ResetSVEState */
+static void arm_reset_sve_state(CPUARMState *env)
+{
+ memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
+ /* Recall that FFR is stored as pregs[16]. */
+ memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
+ vfp_set_fpcr(env, 0x0800009f);
+}
+
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
{
uint64_t change = (env->svcr ^ new) & mask;
env->svcr ^= change;
+
+ if (change & R_SVCR_SM_MASK) {
+ arm_reset_sve_state(env);
+ }
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index 7717dab64f..56a8fbe691 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -29,22 +29,12 @@
#include "vec_internal.h"
#include "sve_ldst_internal.h"
-/* ResetSVEState */
-void arm_reset_sve_state(CPUARMState *env)
-{
- memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
- /* Recall that FFR is stored as pregs[16]. */
- memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
- vfp_set_fpsr(env, 0x0800009f);
-}
-
void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
{
if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
return;
}
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
- arm_reset_sve_state(env);
arm_rebuild_hflags(env);
}
--
2.43.0
On 28.07.2025 21:16, Richard Henderson wrote:
> Move arm_reset_sve_state() calls to aarch64_set_svcr().
> (cherry picked from commit 7f2a01e7368f960fadea38f437d0f6de7f249686)
> +/* ResetSVEState */
> +static void arm_reset_sve_state(CPUARMState *env)
> +{
> + memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
> + /* Recall that FFR is stored as pregs[16]. */
> + memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
> + vfp_set_fpcr(env, 0x0800009f);
> +}
> -/* ResetSVEState */
> -void arm_reset_sve_state(CPUARMState *env)
> -{
> - memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
> - /* Recall that FFR is stored as pregs[16]. */
> - memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
> - vfp_set_fpsr(env, 0x0800009f);
> -}
It's a fun one. Please note vfp_set_fpsr vs vfp_set_fpcr.
cf. 1edc3d43f20df0d04f8d00b906ba19fed37512a5 which has been
back-ported to 7.2 already :)
Unfortunately the order of these commits is different than
the one on master.
/mjt
On 7/28/25 09:43, Michael Tokarev wrote:
> On 28.07.2025 21:16, Richard Henderson wrote:
>> Move arm_reset_sve_state() calls to aarch64_set_svcr().
>> (cherry picked from commit 7f2a01e7368f960fadea38f437d0f6de7f249686)
>
>> +/* ResetSVEState */
>> +static void arm_reset_sve_state(CPUARMState *env)
>> +{
>> + memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
>> + /* Recall that FFR is stored as pregs[16]. */
>> + memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
>> + vfp_set_fpcr(env, 0x0800009f);
>> +}
>
>> -/* ResetSVEState */
>> -void arm_reset_sve_state(CPUARMState *env)
>> -{
>> - memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
>> - /* Recall that FFR is stored as pregs[16]. */
>> - memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
>> - vfp_set_fpsr(env, 0x0800009f);
>> -}
>
> It's a fun one. Please note vfp_set_fpsr vs vfp_set_fpcr.
>
> cf. 1edc3d43f20df0d04f8d00b906ba19fed37512a5 which has been
> back-ported to 7.2 already :)
>
> Unfortunately the order of these commits is different than
> the one on master.
>
> /mjt
Oh, whoops! Thanks for the catch!
r~
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