We're missing a strace entry for riscv_hwprobe, and using -strace will
report it as "Unknown syscall 258".
After this patch we'll have:
$ ./build/qemu-riscv64 -strace test_mutex_riscv
110182 riscv_hwprobe(0x7f207efdc700,1,0,0,0,0) = 0
110182 brk(NULL) = 0x0000000000082000
(...)
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
linux-user/strace.list | 3 +++
1 file changed, 3 insertions(+)
diff --git a/linux-user/strace.list b/linux-user/strace.list
index fdf94ef32a..ab818352a9 100644
--- a/linux-user/strace.list
+++ b/linux-user/strace.list
@@ -1716,3 +1716,6 @@
{ TARGET_NR_clock_gettime64, "clock_gettime64" , NULL, print_clock_gettime64,
print_syscall_ret_clock_gettime64 },
#endif
+#ifdef TARGET_NR_riscv_hwprobe
+{ TARGET_NR_riscv_hwprobe, "riscv_hwprobe" , "%s(%p,%d,%d,%d,%d,%d)", NULL, NULL },
+#endif
--
2.50.1
On Tue, Jul 29, 2025 at 3:07 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> We're missing a strace entry for riscv_hwprobe, and using -strace will
> report it as "Unknown syscall 258".
>
> After this patch we'll have:
>
> $ ./build/qemu-riscv64 -strace test_mutex_riscv
> 110182 riscv_hwprobe(0x7f207efdc700,1,0,0,0,0) = 0
> 110182 brk(NULL) = 0x0000000000082000
> (...)
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> linux-user/strace.list | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/linux-user/strace.list b/linux-user/strace.list
> index fdf94ef32a..ab818352a9 100644
> --- a/linux-user/strace.list
> +++ b/linux-user/strace.list
> @@ -1716,3 +1716,6 @@
> { TARGET_NR_clock_gettime64, "clock_gettime64" , NULL, print_clock_gettime64,
> print_syscall_ret_clock_gettime64 },
> #endif
> +#ifdef TARGET_NR_riscv_hwprobe
> +{ TARGET_NR_riscv_hwprobe, "riscv_hwprobe" , "%s(%p,%d,%d,%d,%d,%d)", NULL, NULL },
> +#endif
> --
> 2.50.1
>
>
On 7/28/25 07:06, Daniel Henrique Barboza wrote:
> We're missing a strace entry for riscv_hwprobe, and using -strace will
> report it as "Unknown syscall 258".
>
> After this patch we'll have:
>
> $ ./build/qemu-riscv64 -strace test_mutex_riscv
> 110182 riscv_hwprobe(0x7f207efdc700,1,0,0,0,0) = 0
> 110182 brk(NULL) = 0x0000000000082000
> (...)
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> linux-user/strace.list | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/linux-user/strace.list b/linux-user/strace.list
> index fdf94ef32a..ab818352a9 100644
> --- a/linux-user/strace.list
> +++ b/linux-user/strace.list
> @@ -1716,3 +1716,6 @@
> { TARGET_NR_clock_gettime64, "clock_gettime64" , NULL, print_clock_gettime64,
> print_syscall_ret_clock_gettime64 },
> #endif
> +#ifdef TARGET_NR_riscv_hwprobe
> +{ TARGET_NR_riscv_hwprobe, "riscv_hwprobe" , "%s(%p,%d,%d,%d,%d,%d)", NULL, NULL },
> +#endif
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
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