[PATCH v3 8/9] target/arm: hvf: use LOG_UNIMP for CNTP_CVAL_EL0/SYSREG_CNTP_CTL_EL0

Mohamed Mediouni posted 9 patches 3 months, 3 weeks ago
Maintainers: Cameron Esfahani <dirty@apple.com>, Roman Bolshakov <rbolshakov@ddn.com>, Phil Dennis-Jordan <phil@philjordan.eu>, Mads Ynddal <mads@ynddal.dk>, Shannon Zhao <shannon.zhaosl@gmail.com>, "Michael S. Tsirkin" <mst@redhat.com>, Igor Mammedov <imammedo@redhat.com>, Ani Sinha <anisinha@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Alexander Graf <agraf@csgraf.de>
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[PATCH v3 8/9] target/arm: hvf: use LOG_UNIMP for CNTP_CVAL_EL0/SYSREG_CNTP_CTL_EL0
Posted by Mohamed Mediouni 3 months, 3 weeks ago
Instead of considering reads there to be fatal, mark it as unimplemented.

This is to allow experimentation on using configurations other than the Apple vGIC.

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
 target/arm/hvf/hvf.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index f5b82cdce1..c3df7e07e8 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -299,6 +299,7 @@ void hvf_arm_init_debug(void)
 /* EL2 registers */
 #define SYSREG_CNTHCTL_EL2    SYSREG(3, 4, 14, 1, 0)
 #define SYSREG_MDCCINT_EL1    SYSREG(2, 0, 0, 2, 0)
+#define SYSREG_CNTP_CVAL_EL0   SYSREG(3, 3, 14, 2, 2)
 
 #define WFX_IS_WFE (1 << 0)
 
@@ -1398,6 +1399,12 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
     case SYSREG_CNTHCTL_EL2:
         assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
         return 0;
+    case SYSREG_CNTP_CTL_EL0:
+        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CTL_EL0\n");
+        return 0;
+    case SYSREG_CNTP_CVAL_EL0:
+        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CVAL_EL0\n");
+        return 0;
     case SYSREG_MDCCINT_EL1:
         assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_MDCCINT_EL1, val));
         return 0;
@@ -1718,6 +1725,9 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
          */
         qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n");
         return 0;
+    case SYSREG_CNTP_CVAL_EL0:
+        qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CVAL_EL0\n");
+        return 0;
     case SYSREG_OSDLR_EL1:
         /* Dummy register */
         return 0;
-- 
2.39.5 (Apple Git-154)
Re: [PATCH v3 8/9] target/arm: hvf: use LOG_UNIMP for CNTP_CVAL_EL0/SYSREG_CNTP_CTL_EL0
Posted by Philippe Mathieu-Daudé 3 months, 2 weeks ago
On 26/7/25 00:30, Mohamed Mediouni wrote:
> Instead of considering reads there to be fatal, mark it as unimplemented.
> 
> This is to allow experimentation on using configurations other than the Apple vGIC.

FYI 
https://lore.kernel.org/qemu-devel/20250623121845.7214-11-philmd@linaro.org/.

> 
> Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
> ---
>   target/arm/hvf/hvf.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
> index f5b82cdce1..c3df7e07e8 100644
> --- a/target/arm/hvf/hvf.c
> +++ b/target/arm/hvf/hvf.c
> @@ -299,6 +299,7 @@ void hvf_arm_init_debug(void)
>   /* EL2 registers */
>   #define SYSREG_CNTHCTL_EL2    SYSREG(3, 4, 14, 1, 0)
>   #define SYSREG_MDCCINT_EL1    SYSREG(2, 0, 0, 2, 0)
> +#define SYSREG_CNTP_CVAL_EL0   SYSREG(3, 3, 14, 2, 2)
>   
>   #define WFX_IS_WFE (1 << 0)
>   
> @@ -1398,6 +1399,12 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
>       case SYSREG_CNTHCTL_EL2:
>           assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
>           return 0;
> +    case SYSREG_CNTP_CTL_EL0:
> +        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CTL_EL0\n");
> +        return 0;
> +    case SYSREG_CNTP_CVAL_EL0:
> +        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CVAL_EL0\n");
> +        return 0;
>       case SYSREG_MDCCINT_EL1:
>           assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_MDCCINT_EL1, val));
>           return 0;
> @@ -1718,6 +1725,9 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
>            */
>           qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n");
>           return 0;
> +    case SYSREG_CNTP_CVAL_EL0:
> +        qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CVAL_EL0\n");
> +        return 0;
>       case SYSREG_OSDLR_EL1:
>           /* Dummy register */
>           return 0;
Re: [PATCH v3 8/9] target/arm: hvf: use LOG_UNIMP for CNTP_CVAL_EL0/SYSREG_CNTP_CTL_EL0
Posted by Mohamed Mediouni 3 months, 2 weeks ago
> On 28. Jul 2025, at 12:35, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
> 
> On 26/7/25 00:30, Mohamed Mediouni wrote:
>> Instead of considering reads there to be fatal, mark it as unimplemented.
>> This is to allow experimentation on using configurations other than the Apple vGIC.
> 
> FYI https://lore.kernel.org/qemu-devel/20250623121845.7214-11-philmd@linaro.org/.

By the way, am running with a similar patch to that and this is what I get - probably screwed up something trivial though…

[   60.090520] rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
[   60.090950] rcu: 0-....: (0 ticks this GP) idle=ce00/0/0x0 softirq=1/1 fqs=0 (false positive?)
[   60.091518] rcu: (detected by 2, t=60003 jiffies, g=-1199, q=16542 ncpus=4)
[   60.092016] Sending NMI from CPU 2 to CPUs 0:
[   60.092286] NMI backtrace for cpu 0
[   60.092531] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.11.0-13-generic #14-Ubuntu
[   60.093056] Hardware name: linux,dummy-virt (DT)
[   60.093476] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
[   60.093977] pc : cpuidle_idle_call+0xb4/0x208
[   60.094226] lr : cpuidle_idle_call+0x19c/0x208
[   60.094526] sp : ffffa9fa513e3d80
[   60.094782] x29: ffffa9fa513e3d90 x28: 0000000000000000 x27: 0000000000000000
[   60.095263] x26: 0000000000000000 x25: 0000000000000003 x24: 0000000000000000
[   60.095926] x23: 00000000000000c0 x22: ffffa9fa513edde8 x21: ffffa9fa513f97c0
[   60.096412] x20: 0000000000000000 x19: 0000000000000000 x18: ffffa9fa513fba68
[   60.096982] x17: 0000000000000000 x16: 0000000000000000 x15: 0000000000000000
[   60.097511] x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
[   60.097996] x11: 0000000000000000 x10: 96d8ff766a2f06fb x9 : ffffa9fa4e20bb64
[   60.098518] x8 : ffffa9fa513fb9e8 x7 : 0000000000000000 x6 : 0000000000000000
[   60.099103] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 0000000000000000
[   60.099541] x2 : 0000000000000000 x1 : 0000000000000000 x0 : 0000000000000000
[   60.100065] Call trace:
[   60.100288]  cpuidle_idle_call+0xb4/0x208
[   60.100539]  do_idle+0xac/0x120
[   60.100817]  cpu_startup_entry+0x40/0x58
[   60.101123]  rest_init+0x118/0x120
[   60.101349]  start_kernel+0x49c/0x4a8
[   60.101670]  __primary_switched+0x88/0x98
[   60.102343] rcu: rcu_preempt kthread timer wakeup didn't happen for 60007 jiffies! g-1199 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402
[   60.103135] rcu: Possible timer handling issue on cpu=0 timer-softirq=0
[   60.103605] rcu: rcu_preempt kthread starved for 60010 jiffies! g-1199 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=0
[   60.104371] rcu: Unless rcu_preempt kthread gets sufficient CPU time, OOM is now expected behavior.
[   60.104974] rcu: RCU grace-period kthread stack dump:
[   60.105279] task:rcu_preempt     state:I stack:0     pid:17    tgid:17    ppid:2      flags:0x00000008
[   60.105921] Call trace:
[   60.106125]  __switch_to+0xbc/0x108
[   60.106391]  __schedule+0x298/0x770
[   60.106630]  schedule+0x40/0x128
[   60.106836]  schedule_timeout+0xa0/0x1c8
[   60.107084]  rcu_gp_fqs_loop+0x124/0x540
[   60.107314]  rcu_gp_kthread+0x158/0x198
[   60.107536]  kthread+0xf4/0x108
[   60.107727]  ret_from_fork+0x10/0x20

>> Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
>> ---
>>  target/arm/hvf/hvf.c | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
>> index f5b82cdce1..c3df7e07e8 100644
>> --- a/target/arm/hvf/hvf.c
>> +++ b/target/arm/hvf/hvf.c
>> @@ -299,6 +299,7 @@ void hvf_arm_init_debug(void)
>>  /* EL2 registers */
>>  #define SYSREG_CNTHCTL_EL2    SYSREG(3, 4, 14, 1, 0)
>>  #define SYSREG_MDCCINT_EL1    SYSREG(2, 0, 0, 2, 0)
>> +#define SYSREG_CNTP_CVAL_EL0   SYSREG(3, 3, 14, 2, 2)
>>    #define WFX_IS_WFE (1 << 0)
>>  @@ -1398,6 +1399,12 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
>>      case SYSREG_CNTHCTL_EL2:
>>          assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
>>          return 0;
>> +    case SYSREG_CNTP_CTL_EL0:
>> +        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CTL_EL0\n");
>> +        return 0;
>> +    case SYSREG_CNTP_CVAL_EL0:
>> +        qemu_log_mask(LOG_UNIMP, "Unsupported read from CNTP_CVAL_EL0\n");
>> +        return 0;
>>      case SYSREG_MDCCINT_EL1:
>>          assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_MDCCINT_EL1, val));
>>          return 0;
>> @@ -1718,6 +1725,9 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
>>           */
>>          qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n");
>>          return 0;
>> +    case SYSREG_CNTP_CVAL_EL0:
>> +        qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CVAL_EL0\n");
>> +        return 0;
>>      case SYSREG_OSDLR_EL1:
>>          /* Dummy register */
>>          return 0;
> 
>