target/arm: Fix various SVE2p1 load/store bugs

[PATCH for-10.1 0/6] target/arm: Fix various SVE2p1 load/store bugs

Peter Maydell posted 6 patches 3 months, 3 weeks ago

Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250723165458.3509150-1-peter.maydell@linaro.org

Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, John Snow <jsnow@redhat.com>, Cleber Rosa <crosa@redhat.com>, Peter Maydell <peter.maydell@linaro.org>

target/arm/internals.h          |    8 +-
target/arm/tcg/helper-sme.h     |  144 ++--
target/arm/tcg/helper-sve.h     | 1196 +++++++++++++++----------------
target/arm/tcg/translate-a64.h  |    2 +-
target/arm/tcg/sve.decode       |   12 +-
tests/decode/succ_infer1.decode |    4 +
target/arm/tcg/sme_helper.c     |   30 +-
target/arm/tcg/sve_helper.c     |  185 ++---
target/arm/tcg/translate-sme.c  |    6 +-
target/arm/tcg/translate-sve.c  |  103 ++-
scripts/decodetree.py           |    7 +-
tests/decode/meson.build        |    1 +
12 files changed, 872 insertions(+), 826 deletions(-)
create mode 100644 tests/decode/succ_infer1.decode

Expand all Fold all

[PATCH for-10.1 0/6] target/arm: Fix various SVE2p1 load/store bugs

Posted by Peter Maydell 3 months, 3 weeks ago

This patchset fixes some bugs in the load/store insns newly
introduced with SVE2p1.  The first three patches are all from Richard
and have already appeared on the list: I gathered them up here since
they're hard dependencies for this (and for patch 2 expanded the
commit message to say which bugs it's fixing).  The last three
patches are from me, and are fairly straightforward bug fixes.

thanks
-- PMM

Peter Maydell (3):
  target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector
  target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q
  target/arm: Fix LD1W, LD1D to 128-bit elements

Richard Henderson (3):
  target/arm: Expand the descriptor for SME/SVE memory ops to i64
  target/arm: Pack mtedesc into upper 32 bits of descriptor
  decodetree: Infer argument set before inferring format

 target/arm/internals.h          |    8 +-
 target/arm/tcg/helper-sme.h     |  144 ++--
 target/arm/tcg/helper-sve.h     | 1196 +++++++++++++++----------------
 target/arm/tcg/translate-a64.h  |    2 +-
 target/arm/tcg/sve.decode       |   12 +-
 tests/decode/succ_infer1.decode |    4 +
 target/arm/tcg/sme_helper.c     |   30 +-
 target/arm/tcg/sve_helper.c     |  185 ++---
 target/arm/tcg/translate-sme.c  |    6 +-
 target/arm/tcg/translate-sve.c  |  103 ++-
 scripts/decodetree.py           |    7 +-
 tests/decode/meson.build        |    1 +
 12 files changed, 872 insertions(+), 826 deletions(-)
 create mode 100644 tests/decode/succ_infer1.decode

-- 
2.43.0