On 7/17/25 05:40, Jamin Lin wrote:
> AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for the
> main CA35 processor. The SSP coprocessor accesses this same memory at a
> different memory address: 0x70000000–0x7001FFFF.
>
> To support this shared memory model, this commit introduces "ssp.sram_mr_alias",
> a "MemoryRegion" alias of the original SRAM region ("s->sram"). The alias is
> realized during SSP SoC setup and mapped into the SSP's SoC memory map.
>
> Additionally, because the SRAM must be realized before the SSP can create an
> alias to it, the device realization order is explicitly managed:
> "aspeed_soc_ast2700_ssp_realize()" is invoked after SRAM is initialized.
>
> This ensures that SSP’s access to shared SRAM functions correctly.
Could the 'sram' MemoryRegion of main SoC be passed to the coprocessors
using a property ? Like done for dram. This would be simpler I think.
Thanks,
C.
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> include/hw/arm/aspeed_soc.h | 1 +
> hw/arm/aspeed_ast27x0-ssp.c | 5 +++++
> hw/arm/aspeed_ast27x0.c | 15 ++++++++++++++-
> 3 files changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 3dd317cfee..9b935b9bca 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -134,6 +134,7 @@ struct Aspeed27x0SSPSoCState {
> UnimplementedDeviceState ipc[2];
> UnimplementedDeviceState scuio;
> MemoryRegion memory;
> + MemoryRegion sram_mr_alias;
>
> ARMv7MState armv7m;
> };
> diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
> index 9641e27de1..b7b886f4bf 100644
> --- a/hw/arm/aspeed_ast27x0-ssp.c
> +++ b/hw/arm/aspeed_ast27x0-ssp.c
> @@ -19,6 +19,7 @@
>
> static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
> [ASPEED_DEV_SDRAM] = 0x00000000,
> + [ASPEED_DEV_SRAM] = 0x70000000,
> [ASPEED_DEV_INTC] = 0x72100000,
> [ASPEED_DEV_SCU] = 0x72C02000,
> [ASPEED_DEV_SCUIO] = 0x74C02000,
> @@ -192,6 +193,10 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
> sc->memmap[ASPEED_DEV_SDRAM],
> &s->dram_container);
>
> + /* SRAM */
> + memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM],
> + &a->sram_mr_alias);
> +
> /* SCU */
> if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
> return;
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 665627f788..9064249bed 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -624,6 +624,7 @@ static bool aspeed_soc_ast2700_ssp_realize(DeviceState *dev, Error **errp)
> {
> Aspeed27x0SoCState *a = ASPEED27X0_SOC(dev);
> AspeedSoCState *s = ASPEED_SOC(dev);
> + MemoryRegion *mr;
> Clock *sysclk;
>
> sysclk = clock_new(OBJECT(s), "SSP_SYSCLK");
> @@ -637,6 +638,9 @@ static bool aspeed_soc_ast2700_ssp_realize(DeviceState *dev, Error **errp)
> return false;
> }
>
> + mr = &s->sram;
> + memory_region_init_alias(&a->ssp.sram_mr_alias, OBJECT(s), "ssp.sram.alias",
> + mr, 0, memory_region_size(mr));
> if (!qdev_realize(DEVICE(&a->ssp), NULL, &error_abort)) {
> return false;
> }
> @@ -779,7 +783,16 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
> aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scuio), 0,
> sc->memmap[ASPEED_DEV_SCUIO]);
>
> - /* Coprocessors */
> + /*
> + * Coprocessors must be realized after the SRAM region.
> + *
> + * The SRAM is used for shared memory between the main CPU (PSP) and
> + * coprocessors. The coprocessors accesses this shared SRAM region
> + * through a memory alias mapped to a different physical address.
> + *
> + * Therefore, the SRAM must be fully initialized before the coprocessors
> + * can create aliases pointing to it.
> + */
> if (mc->default_cpus > sc->num_cpus) {
> if (!aspeed_soc_ast2700_ssp_realize(dev, errp)) {
> return;