This patch set belongs to a list of series that add SVM support for VT-d.
Here we focus on implementing the ATS API exposed through the PCIIOMMUOps
callbacks.

This work is based on the VT-d specification version 4.1 (March 2023).

Here is a link to our GitHub repository where you can find:
    - Qemu with all the patches for SVM
        - ATS
        - PRI
        - Device IOTLB invalidations
        - Requests with already pre-translated addresses
    - A demo device
    - A simple driver for the demo device
    - A userspace program (for testing and demonstration purposes)

https://github.com/BullSequana/Qemu-in-guest-SVM-demo

What is ATS?
''''''''''''

ATS (Address Translation Service) is a PCIe-level protocol that
enables PCIe devices to query an IOMMU for virtual to physical
address translations in a specific address space (potentially identified by
a PASID). When a device receives a translation response from an IOMMU, it
may decide to store it in an internal cache, often known as "ATC"
(Address Translation Cache) or "Device IOTLB". When triggering a memory
operation using a physical address obtained via ATS, the device must set
the AT field of the PCIe message to "translated" to prevent the IOMMU
from translating the address again. To keep page tables and caches
consistent, the host system can ask the IOMMU to send invalidation requests
to the devices.

Changelog:

v5
    - Migrate to the PCIIOMMUOps API

v4
    - Fix compilation issue on 32bit hosts

v3
    - Fix compilation issue in non-debug mode (Michael)

v2
    - Rebase on master after merge of Zhenzhong's FLTS series
    - Rename the series as it is now based on master.
    
    - Changes after review by Michael:
    	- Split long lines in memory.h
    	- Change patch encoding (no UTF-8)
    
    - Changes after review by Zhenzhong:
    	- Rework "Fill the PASID field when creating an IOMMUTLBEntry"

Clement Mathieu--Drif (10):
  pci: Add a memory attribute for pre-translated DMA operations
  memory: Add permissions in IOMMUAccessFlags
  memory: Allow to store the PASID in IOMMUTLBEntry
  intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry
  intel_iommu: Declare supported PASID size
  intel_iommu: Implement vtd_get_iotlb_info from PCIIOMMUOps
  intel_iommu: Implement the PCIIOMMUOps callbacks related to
    invalidations of device-IOTLB
  intel_iommu: Return page walk level even when the translation fails
  intel_iommu: Set address mask when a translation fails and adjust W
    permission
  intel_iommu: Add support for ATS

 hw/i386/intel_iommu.c          | 142 ++++++++++++++++++++++++++++++---
 hw/i386/intel_iommu_internal.h |   1 +
 include/exec/memattrs.h        |   3 +
 include/hw/pci/pci.h           |   9 +++
 include/system/memory.h        |  24 +++++-
 5 files changed, 164 insertions(+), 15 deletions(-)

-- 
2.49.0