From: Manish Mishra <manish.mishra@nutanix.com>
Add a "x-force-cpuid-0x1f" property so that CPU models can enable it and
have 0x1f CPUID leaf natually as the Host CPU.
The advantage is that when the CPU model's cache model is already
consistent with the Host CPU, for example, SRF defaults to l2 per
module & l3 per package, 0x1f can better help users identify the
topology in the VM.
Adding 0x1f for specific CPU models should not cause any trouble in
principle. This property is only enabled for CPU models that already
have 0x1f leaf on the Host, so software that originally runs normally on
the Host won't encounter issues in the Guest with corresponding CPU
model. Conversely, some software that relies on checking 0x1f might
have problems in the Guest due to the lack of 0x1f [*]. In
summary, adding 0x1f is also intended to further emulate the Host CPU
environment.
[*]: https://lore.kernel.org/qemu-devel/PH0PR02MB738410511BF51B12DB09BE6CF6AC2@PH0PR02MB7384.namprd02.prod.outlook.com/
Signed-off-by: Manish Mishra <manish.mishra@nutanix.com>
Co-authored-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
[Integrated and rebased 2 previous patches (ordered by post time)]
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
Note:
This patch integrates the idea from 2 previous posted patches (ordered
by post time)[1] [2], following the s-o-b policy of "Re-starting
abandoned work" in docs/devel/code-provenance.rst.
[1]: From Manish: https://lore.kernel.org/qemu-devel/20240722101859.47408-1-manish.mishra@nutanix.com/
[2]: From Xiaoyao: https://lore.kernel.org/qemu-devel/20240813033145.279307-1-xiaoyao.li@intel.com/
---
Changes since RFC:
* Rebase and rename the property as "x-force-cpuid-0x1f". (Igor)
---
target/i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 08c84ba90f52..ee36f7ee2ccc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9934,6 +9934,7 @@ static const Property x86_cpu_properties[] = {
DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
true),
DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
+ DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
};
#ifndef CONFIG_USER_ONLY
--
2.34.1
On 6/26/2025 4:31 PM, Zhao Liu wrote:
> From: Manish Mishra <manish.mishra@nutanix.com>
>
> Add a "x-force-cpuid-0x1f" property so that CPU models can enable it and
> have 0x1f CPUID leaf natually as the Host CPU.
>
> The advantage is that when the CPU model's cache model is already
> consistent with the Host CPU, for example, SRF defaults to l2 per
> module & l3 per package, 0x1f can better help users identify the
> topology in the VM.
>
> Adding 0x1f for specific CPU models should not cause any trouble in
> principle. This property is only enabled for CPU models that already
> have 0x1f leaf on the Host, so software that originally runs normally on
> the Host won't encounter issues in the Guest with corresponding CPU
> model. Conversely, some software that relies on checking 0x1f might
> have problems in the Guest due to the lack of 0x1f [*]. In
> summary, adding 0x1f is also intended to further emulate the Host CPU
> environment.
>
> [*]: https://lore.kernel.org/qemu-devel/PH0PR02MB738410511BF51B12DB09BE6CF6AC2@PH0PR02MB7384.namprd02.prod.outlook.com/
>
> Signed-off-by: Manish Mishra <manish.mishra@nutanix.com>
> Co-authored-by: Xiaoyao Li <xiaoyao.li@intel.com>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> [Integrated and rebased 2 previous patches (ordered by post time)]
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> ---
> Note:
> This patch integrates the idea from 2 previous posted patches (ordered
> by post time)[1] [2], following the s-o-b policy of "Re-starting
> abandoned work" in docs/devel/code-provenance.rst.
>
> [1]: From Manish: https://lore.kernel.org/qemu-devel/20240722101859.47408-1-manish.mishra@nutanix.com/
> [2]: From Xiaoyao: https://lore.kernel.org/qemu-devel/20240813033145.279307-1-xiaoyao.li@intel.com/
> ---
> Changes since RFC:
> * Rebase and rename the property as "x-force-cpuid-0x1f". (Igor)
> ---
> target/i386/cpu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 08c84ba90f52..ee36f7ee2ccc 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -9934,6 +9934,7 @@ static const Property x86_cpu_properties[] = {
> DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
> true),
> DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
> + DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
> };
>
> #ifndef CONFIG_USER_ONLY
LGTM.
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
On 6/26/25 4:31 PM, Zhao Liu wrote:
>
>
> From: Manish Mishra <manish.mishra@nutanix.com>
>
> Add a "x-force-cpuid-0x1f" property so that CPU models can enable it and
> have 0x1f CPUID leaf natually as the Host CPU.
>
> The advantage is that when the CPU model's cache model is already
> consistent with the Host CPU, for example, SRF defaults to l2 per
> module & l3 per package, 0x1f can better help users identify the
> topology in the VM.
>
> Adding 0x1f for specific CPU models should not cause any trouble in
> principle. This property is only enabled for CPU models that already
> have 0x1f leaf on the Host, so software that originally runs normally on
> the Host won't encounter issues in the Guest with corresponding CPU
> model. Conversely, some software that relies on checking 0x1f might
> have problems in the Guest due to the lack of 0x1f [*]. In
> summary, adding 0x1f is also intended to further emulate the Host CPU
> environment.
>
> [*]: https://lore.kernel.org/qemu-devel/PH0PR02MB738410511BF51B12DB09BE6CF6AC2@PH0PR02MB7384.namprd02.prod.outlook.com/
>
> Signed-off-by: Manish Mishra <manish.mishra@nutanix.com>
> Co-authored-by: Xiaoyao Li <xiaoyao.li@intel.com>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> [Integrated and rebased 2 previous patches (ordered by post time)]
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> ---
> Note:
> This patch integrates the idea from 2 previous posted patches (ordered
> by post time)[1] [2], following the s-o-b policy of "Re-starting
> abandoned work" in docs/devel/code-provenance.rst.
>
> [1]: From Manish: https://lore.kernel.org/qemu-devel/20240722101859.47408-1-manish.mishra@nutanix.com/
> [2]: From Xiaoyao: https://lore.kernel.org/qemu-devel/20240813033145.279307-1-xiaoyao.li@intel.com/
> ---
> Changes since RFC:
> * Rebase and rename the property as "x-force-cpuid-0x1f". (Igor)
> ---
> target/i386/cpu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 08c84ba90f52..ee36f7ee2ccc 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -9934,6 +9934,7 @@ static const Property x86_cpu_properties[] = {
> DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
> true),
> DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
> + DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
> };
After applying these patches to QEMU mainline at commit 6e1571533fd9:
$ git am
patches-from-https://lore.kernel.org/qemu-devel/20250620092734.1576677-1-zhao1.liu@intel.com/
$ git am
patches-from-https://lore.kernel.org/all/20250626083105.2581859-6-zhao1.liu@intel.com/
and configure && make qemu with:
$ ./configure --target-list=x86_64-softmmu --enable-debug --enable-kvm
--enable-sdl --enable-gtk --enable-spice --prefix=/usr --enable-libusb
--enable-usb-redir --enable-trace-backends=simple && make -j32
I ran into this build error:
target/i386/cpu.c:9942:52: error: 'X86CPU' {aka 'struct ArchCPU'} has no member
named 'force_cpuid_0x1f' ; did you mean 'enable_cpuid_0x1f' ?
I haven't debug it yet, because it seems like a simple mistake, asking you
directly might be quicker.
>
> #ifndef CONFIG_USER_ONLY
> --
> 2.34.1
>
> After applying these patches to QEMU mainline at commit 6e1571533fd9:
Ah, I forgot I've rebased these patches...Now you can rebase all the
patches at the latest master branch.
Or, you can try this repo - I just created it to make it easier for you:
https://gitlab.com/zhao.liu/qemu/-/tree/cache-model-v2.6-rebase-06-23-2025
Thanks,
Zhao
> $ git am patches-from-https://lore.kernel.org/qemu-devel/20250620092734.1576677-1-zhao1.liu@intel.com/
> $ git am patches-from-https://lore.kernel.org/all/20250626083105.2581859-6-zhao1.liu@intel.com/
>
> and configure && make qemu with:
>
> $ ./configure --target-list=x86_64-softmmu --enable-debug --enable-kvm
> --enable-sdl --enable-gtk --enable-spice --prefix=/usr --enable-libusb
> --enable-usb-redir --enable-trace-backends=simple && make -j32
>
> I ran into this build error:
>
> target/i386/cpu.c:9942:52: error: 'X86CPU' {aka 'struct ArchCPU'} has no
> member named 'force_cpuid_0x1f' ; did you mean 'enable_cpuid_0x1f' ?
>
> I haven't debug it yet, because it seems like a simple mistake, asking you
> directly might be quicker.
>
On 6/27/25 11:05 AM, Zhao Liu wrote: > > >> After applying these patches to QEMU mainline at commit 6e1571533fd9: > > Ah, I forgot I've rebased these patches...Now you can rebase all the > patches at the latest master branch. > > Or, you can try this repo - I just created it to make it easier for you: > > https://gitlab.com/zhao.liu/qemu/-/tree/cache-model-v2.6-rebase-06-23-2025 > I cloned the repo and then ran: $ git am 20250620_zhao1_liu_i386_cpu_unify_the_cache_model_in_x86cpustate.mbx The *.mbx is got from b4 tool. That applied several patches successfully, but on patch #11 I got this error: error: patch failed: target/i386/cpu.c:7482 error: target/i386/cpu.c: patch does not apply Patch failed at 0011 i386/cpu: Select legacy cache model based on vendor in CPUID 0x2 hint: Use 'git am --show-current-patch=diff' to see the failed patch This error also occured on qemu master when I do 'git am 20250620_zhao1_liu_i386_cpu_unify_the_cache_model_in_x86cpustate.mbx'. Have you run into this before, or did I miss any steps?
On Fri, Jun 27, 2025 at 02:48:05PM +0800, Ewan Hai wrote: > Date: Fri, 27 Jun 2025 14:48:05 +0800 > From: Ewan Hai <ewanhai-oc@zhaoxin.com> > Subject: Re: [PATCH 5/8] i386/cpu: Add a "x-force-cpuid-0x1f" property > > > > On 6/27/25 11:05 AM, Zhao Liu wrote: > > > > > > > After applying these patches to QEMU mainline at commit 6e1571533fd9: > > > > Ah, I forgot I've rebased these patches...Now you can rebase all the > > patches at the latest master branch. > > > > Or, you can try this repo - I just created it to make it easier for you: > > > > https://gitlab.com/zhao.liu/qemu/-/tree/cache-model-v2.6-rebase-06-23-2025 > > > > I cloned the repo and then ran: > > $ git am 20250620_zhao1_liu_i386_cpu_unify_the_cache_model_in_x86cpustate.mbx > Hi Ewan, no need to apply any patches on that branch "cache-model-v2.6-rebase-06-23-2025", since this branch has already contained all my patches. You could check the git log. Thanks, Zhao
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