Only the last patch is missing review (#26)

Since v2:
- Addressed thuth review comments

Since v1:
- Addressed rth's review comments

Omnibus series of ARM-related patches (noticed during the
"split accel" PoC work).

- Usual prototypes cleanups
- Check TCG for EL2/EL3 features (and not !KVM or !HVF)
- Improve HVF debugging
- Correct HVF 'dtb_compatible' value for Linux
- Fix HVF GTimer frequency (My M1 hardware has 24 MHz)
  (this implies accel/ rework w.r.t. QDev vCPU REALIZE)
- Expand functional tests w.r.t. HVF

Regards,

Phil.

Philippe Mathieu-Daudé (26):
  target/arm: Remove arm_handle_psci_call() stub
  target/arm: Reduce arm_cpu_post_init() declaration scope
  target/arm: Unify gen_exception_internal()
  target/arm/hvf: Simplify GIC hvf_arch_init_vcpu()
  target/arm/hvf: Directly re-lock BQL after hv_vcpu_run()
  target/arm/hvf: Trace hv_vcpu_run() failures
  accel/hvf: Trace VM memory mapping
  target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event
  target/arm: Correct KVM & HVF dtb_compatible value
  accel/hvf: Model PhysTimer register
  target/arm/hvf: Pass @target_el argument to hvf_raise_exception()
  target/arm: Restrict system register properties to system binary
  target/arm: Create GTimers *after* features finalized / accel realized
  accel: Keep reference to AccelOpsClass in AccelClass
  accel: Introduce AccelOpsClass::cpu_target_realize() hook
  accel/hvf: Add hvf_arch_cpu_realize() stubs
  target/arm/hvf: Really set Generic Timer counter frequency
  hw/arm/virt: Only require TCG || QTest to use TrustZone
  hw/arm/virt: Only require TCG || QTest to use virtualization extension
  hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()
  hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition
  tests/functional: Set sbsa-ref machine type in each test function
  tests/functional: Restrict nested Aarch64 Xen test to TCG
  tests/functional: Require TCG to run Aarch64 imx8mp-evk test
  tests/functional: Add hvf_available() helper
  tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator

 meson.build                                   |  1 +
 accel/hvf/trace.h                             |  2 +
 include/qemu/accel.h                          |  3 +
 include/system/accel-ops.h                    |  4 +-
 include/system/hvf.h                          |  3 +
 target/arm/cpu.h                              |  2 -
 target/arm/internals.h                        |  6 +-
 target/arm/tcg/translate.h                    |  1 +
 accel/accel-common.c                          |  4 +
 accel/accel-system.c                          |  3 +-
 accel/hvf/hvf-accel-ops.c                     |  8 ++
 accel/tcg/tcg-accel-ops.c                     |  4 +-
 hw/arm/sbsa-ref.c                             |  8 +-
 hw/arm/virt.c                                 |  9 +-
 target/arm/cpu.c                              | 78 +++++++++--------
 target/arm/hvf/hvf.c                          | 86 ++++++++++++-------
 target/arm/kvm.c                              |  2 +-
 target/arm/tcg/translate-a64.c                |  6 --
 target/arm/tcg/translate.c                    |  2 +-
 target/i386/hvf/hvf.c                         |  5 ++
 accel/hvf/trace-events                        |  7 ++
 python/qemu/utils/__init__.py                 |  2 +-
 python/qemu/utils/accel.py                    |  8 ++
 target/arm/hvf/trace-events                   |  5 +-
 tests/functional/qemu_test/testcase.py        |  6 +-
 tests/functional/test_aarch64_imx8mp_evk.py   |  1 +
 tests/functional/test_aarch64_sbsaref.py      |  5 +-
 .../functional/test_aarch64_sbsaref_alpine.py |  3 +-
 .../test_aarch64_sbsaref_freebsd.py           |  3 +-
 tests/functional/test_aarch64_smmu.py         | 12 ++-
 tests/functional/test_aarch64_xen.py          |  1 +
 31 files changed, 186 insertions(+), 104 deletions(-)
 create mode 100644 accel/hvf/trace.h
 create mode 100644 accel/hvf/trace-events

-- 
2.49.0

Ping? (series fully reviewed)

On 23/6/25 14:18, Philippe Mathieu-Daudé wrote:

> Philippe Mathieu-Daudé (26):
>    target/arm: Remove arm_handle_psci_call() stub
>    target/arm: Reduce arm_cpu_post_init() declaration scope
>    target/arm: Unify gen_exception_internal()
>    target/arm/hvf: Simplify GIC hvf_arch_init_vcpu()
>    target/arm/hvf: Directly re-lock BQL after hv_vcpu_run()
>    target/arm/hvf: Trace hv_vcpu_run() failures
>    accel/hvf: Trace VM memory mapping
>    target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event
>    target/arm: Correct KVM & HVF dtb_compatible value
>    accel/hvf: Model PhysTimer register
>    target/arm/hvf: Pass @target_el argument to hvf_raise_exception()
>    target/arm: Restrict system register properties to system binary
>    target/arm: Create GTimers *after* features finalized / accel realized
>    accel: Keep reference to AccelOpsClass in AccelClass
>    accel: Introduce AccelOpsClass::cpu_target_realize() hook
>    accel/hvf: Add hvf_arch_cpu_realize() stubs
>    target/arm/hvf: Really set Generic Timer counter frequency
>    hw/arm/virt: Only require TCG || QTest to use TrustZone
>    hw/arm/virt: Only require TCG || QTest to use virtualization extension
>    hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()
>    hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition
>    tests/functional: Set sbsa-ref machine type in each test function
>    tests/functional: Restrict nested Aarch64 Xen test to TCG
>    tests/functional: Require TCG to run Aarch64 imx8mp-evk test
>    tests/functional: Add hvf_available() helper
>    tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator

On Mon, 23 Jun 2025 at 13:18, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Only the last patch is missing review (#26)
>
> Since v2:
> - Addressed thuth review comments
>
> Since v1:
> - Addressed rth's review comments
>
> Omnibus series of ARM-related patches (noticed during the
> "split accel" PoC work).
>
> - Usual prototypes cleanups
> - Check TCG for EL2/EL3 features (and not !KVM or !HVF)
> - Improve HVF debugging
> - Correct HVF 'dtb_compatible' value for Linux
> - Fix HVF GTimer frequency (My M1 hardware has 24 MHz)
>   (this implies accel/ rework w.r.t. QDev vCPU REALIZE)
> - Expand functional tests w.r.t. HVF
>
> Regards,
>
> Phil.

Hi; I've applied these to target-arm.next:

> Philippe Mathieu-Daudé (26):
>   target/arm: Remove arm_handle_psci_call() stub
>   target/arm: Reduce arm_cpu_post_init() declaration scope
>   target/arm: Unify gen_exception_internal()
>   target/arm/hvf: Directly re-lock BQL after hv_vcpu_run()
>   target/arm/hvf: Trace hv_vcpu_run() failures
>   accel/hvf: Trace VM memory mapping
>   target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event
>   target/arm: Correct KVM & HVF dtb_compatible value
>   target/arm/hvf: Pass @target_el argument to hvf_raise_exception()
>   target/arm: Restrict system register properties to system binary
>   hw/arm/virt: Only require TCG || QTest to use TrustZone
>   hw/arm/virt: Only require TCG || QTest to use virtualization extension
>   hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()
>   hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition
>   tests/functional: Set sbsa-ref machine type in each test function
>   tests/functional: Restrict nested Aarch64 Xen test to TCG
>   tests/functional: Require TCG to run Aarch64 imx8mp-evk test
>   tests/functional: Add hvf_available() helper
>   tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator

Where I haven't picked up a patch it doesn't mean I'm
rejecting it, just that I don't have time to think through
the more complicated ones this week, and I wanted to at least
take the easy patches to reduce the size of your patchset.

-- PMM

On 1/7/25 12:16, Peter Maydell wrote:

> Hi; I've applied these to target-arm.next:
> 
>> Philippe Mathieu-Daudé (26):
>>    target/arm: Remove arm_handle_psci_call() stub
>>    target/arm: Reduce arm_cpu_post_init() declaration scope
>>    target/arm: Unify gen_exception_internal()
>>    target/arm/hvf: Directly re-lock BQL after hv_vcpu_run()
>>    target/arm/hvf: Trace hv_vcpu_run() failures
>>    accel/hvf: Trace VM memory mapping
>>    target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event
>>    target/arm: Correct KVM & HVF dtb_compatible value
>>    target/arm/hvf: Pass @target_el argument to hvf_raise_exception()
>>    target/arm: Restrict system register properties to system binary
>>    hw/arm/virt: Only require TCG || QTest to use TrustZone
>>    hw/arm/virt: Only require TCG || QTest to use virtualization extension
>>    hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()
>>    hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition
>>    tests/functional: Set sbsa-ref machine type in each test function
>>    tests/functional: Restrict nested Aarch64 Xen test to TCG
>>    tests/functional: Require TCG to run Aarch64 imx8mp-evk test
>>    tests/functional: Add hvf_available() helper
>>    tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator
> 
> Where I haven't picked up a patch it doesn't mean I'm
> rejecting it, just that I don't have time to think through
> the more complicated ones this week, and I wanted to at least
> take the easy patches to reduce the size of your patchset.

Thank you, appreciated!