[PATCH v2 016/101] target/arm: Add ZT0

Richard Henderson posted 101 patches 4 months, 3 weeks ago
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Laurent Vivier <laurent@vivier.eu>, Peter Maydell <peter.maydell@linaro.org>
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[PATCH v2 016/101] target/arm: Add ZT0
Posted by Richard Henderson 4 months, 3 weeks ago
This is a 512-bit array introduced with SME2.
Save it only when ZA is in use.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h     |  3 +++
 target/arm/machine.c | 20 ++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 052ca20283..465fc188d0 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -715,6 +715,9 @@ typedef struct CPUArchState {
     uint64_t scxtnum_el[4];
 
     struct {
+        /* SME2 ZT0 -- 512 bit array, with data ordered like ARMVectorReg. */
+        uint64_t zt0[512 / 64] QEMU_ALIGNED(16);
+
         /*
          * SME ZA storage -- 256 x 256 byte array, with bytes in host
          * word order, as we do with vfp.zregs[].  This corresponds to
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 6e73368ef9..6986915bee 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -321,6 +321,25 @@ static const VMStateDescription vmstate_za = {
     }
 };
 
+static bool zt0_needed(void *opaque)
+{
+    ARMCPU *cpu = opaque;
+
+    return za_needed(cpu) && cpu_isar_feature(aa64_sme2, cpu);
+}
+
+static const VMStateDescription vmstate_zt0 = {
+    .name = "cpu/zt0",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .needed = zt0_needed,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT64_ARRAY(env.za_state.zt0, ARMCPU,
+                             ARRAY_SIZE(((CPUARMState *)0)->za_state.zt0)),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static bool serror_needed(void *opaque)
 {
     ARMCPU *cpu = opaque;
@@ -1096,6 +1115,7 @@ const VMStateDescription vmstate_arm_cpu = {
         &vmstate_m_security,
         &vmstate_sve,
         &vmstate_za,
+        &vmstate_zt0,
         &vmstate_serror,
         &vmstate_irq_line_state,
         &vmstate_wfxt_timer,
-- 
2.43.0
Re: [PATCH v2 016/101] target/arm: Add ZT0
Posted by Peter Maydell 4 months, 3 weeks ago
On Sun, 22 Jun 2025 at 00:55, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This is a 512-bit array introduced with SME2.
> Save it only when ZA is in use.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/cpu.h     |  3 +++
>  target/arm/machine.c | 20 ++++++++++++++++++++
>  2 files changed, 23 insertions(+)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 052ca20283..465fc188d0 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -715,6 +715,9 @@ typedef struct CPUArchState {
>      uint64_t scxtnum_el[4];
>
>      struct {
> +        /* SME2 ZT0 -- 512 bit array, with data ordered like ARMVectorReg. */
> +        uint64_t zt0[512 / 64] QEMU_ALIGNED(16);
> +
>          /*
>           * SME ZA storage -- 256 x 256 byte array, with bytes in host
>           * word order, as we do with vfp.zregs[].  This corresponds to
> diff --git a/target/arm/machine.c b/target/arm/machine.c
> index 6e73368ef9..6986915bee 100644
> --- a/target/arm/machine.c
> +++ b/target/arm/machine.c
> @@ -321,6 +321,25 @@ static const VMStateDescription vmstate_za = {
>      }
>  };
>
> +static bool zt0_needed(void *opaque)
> +{
> +    ARMCPU *cpu = opaque;
> +
> +    return za_needed(cpu) && cpu_isar_feature(aa64_sme2, cpu);
> +}
> +
> +static const VMStateDescription vmstate_zt0 = {
> +    .name = "cpu/zt0",
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .needed = zt0_needed,
> +    .fields = (VMStateField[]) {
> +        VMSTATE_UINT64_ARRAY(env.za_state.zt0, ARMCPU,
> +                             ARRAY_SIZE(((CPUARMState *)0)->za_state.zt0)),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};

I wonder if we should have an ARRAY_FIELD_SIZE(), to do
the equivalent of sizeof_field()... Though we have no
uses of the written-out form currently, so it might be
a bit too niche.

Anyway
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM