Support the Frequency Counter Control register for AST2700

[PATCH v1 1/2] hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700

Posted by Jamin Lin via 7 months, 3 weeks ago

On AST2700 SoC, QEMU now sets BIT6 in VGA0 SCRATCH register to indicate
that DDR training has completed, thus skipping the dram_init().

To align with the recent U-Boot changes, where the Main Control Register's
BIT16 is checked to skip the dram_init() process, this patch sets BIT16 in
the SDMC Main Control Register at reset time.

This allows both the main U-Boot stage to correctly detect and bypass DRAM
initialization when running under QEMU.

Reference:
- QEMU: https://github.com/qemu/qemu/commit/2d082fea485ee455a70ed3e963cdf9a70f34858a
- U-Boot: https://github.com/AspeedTech-BMC/u-boot/commit/94e5435504fb0d8888f5c1bfd3fa284cdd6aaf9b

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/misc/aspeed_sdmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index f04d9930dd..dff7cc362d 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -570,6 +570,9 @@ static void aspeed_2700_sdmc_reset(DeviceState *dev)
     /* Set ram size bit and defaults values */
     s->regs[R_MAIN_CONF] = asc->compute_conf(s, 0);
 
+    /* Skipping dram init */
+    s->regs[R_MAIN_CONTROL] = BIT(16);
+
     if (s->unlocked) {
         s->regs[R_2700_PROT] = PROT_UNLOCKED;
     }
-- 
2.43.0

Re: [PATCH v1 1/2] hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700

Posted by Cédric Le Goater 7 months, 3 weeks ago

On 6/18/25 10:00, Jamin Lin wrote:
> On AST2700 SoC, QEMU now sets BIT6 in VGA0 SCRATCH register to indicate
> that DDR training has completed, thus skipping the dram_init().
> 
> To align with the recent U-Boot changes, where the Main Control Register's
> BIT16 is checked to skip the dram_init() process, this patch sets BIT16 in
> the SDMC Main Control Register at reset time.
> 
> This allows both the main U-Boot stage to correctly detect and bypass DRAM
> initialization when running under QEMU.
> 
> Reference:
> - QEMU: https://github.com/qemu/qemu/commit/2d082fea485ee455a70ed3e963cdf9a70f34858a
> - U-Boot: https://github.com/AspeedTech-BMC/u-boot/commit/94e5435504fb0d8888f5c1bfd3fa284cdd6aaf9b
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/misc/aspeed_sdmc.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
> index f04d9930dd..dff7cc362d 100644
> --- a/hw/misc/aspeed_sdmc.c
> +++ b/hw/misc/aspeed_sdmc.c
> @@ -570,6 +570,9 @@ static void aspeed_2700_sdmc_reset(DeviceState *dev)
>       /* Set ram size bit and defaults values */
>       s->regs[R_MAIN_CONF] = asc->compute_conf(s, 0);
>   
> +    /* Skipping dram init */
> +    s->regs[R_MAIN_CONTROL] = BIT(16);
> +
>       if (s->unlocked) {
>           s->regs[R_2700_PROT] = PROT_UNLOCKED;
>       }

[PATCH v1 1/2] hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700
[PATCH v1 2/2] hw/misc/aspeed_scu: Support the Frequency Counter Control register for AST2700