This series enhances Xilinx ZynqMP support to allow booting on RPUs.

It was validated with home-made binaries. FreeRTOS was tested but without
success: outputs/IRQ seems broken. AFAICT, FreeRTOS is expecting Xilinx's
QEMU thus I didn't investigate further. I'd still like advice on the 3rd
patch ("wire a second GIC") since it could be related to it.

Changes sinve v2:
 - address review for patch 3 (typo, create function to compute num_rpus,
   simplify num_rpus usage).
 - remove patch 4 (swapping cluster ids)

Changes since v1:
 - add doc for "first-cpu-index" new property in arm_gic.h.

Clément Chigot (1):
  hw/arm: make cpu targeted by arm_load_kernel the primary CPU.

Frederic Konrad (2):
  hw/intc/arm_gic: introduce a first-cpu-index property
  hw/arm/xlnx-zynqmp: wire a second GIC for the Cortex-R5

 hw/arm/boot.c                    |  15 +++--
 hw/arm/xlnx-zynqmp.c             | 103 ++++++++++++++++++++++++++++---
 hw/intc/arm_gic.c                |   2 +-
 hw/intc/arm_gic_common.c         |   1 +
 include/hw/arm/boot.h            |   3 +
 include/hw/arm/xlnx-zynqmp.h     |   5 ++
 include/hw/intc/arm_gic.h        |   2 +
 include/hw/intc/arm_gic_common.h |   2 +
 8 files changed, 114 insertions(+), 19 deletions(-)

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2.34.1