[v1] i3c: aspeed: Add I3C support

[PATCH 09/19] hw/i3c/dw-i3c: Treat more registers as read-as-zero

Joe Komlodi posted 19 patches 8 months ago

Diff against v1 v2 v3 v4
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Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, "Cédric Le Goater" <clg@kaod.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, "Daniel P. Berrangé" <berrange@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>

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[PATCH 09/19] hw/i3c/dw-i3c: Treat more registers as read-as-zero

Posted by Joe Komlodi 8 months ago

RESET_CTRL and INTR_FORCE are write-only.

Signed-off-by: Joe Komlodi <komlodi@google.com>

Reviewed-by: Patrick Venture <venture@google.com>
---
 hw/i3c/dw-i3c.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c
index 4f40f999f4..bf51c00935 100644
--- a/hw/i3c/dw-i3c.c
+++ b/hw/i3c/dw-i3c.c
@@ -359,7 +359,10 @@ static uint64_t dw_i3c_read(void *opaque, hwaddr offset, unsigned size)
     uint64_t value;
 
     switch (addr) {
+    /* RAZ */
     case R_COMMAND_QUEUE_PORT:
+    case R_RESET_CTRL:
+    case R_INTR_FORCE:
         value = 0;
         break;
     default:
-- 
2.50.0.rc1.591.g9c95f17f64-goog

RE: [PATCH 09/19] hw/i3c/dw-i3c: Treat more registers as read-as-zero

Posted by Jamin Lin 1 month ago

> Subject: [PATCH 09/19] hw/i3c/dw-i3c: Treat more registers as read-as-zero
> 
> RESET_CTRL and INTR_FORCE are write-only.
> 
> Signed-off-by: Joe Komlodi <komlodi@google.com>
> 
> Reviewed-by: Patrick Venture <venture@google.com>
> ---
>  hw/i3c/dw-i3c.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c index 4f40f999f4..bf51c00935
> 100644
> --- a/hw/i3c/dw-i3c.c
> +++ b/hw/i3c/dw-i3c.c
> @@ -359,7 +359,10 @@ static uint64_t dw_i3c_read(void *opaque, hwaddr
> offset, unsigned size)
>      uint64_t value;
> 
>      switch (addr) {
> +    /* RAZ */
>      case R_COMMAND_QUEUE_PORT:
> +    case R_RESET_CTRL:
> +    case R_INTR_FORCE:
>          value = 0;
>          break;
>      default:
> --
> 2.50.0.rc1.591.g9c95f17f64-goog


Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>

Thanks,
Jamin