[PATCH 08/10] hw/loongarch: Implement avec set_irq

Song Gao posted 10 patches 5 months, 1 week ago
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Song Gao <gaosong@loongson.cn>, Bibo Mao <maobibo@loongson.cn>, Jiaxun Yang <jiaxun.yang@flygoat.com>
There is a newer version of this series
[PATCH 08/10] hw/loongarch: Implement avec set_irq
Posted by Song Gao 5 months, 1 week ago
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_avec.c | 37 ++++++++++++++++++++++++++++++++++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/hw/intc/loongarch_avec.c b/hw/intc/loongarch_avec.c
index c692fef43c..f609ed9aaa 100644
--- a/hw/intc/loongarch_avec.c
+++ b/hw/intc/loongarch_avec.c
@@ -16,6 +16,12 @@
 #include "migration/vmstate.h"
 #include "trace.h"
 #include "hw/qdev-properties.h"
+#include "target/loongarch/cpu.h"
+
+/* msg addr field */
+FIELD(MSG_ADDR, IRQ_NUM, 4, 8)
+FIELD(MSG_ADDR, CPU_NUM, 12, 8)
+FIELD(MSG_ADDR, FIX, 28, 12)
 
 static uint64_t loongarch_avec_mem_read(void *opaque,
                                         hwaddr addr, unsigned size)
@@ -23,12 +29,32 @@ static uint64_t loongarch_avec_mem_read(void *opaque,
     return 0;
 }
 
+static void avec_set_irq(LoongArchAVECState *s, int cpu_num, int irq_num, int level)
+{
+   MachineState *machine = MACHINE(qdev_get_machine());
+   MachineClass *mc = MACHINE_GET_CLASS(machine);
+   const CPUArchIdList *id_list = NULL;
+
+   assert(mc->possible_cpu_arch_ids(machine));
+   id_list = mc->possible_cpu_arch_ids(machine);
+   CPUState *cpu = id_list->cpus[cpu_num].cpu;
+   CPULoongArchState *env = &LOONGARCH_CPU(cpu)->env;
+   set_bit(irq_num, &env->CSR_MSGIS[irq_num / 64]);
+   qemu_set_irq(s->cpu[cpu_num].parent_irq[irq_num], 1);
+}
+
 static void loongarch_avec_mem_write(void *opaque, hwaddr addr,
                                      uint64_t val, unsigned size)
 {
-    return;
-}
+    int irq_num, cpu_num = 0;
+    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
+    uint64_t msg_addr = addr + VIRT_PCH_MSI_ADDR_LOW;
+
+    cpu_num = FIELD_EX64(msg_addr, MSG_ADDR, IRQ_NUM);
+    irq_num = FIELD_EX64(msg_addr, MSG_ADDR, CPU_NUM);
 
+    avec_set_irq(s, cpu_num, irq_num, 1);
+}
 
 static const MemoryRegionOps loongarch_avec_ops = {
     .read = loongarch_avec_mem_read,
@@ -38,7 +64,12 @@ static const MemoryRegionOps loongarch_avec_ops = {
 
 static void avec_irq_handler(void *opaque, int irq, int level)
 {
-    return;
+    int cpu_num, irq_num = 0;
+    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
+    cpu_num = irq / 256;
+    irq_num = irq % 256;
+
+    avec_set_irq(s, cpu_num, irq_num, level);
 }
 
 static void loongarch_avec_realize(DeviceState *dev, Error **errp)
-- 
2.34.1
Re: [PATCH 08/10] hw/loongarch: Implement avec set_irq
Posted by Bibo Mao 5 months, 1 week ago

On 2025/6/9 下午6:48, Song Gao wrote:
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
>   hw/intc/loongarch_avec.c | 37 ++++++++++++++++++++++++++++++++++---
>   1 file changed, 34 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/intc/loongarch_avec.c b/hw/intc/loongarch_avec.c
> index c692fef43c..f609ed9aaa 100644
> --- a/hw/intc/loongarch_avec.c
> +++ b/hw/intc/loongarch_avec.c
> @@ -16,6 +16,12 @@
>   #include "migration/vmstate.h"
>   #include "trace.h"
>   #include "hw/qdev-properties.h"
> +#include "target/loongarch/cpu.h"
> +
> +/* msg addr field */
> +FIELD(MSG_ADDR, IRQ_NUM, 4, 8)
> +FIELD(MSG_ADDR, CPU_NUM, 12, 8)
> +FIELD(MSG_ADDR, FIX, 28, 12)
>   
>   static uint64_t loongarch_avec_mem_read(void *opaque,
>                                           hwaddr addr, unsigned size)
> @@ -23,12 +29,32 @@ static uint64_t loongarch_avec_mem_read(void *opaque,
>       return 0;
>   }
>   
> +static void avec_set_irq(LoongArchAVECState *s, int cpu_num, int irq_num, int level)
> +{
> +   MachineState *machine = MACHINE(qdev_get_machine());
> +   MachineClass *mc = MACHINE_GET_CLASS(machine);
> +   const CPUArchIdList *id_list = NULL;
> +
> +   assert(mc->possible_cpu_arch_ids(machine));
> +   id_list = mc->possible_cpu_arch_ids(machine);
> +   CPUState *cpu = id_list->cpus[cpu_num].cpu;
> +   CPULoongArchState *env = &LOONGARCH_CPU(cpu)->env;
The format is strange here. Variable env is declared after normal 
sentence, there is such issue in many places.
      id_list = mc->possible_cpu_arch_ids(machine);

> +   set_bit(irq_num, &env->CSR_MSGIS[irq_num / 64]);
> +   qemu_set_irq(s->cpu[cpu_num].parent_irq[irq_num], 1);
Why is parent_irq array here?  I think one parent irq line is enough.

> +}
> +
>   static void loongarch_avec_mem_write(void *opaque, hwaddr addr,
>                                        uint64_t val, unsigned size)
>   {
> -    return;
> -}
> +    int irq_num, cpu_num = 0;
> +    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
> +    uint64_t msg_addr = addr + VIRT_PCH_MSI_ADDR_LOW;
> +
> +    cpu_num = FIELD_EX64(msg_addr, MSG_ADDR, IRQ_NUM);
> +    irq_num = FIELD_EX64(msg_addr, MSG_ADDR, CPU_NUM);
>   
blank line here.
> +    avec_set_irq(s, cpu_num, irq_num, 1);
> +}
>   
>   static const MemoryRegionOps loongarch_avec_ops = {
>       .read = loongarch_avec_mem_read,
> @@ -38,7 +64,12 @@ static const MemoryRegionOps loongarch_avec_ops = {
>   
>   static void avec_irq_handler(void *opaque, int irq, int level)
>   {
> -    return;
> +    int cpu_num, irq_num = 0;
> +    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
> +    cpu_num = irq / 256;
> +    irq_num = irq % 256;
> +
> +    avec_set_irq(s, cpu_num, irq_num, level);
>   }
When is the function avec_irq_handler() called?

Regards
Bibo Mao
>   
>   static void loongarch_avec_realize(DeviceState *dev, Error **errp)
> 


Re: [PATCH 08/10] hw/loongarch: Implement avec set_irq
Posted by gaosong 5 months ago
在 2025/6/11 下午2:26, Bibo Mao 写道:
>
>
> On 2025/6/9 下午6:48, Song Gao wrote:
>> Signed-off-by: Song Gao <gaosong@loongson.cn>
>> ---
>>   hw/intc/loongarch_avec.c | 37 ++++++++++++++++++++++++++++++++++---
>>   1 file changed, 34 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/intc/loongarch_avec.c b/hw/intc/loongarch_avec.c
>> index c692fef43c..f609ed9aaa 100644
>> --- a/hw/intc/loongarch_avec.c
>> +++ b/hw/intc/loongarch_avec.c
>> @@ -16,6 +16,12 @@
>>   #include "migration/vmstate.h"
>>   #include "trace.h"
>>   #include "hw/qdev-properties.h"
>> +#include "target/loongarch/cpu.h"
>> +
>> +/* msg addr field */
>> +FIELD(MSG_ADDR, IRQ_NUM, 4, 8)
>> +FIELD(MSG_ADDR, CPU_NUM, 12, 8)
>> +FIELD(MSG_ADDR, FIX, 28, 12)
>>     static uint64_t loongarch_avec_mem_read(void *opaque,
>>                                           hwaddr addr, unsigned size)
>> @@ -23,12 +29,32 @@ static uint64_t loongarch_avec_mem_read(void 
>> *opaque,
>>       return 0;
>>   }
>>   +static void avec_set_irq(LoongArchAVECState *s, int cpu_num, int 
>> irq_num, int level)
>> +{
>> +   MachineState *machine = MACHINE(qdev_get_machine());
>> +   MachineClass *mc = MACHINE_GET_CLASS(machine);
>> +   const CPUArchIdList *id_list = NULL;
>> +
>> +   assert(mc->possible_cpu_arch_ids(machine));
>> +   id_list = mc->possible_cpu_arch_ids(machine);
>> +   CPUState *cpu = id_list->cpus[cpu_num].cpu;
>> +   CPULoongArchState *env = &LOONGARCH_CPU(cpu)->env;
> The format is strange here. Variable env is declared after normal 
> sentence, there is such issue in many places.
>      id_list = mc->possible_cpu_arch_ids(machine);
>
>> +   set_bit(irq_num, &env->CSR_MSGIS[irq_num / 64]);
>> +   qemu_set_irq(s->cpu[cpu_num].parent_irq[irq_num], 1);
> Why is parent_irq array here?  I think one parent irq line is enough.
>
ok , i'll correct on v3.
>> +}
>> +
>>   static void loongarch_avec_mem_write(void *opaque, hwaddr addr,
>>                                        uint64_t val, unsigned size)
>>   {
>> -    return;
>> -}
>> +    int irq_num, cpu_num = 0;
>> +    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
>> +    uint64_t msg_addr = addr + VIRT_PCH_MSI_ADDR_LOW;
>> +
>> +    cpu_num = FIELD_EX64(msg_addr, MSG_ADDR, IRQ_NUM);
>> +    irq_num = FIELD_EX64(msg_addr, MSG_ADDR, CPU_NUM);
> blank line here.
Got it.
>> +    avec_set_irq(s, cpu_num, irq_num, 1);
>> +}
>>     static const MemoryRegionOps loongarch_avec_ops = {
>>       .read = loongarch_avec_mem_read,
>> @@ -38,7 +64,12 @@ static const MemoryRegionOps loongarch_avec_ops = {
>>     static void avec_irq_handler(void *opaque, int irq, int level)
>>   {
>> -    return;
>> +    int cpu_num, irq_num = 0;
>> +    LoongArchAVECState *s = LOONGARCH_AVEC(opaque);
>> +    cpu_num = irq / 256;
>> +    irq_num = irq % 256;
>> +
>> +    avec_set_irq(s, cpu_num, irq_num, level);
>>   }
> When is the function avec_irq_handler() called?
>
when some deviec gpio_out connect to avec gpio_in, since we define the 
avec qdev_init_gpio_in at
avec realize  and the avec_Irq_handler is the callback function.

Thanks.
Song Gao
> Regards
> Bibo Mao
>>     static void loongarch_avec_realize(DeviceState *dev, Error **errp)
>>