[RFC PATCH v2 0/2] cxl: Support creation of a new CXL Host Bridge

wangyuquan posted 2 patches 5 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250530103320.534173-1-wangyuquan1236@phytium.com.cn
Maintainers: Jonathan Cameron <jonathan.cameron@huawei.com>, Fan Ni <fan.ni@samsung.com>, "Michael S. Tsirkin" <mst@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
There is a newer version of this series
hw/cxl/cxl-host-stubs.c               |   2 +
hw/cxl/cxl-host.c                     |  66 +++++++++---
hw/pci-bridge/pci_expander_bridge.c   |   8 +-
hw/pci-host/cxl.c                     | 145 ++++++++++++++++++++++++++
hw/pci-host/meson.build               |   1 +
include/hw/cxl/cxl.h                  |   7 +-
include/hw/cxl/cxl_host.h             |   2 +
include/hw/pci-host/cxl_host_bridge.h |  25 +++++
8 files changed, 234 insertions(+), 22 deletions(-)
create mode 100644 hw/pci-host/cxl.c
create mode 100644 include/hw/pci-host/cxl_host_bridge.h
[RFC PATCH v2 0/2] cxl: Support creation of a new CXL Host Bridge
Posted by wangyuquan 5 months, 2 weeks ago
v1 -> v2:
- Move the code of new bridge to hw/pci-host/cxl.c
- Fix and simplify some logic on handling the different bridge types

Background
==========
Currently the base CXL support for arm platforms is only on Jonathan's
patches[1]. Some platform like SBSA-REF can be more like a real machine,
thus the support of cxl could be meaningful. However, the pxb-cxl-host
realization on this platform seems not satisfying their requirements[2].

New CXL HOST design
===================
This work defines a new cxl host bridge type (TYPE_CXL_HOST). This
could be considered as a prototype of an independent cxl host bridge
which combines gpex features (ecam, mmio windows & irq) and CXL features.

The root bus path of CXL_HOST is "0001:00", that would not affect the
original pcie host topology. In the previous, the pxb-cxl-host with
any cxl root ports and cxl endpoint devices would occupy the BDF
number of the original pcie domain. This new type provide a solution
to resolve the problem.

Remaining problems
==================
I tried to use 'object_resolve_path' but it could not work in
'cxl_fmws_link_targets', so I used 'TYPE_DEVICE' to match that.

Yuquan Wang (2):
  hw/pxb-cxl: Rename the pxb cxl host bridge
  pci-host/cxl: Support creation of a new CXL Host Bridge

 hw/cxl/cxl-host-stubs.c               |   2 +
 hw/cxl/cxl-host.c                     |  66 +++++++++---
 hw/pci-bridge/pci_expander_bridge.c   |   8 +-
 hw/pci-host/cxl.c                     | 145 ++++++++++++++++++++++++++
 hw/pci-host/meson.build               |   1 +
 include/hw/cxl/cxl.h                  |   7 +-
 include/hw/cxl/cxl_host.h             |   2 +
 include/hw/pci-host/cxl_host_bridge.h |  25 +++++
 8 files changed, 234 insertions(+), 22 deletions(-)
 create mode 100644 hw/pci-host/cxl.c
 create mode 100644 include/hw/pci-host/cxl_host_bridge.h

-- 
2.34.1