[PATCH v2 0/7] amd_iommu: Fixes to align with AMDVi specification

Alejandro Jimenez posted 7 patches 5 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250528221725.3554040-1-alejandro.j.jimenez@oracle.com
Maintainers: "Michael S. Tsirkin" <mst@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Eduardo Habkost <eduardo@habkost.net>
There is a newer version of this series
hw/i386/amd_iommu.c | 15 ++++++------
hw/i386/amd_iommu.h | 59 ++++++++++++++++++++++-----------------------
2 files changed, 37 insertions(+), 37 deletions(-)
[PATCH v2 0/7] amd_iommu: Fixes to align with AMDVi specification
Posted by Alejandro Jimenez 5 months, 2 weeks ago
Correct mistakes in bitmasks, offsets, decoding of fields, and behavior that
do not match the latest AMD I/O Virtualization Technology (IOMMU)
Specification. These bugs do not trigger problems today in the limited mode
of operation supported by the AMD vIOMMU (passthrough), but upcoming
functionality and tests will require them (and additional fixes).

These are all minor and hopefully not controversial fixes, so I am sending
them separately rather than including them on the DMA remap support
series[0].

It is unclear how relevant these changes will be to stable releases
considering the state of the AMD vIOMMU, but the fixes on this series should
be simple enough to apply, so I Cc'd stable for consideration.

Changes since v1[1]:
- Added R-b's from Vasant on PATCH 1-3, 5.
- P3: Match the spec, although vIOMMU case does not use DTE[3] (Vasant)
- P4: Fix more definitions using GENMASK64 for consistency. (Sairaj, Vasant)
- Dropped PATCH 6 from v1 and included it in DMA remap series[0] (Vasant: I
didn't want to assume approval so I dropped your R-b for this patch when
moving it to the other series).
- Fix issue with mask that retrieves the IRT pointer from DTE.
- Remove duplicated code. Although trivial, I didn't want to sneak this into
other unrelated commits.

Tested booting guest with AMD vIOMMU and guest kernel in passthrough mode.

Thank you,
Alejandro

[0] https://lore.kernel.org/qemu-devel/20250502021605.1795985-20-alejandro.j.jimenez@oracle.com/
[1] https://lore.kernel.org/all/20250311152446.45086-1-alejandro.j.jimenez@oracle.com/

Alejandro Jimenez (7):
  amd_iommu: Fix Miscellanous Information Register 0 offsets
  amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command
  amd_iommu: Update bitmasks representing DTE reserved fields
  amd_iommu: Fix masks for various IOMMU MMIO Registers
  amd_iommu: Fix mask to retrieve Interrupt Table Root Pointer from DTE
  amd_iommu: Fix the calculation for Device Table size
  amd_iommu: Remove duplicated definitions

 hw/i386/amd_iommu.c | 15 ++++++------
 hw/i386/amd_iommu.h | 59 ++++++++++++++++++++++-----------------------
 2 files changed, 37 insertions(+), 37 deletions(-)


base-commit: 80db93b2b88f9b3ed8927ae7ac74ca30e643a83e
-- 
2.43.5
Re: [PATCH v2 0/7] amd_iommu: Fixes to align with AMDVi specification
Posted by Vasant Hegde 5 months, 2 weeks ago
Hi,

On 5/29/2025 3:47 AM, Alejandro Jimenez wrote:
> Correct mistakes in bitmasks, offsets, decoding of fields, and behavior that
> do not match the latest AMD I/O Virtualization Technology (IOMMU)
> Specification. These bugs do not trigger problems today in the limited mode
> of operation supported by the AMD vIOMMU (passthrough), but upcoming
> functionality and tests will require them (and additional fixes).
> 
> These are all minor and hopefully not controversial fixes, so I am sending
> them separately rather than including them on the DMA remap support
> series[0].

Thanks a lot Alejandro. These are very useful/important cleanup/fixes.
We have some more cleanup/fixes. We will base it on top of this series.

-Vasant



> 
> It is unclear how relevant these changes will be to stable releases
> considering the state of the AMD vIOMMU, but the fixes on this series should
> be simple enough to apply, so I Cc'd stable for consideration.
> 
> Changes since v1[1]:
> - Added R-b's from Vasant on PATCH 1-3, 5.
> - P3: Match the spec, although vIOMMU case does not use DTE[3] (Vasant)
> - P4: Fix more definitions using GENMASK64 for consistency. (Sairaj, Vasant)
> - Dropped PATCH 6 from v1 and included it in DMA remap series[0] (Vasant: I
> didn't want to assume approval so I dropped your R-b for this patch when
> moving it to the other series).
> - Fix issue with mask that retrieves the IRT pointer from DTE.
> - Remove duplicated code. Although trivial, I didn't want to sneak this into
> other unrelated commits.
> 
> Tested booting guest with AMD vIOMMU and guest kernel in passthrough mode.
> 
> Thank you,
> Alejandro
> 
> [0] https://lore.kernel.org/qemu-devel/20250502021605.1795985-20-alejandro.j.jimenez@oracle.com/
> [1] https://lore.kernel.org/all/20250311152446.45086-1-alejandro.j.jimenez@oracle.com/
> 
> Alejandro Jimenez (7):
>   amd_iommu: Fix Miscellanous Information Register 0 offsets
>   amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command
>   amd_iommu: Update bitmasks representing DTE reserved fields
>   amd_iommu: Fix masks for various IOMMU MMIO Registers
>   amd_iommu: Fix mask to retrieve Interrupt Table Root Pointer from DTE
>   amd_iommu: Fix the calculation for Device Table size
>   amd_iommu: Remove duplicated definitions
> 
>  hw/i386/amd_iommu.c | 15 ++++++------
>  hw/i386/amd_iommu.h | 59 ++++++++++++++++++++++-----------------------
>  2 files changed, 37 insertions(+), 37 deletions(-)
> 
> 
> base-commit: 80db93b2b88f9b3ed8927ae7ac74ca30e643a83e
Re: [PATCH v2 0/7] amd_iommu: Fixes to align with AMDVi specification
Posted by Alejandro Jimenez 5 months, 2 weeks ago

On 5/29/25 1:26 AM, Vasant Hegde wrote:
> Hi,
> 
> On 5/29/2025 3:47 AM, Alejandro Jimenez wrote:
>> Correct mistakes in bitmasks, offsets, decoding of fields, and behavior that
>> do not match the latest AMD I/O Virtualization Technology (IOMMU)
>> Specification. These bugs do not trigger problems today in the limited mode
>> of operation supported by the AMD vIOMMU (passthrough), but upcoming
>> functionality and tests will require them (and additional fixes).
>>
>> These are all minor and hopefully not controversial fixes, so I am sending
>> them separately rather than including them on the DMA remap support
>> series[0].
> 
> Thanks a lot Alejandro. These are very useful/important cleanup/fixes.
> We have some more cleanup/fixes. We will base it on top of this series.
> 

Great, thank you for the quick reviews! Looking forward to your changes. 
I'll be out on vacation next week, but will try to review as soon as I 
am back online.

Alejandro
> -Vasant
> 
> 
> 
>>
>> It is unclear how relevant these changes will be to stable releases
>> considering the state of the AMD vIOMMU, but the fixes on this series should
>> be simple enough to apply, so I Cc'd stable for consideration.
>>
>> Changes since v1[1]:
>> - Added R-b's from Vasant on PATCH 1-3, 5.
>> - P3: Match the spec, although vIOMMU case does not use DTE[3] (Vasant)
>> - P4: Fix more definitions using GENMASK64 for consistency. (Sairaj, Vasant)
>> - Dropped PATCH 6 from v1 and included it in DMA remap series[0] (Vasant: I
>> didn't want to assume approval so I dropped your R-b for this patch when
>> moving it to the other series).
>> - Fix issue with mask that retrieves the IRT pointer from DTE.
>> - Remove duplicated code. Although trivial, I didn't want to sneak this into
>> other unrelated commits.
>>
>> Tested booting guest with AMD vIOMMU and guest kernel in passthrough mode.
>>
>> Thank you,
>> Alejandro
>>
>> [0] https://lore.kernel.org/qemu-devel/20250502021605.1795985-20-alejandro.j.jimenez@oracle.com/
>> [1] https://lore.kernel.org/all/20250311152446.45086-1-alejandro.j.jimenez@oracle.com/
>>
>> Alejandro Jimenez (7):
>>    amd_iommu: Fix Miscellanous Information Register 0 offsets
>>    amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command
>>    amd_iommu: Update bitmasks representing DTE reserved fields
>>    amd_iommu: Fix masks for various IOMMU MMIO Registers
>>    amd_iommu: Fix mask to retrieve Interrupt Table Root Pointer from DTE
>>    amd_iommu: Fix the calculation for Device Table size
>>    amd_iommu: Remove duplicated definitions
>>
>>   hw/i386/amd_iommu.c | 15 ++++++------
>>   hw/i386/amd_iommu.h | 59 ++++++++++++++++++++++-----------------------
>>   2 files changed, 37 insertions(+), 37 deletions(-)
>>
>>
>> base-commit: 80db93b2b88f9b3ed8927ae7ac74ca30e643a83e
>