v1: https://lore.kernel.org/qemu-devel/20250212220155.1147144-1-richard.henderson@linaro.org/

Use out-of-line helpers to implement extended address memory ops.
With this, we can reduce TARGET_LONG_BITS to the more natural 32
for this 32-bit cpu.

Changes for v2:
  - Handle alignment check inline, where we can pre-test MSR_EE
    and cfg->unaligned_exceptions.
  - Add both big and little-endian helpers, selected at translation.


r~


Richard Henderson (10):
  target/microblaze: Split out mb_unaligned_access_internal
  target/microblaze: Introduce helper_unaligned_access
  target/microblaze: Split out mb_transaction_failed_internal
  target/microblaze: Implement extended address load/store out of line
  target/microblaze: Use uint64_t for CPUMBState.ear
  target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
  target/microblaze: Fix printf format in mmu_translate
  target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
  target/microblaze: Drop DisasContext.r0
  target/microblaze: Simplify compute_ldst_addr_type{a,b}

 target/microblaze/cpu.h                  |   2 +-
 target/microblaze/helper.h               |  22 ++--
 target/microblaze/helper.c               |  71 ++++++++-----
 target/microblaze/mmu.c                  |   3 +-
 target/microblaze/op_helper.c            | 110 ++++++++++++++-----
 target/microblaze/translate.c            | 128 ++++++++++++-----------
 configs/targets/microblaze-softmmu.mak   |   4 +-
 configs/targets/microblazeel-softmmu.mak |   4 +-
 8 files changed, 214 insertions(+), 130 deletions(-)

-- 
2.43.0