Add RISCV ZALASR Extension

[PATCH 0/1] Add RISCV ZALASR Extension

Roan Richmond posted 1 patch 5 months, 4 weeks ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20250521091921.180094-1-roan.richmond@codethink.co.uk

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

target/riscv/cpu.c                           |   1 +
target/riscv/cpu_cfg.h                       |   1 +
target/riscv/insn32.decode                   |  10 ++
target/riscv/insn_trans/trans_rvzalasr.c.inc | 109 +++++++++++++++++++
target/riscv/translate.c                     |   1 +
5 files changed, 122 insertions(+)
create mode 100644 target/riscv/insn_trans/trans_rvzalasr.c.inc

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[PATCH 0/1] Add RISCV ZALASR Extension

Posted by Roan Richmond 5 months, 4 weeks ago

Ping, resending as no comments in over 2 weeks.

Roan Richmond (1):
  Add RISCV ZALASR extension

 target/riscv/cpu.c                           |   1 +
 target/riscv/cpu_cfg.h                       |   1 +
 target/riscv/insn32.decode                   |  10 ++
 target/riscv/insn_trans/trans_rvzalasr.c.inc | 109 +++++++++++++++++++
 target/riscv/translate.c                     |   1 +
 5 files changed, 122 insertions(+)
 create mode 100644 target/riscv/insn_trans/trans_rvzalasr.c.inc

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2.43.0