On 5/20/25 09:35, Jamin Lin wrote:
> This patch explicitly sets ".impl.min_access_size = 4" to match the
> declared ".valid.min_access_size = 4", enforcing stricter access size
> checking and preventing inconsistent partial accesses to the interrupt
> controller registers.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/intc/aspeed_intc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
> index 33fcbe729c..19f88853d8 100644
> --- a/hw/intc/aspeed_intc.c
> +++ b/hw/intc/aspeed_intc.c
> @@ -737,6 +737,7 @@ static const MemoryRegionOps aspeed_intc_ops = {
> .read = aspeed_intc_read,
> .write = aspeed_intc_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,
> @@ -747,6 +748,7 @@ static const MemoryRegionOps aspeed_intcio_ops = {
> .read = aspeed_intcio_read,
> .write = aspeed_intcio_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,
> @@ -757,6 +759,7 @@ static const MemoryRegionOps aspeed_ssp_intc_ops = {
> .read = aspeed_intc_read,
> .write = aspeed_ssp_intc_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,
> @@ -767,6 +770,7 @@ static const MemoryRegionOps aspeed_ssp_intcio_ops = {
> .read = aspeed_intcio_read,
> .write = aspeed_ssp_intcio_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,
> @@ -777,6 +781,7 @@ static const MemoryRegionOps aspeed_tsp_intc_ops = {
> .read = aspeed_intc_read,
> .write = aspeed_tsp_intc_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,
> @@ -787,6 +792,7 @@ static const MemoryRegionOps aspeed_tsp_intcio_ops = {
> .read = aspeed_intcio_read,
> .write = aspeed_tsp_intcio_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl.min_access_size = 4,
> .valid = {
> .min_access_size = 4,
> .max_access_size = 4,