[PATCH v4 0/9] Introduce AST27x0 multi-SoC machine

Steven Lee via posted 9 patches 6 months, 2 weeks ago
Failed in applying to current master (apply log)
docs/system/arm/aspeed.rst              |  69 +++-
include/hw/arm/aspeed_soc.h             |  32 ++
include/hw/intc/aspeed_intc.h           |   5 +
hw/arm/aspeed_ast27x0-fc.c              | 192 +++++++++++
hw/arm/aspeed_ast27x0-ssp.c             | 295 +++++++++++++++++
hw/arm/aspeed_ast27x0-tsp.c             | 295 +++++++++++++++++
hw/arm/aspeed_ast27x0.c                 |  80 +++--
hw/intc/aspeed_intc.c                   | 416 ++++++++++++++++++++++++
hw/arm/meson.build                      |   6 +-
tests/functional/test_aarch64_aspeed.py |  83 +++++
10 files changed, 1448 insertions(+), 25 deletions(-)
create mode 100644 hw/arm/aspeed_ast27x0-fc.c
create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
create mode 100644 hw/arm/aspeed_ast27x0-tsp.c
[PATCH v4 0/9] Introduce AST27x0 multi-SoC machine
Posted by Steven Lee via 6 months, 2 weeks ago
This patch series introduces full core support for the AST27x0 SoC, along with necessary updates to the ASPEED AST27x0 SOC.
The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35 cores and 2 Cortex-M4 cores.

v1:
  - Map unimplemented devices in SoC memory
  - Intruduce AST2700 CM4 SoC
  - Introduce AST27x0FC Machine

v2:
  - Remove unused functions
  - Correct hex notation for device addresses in AST27x0 SoC
  - Add AST2700 SSP INTC and AST2700 TSP INTC
  - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
  - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
  - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
  - Add functional tests for AST2700FC A0 and AST2700FC A1
  - Add Documentation for AST2700FC

v3:
  - Remove A0 SoC support

v4:
  - Rebase on upstream QEMU.
  - Remove the redundant abstract class.
  - Simplify the functional test for AST2700FC.
  - Fix the document formatting issue.

Steven Lee (9):
  aspeed: ast27x0: Map unimplemented devices in SoC memory
  aspeed: ast27x0: Correct hex notation for device addresses
  hw/intc/aspeed: Add support for AST2700 SSP INTC
  hw/intc/aspeed: Add support for AST2700 TSP INTC
  hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
  hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
  hw/arm: Introduce ASPEED AST2700 A1 full core machine
  tests/function/aspeed: Add functional test for AST2700FC
  docs: Add support for ast2700fc machine

 docs/system/arm/aspeed.rst              |  69 +++-
 include/hw/arm/aspeed_soc.h             |  32 ++
 include/hw/intc/aspeed_intc.h           |   5 +
 hw/arm/aspeed_ast27x0-fc.c              | 192 +++++++++++
 hw/arm/aspeed_ast27x0-ssp.c             | 295 +++++++++++++++++
 hw/arm/aspeed_ast27x0-tsp.c             | 295 +++++++++++++++++
 hw/arm/aspeed_ast27x0.c                 |  80 +++--
 hw/intc/aspeed_intc.c                   | 416 ++++++++++++++++++++++++
 hw/arm/meson.build                      |   6 +-
 tests/functional/test_aarch64_aspeed.py |  83 +++++
 10 files changed, 1448 insertions(+), 25 deletions(-)
 create mode 100644 hw/arm/aspeed_ast27x0-fc.c
 create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
 create mode 100644 hw/arm/aspeed_ast27x0-tsp.c

-- 
2.34.1
Re: [PATCH v4 0/9] Introduce AST27x0 multi-SoC machine
Posted by Cédric Le Goater 6 months, 2 weeks ago
On 5/2/25 12:34, Steven Lee wrote:
> This patch series introduces full core support for the AST27x0 SoC, along with necessary updates to the ASPEED AST27x0 SOC.
> The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35 cores and 2 Cortex-M4 cores.
> 
> v1:
>    - Map unimplemented devices in SoC memory
>    - Intruduce AST2700 CM4 SoC
>    - Introduce AST27x0FC Machine
> 
> v2:
>    - Remove unused functions
>    - Correct hex notation for device addresses in AST27x0 SoC
>    - Add AST2700 SSP INTC and AST2700 TSP INTC
>    - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
>    - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
>    - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
>    - Add functional tests for AST2700FC A0 and AST2700FC A1
>    - Add Documentation for AST2700FC
> 
> v3:
>    - Remove A0 SoC support
> 
> v4:
>    - Rebase on upstream QEMU.
>    - Remove the redundant abstract class.
>    - Simplify the functional test for AST2700FC.

I didn't see any change.

Also, the test takes quite some time on my dev server, more than 200s.
Would you please introduce a new test file for the ast2700fc machine :

   tests/functional/test_aarch64_aspeed_ast2700fc.py

and rename :

   tests/functional/test_aarch64_aspeed.py

to :

   tests/functional/test_aarch64_aspeed_ast2700.py

This should help parallelize the run.

Just resend patch 8.


>    - Fix the docment formatting issue.
> 
> Steven Lee (9):
>    aspeed: ast27x0: Map unimplemented devices in SoC memory
>    aspeed: ast27x0: Correct hex notation for device addresses
>    hw/intc/aspeed: Add support for AST2700 SSP INTC
>    hw/intc/aspeed: Add support for AST2700 TSP INTC
>    hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
>    hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
>    hw/arm: Introduce ASPEED AST2700 A1 full core machine
>    tests/function/aspeed: Add functional test for AST2700FC
>    docs: Add support for ast2700fc machine
> 
>   docs/system/arm/aspeed.rst              |  69 +++-
>   include/hw/arm/aspeed_soc.h             |  32 ++
>   include/hw/intc/aspeed_intc.h           |   5 +
>   hw/arm/aspeed_ast27x0-fc.c              | 192 +++++++++++
>   hw/arm/aspeed_ast27x0-ssp.c             | 295 +++++++++++++++++
>   hw/arm/aspeed_ast27x0-tsp.c             | 295 +++++++++++++++++
>   hw/arm/aspeed_ast27x0.c                 |  80 +++--
>   hw/intc/aspeed_intc.c                   | 416 ++++++++++++++++++++++++
>   hw/arm/meson.build                      |   6 +-
>   tests/functional/test_aarch64_aspeed.py |  83 +++++
>   10 files changed, 1448 insertions(+), 25 deletions(-)
>   create mode 100644 hw/arm/aspeed_ast27x0-fc.c
>   create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
>   create mode 100644 hw/arm/aspeed_ast27x0-tsp.c
> 
Applied to aspeed-next.

Thanks,

C.
RE: [PATCH v4 0/9] Introduce AST27x0 multi-SoC machine
Posted by Steven Lee 6 months, 2 weeks ago
Hi Cédric,

> -----Original Message-----
> From: Cédric Le Goater <clg@kaod.org>
> Sent: Friday, May 2, 2025 7:52 PM
> To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell
> <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin
> <jamin_lin@aspeedtech.com>; Andrew Jeffery
> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open
> list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here
> <qemu-devel@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>; longzl2@lenovo.com; Yunlin Tang
> <yunlin.tang@aspeedtech.com>
> Subject: Re: [PATCH v4 0/9] Introduce AST27x0 multi-SoC machine
> 
> On 5/2/25 12:34, Steven Lee wrote:
> > This patch series introduces full core support for the AST27x0 SoC, along with
> necessary updates to the ASPEED AST27x0 SOC.
> > The AST27x0 SoC is a new family of ASPEED SoCs featuring 4 Cortex-A35
> cores and 2 Cortex-M4 cores.
> >
> > v1:
> >    - Map unimplemented devices in SoC memory
> >    - Intruduce AST2700 CM4 SoC
> >    - Introduce AST27x0FC Machine
> >
> > v2:
> >    - Remove unused functions
> >    - Correct hex notation for device addresses in AST27x0 SoC
> >    - Add AST2700 SSP INTC and AST2700 TSP INTC
> >    - Split AST27x0 CM4 SoC to AST27x0 SSP SoC and AST27x0 TSP SoC
> >    - Add AST27x0 A0 SSP SoC and AST27x0 A1 SSP SoC
> >    - Add AST27x0 A0 TSP SoC and AST27x0 A1 TSP SoC
> >    - Add functional tests for AST2700FC A0 and AST2700FC A1
> >    - Add Documentation for AST2700FC
> >
> > v3:
> >    - Remove A0 SoC support
> >
> > v4:
> >    - Rebase on upstream QEMU.
> >    - Remove the redundant abstract class.
> >    - Simplify the functional test for AST2700FC.
> 
> I didn't see any change.
> 
> Also, the test takes quite some time on my dev server, more than 200s.
> Would you please introduce a new test file for the ast2700fc machine :
> 
>    tests/functional/test_aarch64_aspeed_ast2700fc.py
> 
> and rename :
> 
>    tests/functional/test_aarch64_aspeed.py
> 
> to :
> 
>    tests/functional/test_aarch64_aspeed_ast2700.py
> 
> This should help parallelize the run.
> 
> Just resend patch 8.
> 
> 

Got it! I'll resend patch 8 separately to split up the functional test and rename the original one as you suggested, given it's currently taking about 5 minutes to finish these 4 test cases.

Regards,
Steven

> >    - Fix the docment formatting issue.
> >
> > Steven Lee (9):
> >    aspeed: ast27x0: Map unimplemented devices in SoC memory
> >    aspeed: ast27x0: Correct hex notation for device addresses
> >    hw/intc/aspeed: Add support for AST2700 SSP INTC
> >    hw/intc/aspeed: Add support for AST2700 TSP INTC
> >    hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
> >    hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
> >    hw/arm: Introduce ASPEED AST2700 A1 full core machine
> >    tests/function/aspeed: Add functional test for AST2700FC
> >    docs: Add support for ast2700fc machine
> >
> >   docs/system/arm/aspeed.rst              |  69 +++-
> >   include/hw/arm/aspeed_soc.h             |  32 ++
> >   include/hw/intc/aspeed_intc.h           |   5 +
> >   hw/arm/aspeed_ast27x0-fc.c              | 192 +++++++++++
> >   hw/arm/aspeed_ast27x0-ssp.c             | 295 +++++++++++++++++
> >   hw/arm/aspeed_ast27x0-tsp.c             | 295 +++++++++++++++++
> >   hw/arm/aspeed_ast27x0.c                 |  80 +++--
> >   hw/intc/aspeed_intc.c                   | 416
> ++++++++++++++++++++++++
> >   hw/arm/meson.build                      |   6 +-
> >   tests/functional/test_aarch64_aspeed.py |  83 +++++
> >   10 files changed, 1448 insertions(+), 25 deletions(-)
> >   create mode 100644 hw/arm/aspeed_ast27x0-fc.c
> >   create mode 100644 hw/arm/aspeed_ast27x0-ssp.c
> >   create mode 100644 hw/arm/aspeed_ast27x0-tsp.c
> >
> Applied to aspeed-next.
> 
> Thanks,
> 
> C.