Change create_fdt_pcie(), create_fdt_reset(), create_fdt_uart() and
create_fdt_rtc() to use s->memmap in their logic.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
hw/riscv/virt.c | 44 ++++++++++++++++++++++----------------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 46ac42058e..f38b64d836 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -871,7 +871,7 @@ static void create_fdt_virtio(RISCVVirtState *s, uint32_t irq_virtio_phandle)
}
}
-static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
+static void create_fdt_pcie(RISCVVirtState *s,
uint32_t irq_pcie_phandle,
uint32_t msi_pcie_phandle,
uint32_t iommu_sys_phandle)
@@ -880,7 +880,7 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
MachineState *ms = MACHINE(s);
name = g_strdup_printf("/soc/pci@%lx",
- (long) memmap[VIRT_PCIE_ECAM].base);
+ (long) s->memmap[VIRT_PCIE_ECAM].base);
qemu_fdt_setprop_cell(ms->fdt, name, "#address-cells",
FDT_PCI_ADDR_CELLS);
qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells",
@@ -891,19 +891,19 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
qemu_fdt_setprop_string(ms->fdt, name, "device_type", "pci");
qemu_fdt_setprop_cell(ms->fdt, name, "linux,pci-domain", 0);
qemu_fdt_setprop_cells(ms->fdt, name, "bus-range", 0,
- memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1);
+ s->memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1);
qemu_fdt_setprop(ms->fdt, name, "dma-coherent", NULL, 0);
if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle);
}
qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0,
- memmap[VIRT_PCIE_ECAM].base, 0, memmap[VIRT_PCIE_ECAM].size);
+ s->memmap[VIRT_PCIE_ECAM].base, 0, s->memmap[VIRT_PCIE_ECAM].size);
qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges",
1, FDT_PCI_RANGE_IOPORT, 2, 0,
- 2, memmap[VIRT_PCIE_PIO].base, 2, memmap[VIRT_PCIE_PIO].size,
+ 2, s->memmap[VIRT_PCIE_PIO].base, 2, s->memmap[VIRT_PCIE_PIO].size,
1, FDT_PCI_RANGE_MMIO,
- 2, memmap[VIRT_PCIE_MMIO].base,
- 2, memmap[VIRT_PCIE_MMIO].base, 2, memmap[VIRT_PCIE_MMIO].size,
+ 2, s->memmap[VIRT_PCIE_MMIO].base,
+ 2, s->memmap[VIRT_PCIE_MMIO].base, 2, s->memmap[VIRT_PCIE_MMIO].size,
1, FDT_PCI_RANGE_MMIO_64BIT,
2, virt_high_pcie_memmap.base,
2, virt_high_pcie_memmap.base, 2, virt_high_pcie_memmap.size);
@@ -917,8 +917,7 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle);
}
-static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
- uint32_t *phandle)
+static void create_fdt_reset(RISCVVirtState *s, uint32_t *phandle)
{
char *name;
uint32_t test_phandle;
@@ -926,7 +925,7 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
test_phandle = (*phandle)++;
name = g_strdup_printf("/soc/test@%lx",
- (long)memmap[VIRT_TEST].base);
+ (long)s->memmap[VIRT_TEST].base);
qemu_fdt_add_subnode(ms->fdt, name);
{
static const char * const compat[3] = {
@@ -936,7 +935,7 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
(char **)&compat, ARRAY_SIZE(compat));
}
qemu_fdt_setprop_cells(ms->fdt, name, "reg",
- 0x0, memmap[VIRT_TEST].base, 0x0, memmap[VIRT_TEST].size);
+ 0x0, s->memmap[VIRT_TEST].base, 0x0, s->memmap[VIRT_TEST].size);
qemu_fdt_setprop_cell(ms->fdt, name, "phandle", test_phandle);
test_phandle = qemu_fdt_get_phandle(ms->fdt, name);
g_free(name);
@@ -958,18 +957,19 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
g_free(name);
}
-static void create_fdt_uart(RISCVVirtState *s, const MemMapEntry *memmap,
+static void create_fdt_uart(RISCVVirtState *s,
uint32_t irq_mmio_phandle)
{
g_autofree char *name = NULL;
MachineState *ms = MACHINE(s);
- name = g_strdup_printf("/soc/serial@%lx", (long)memmap[VIRT_UART0].base);
+ name = g_strdup_printf("/soc/serial@%lx",
+ (long)s->memmap[VIRT_UART0].base);
qemu_fdt_add_subnode(ms->fdt, name);
qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a");
qemu_fdt_setprop_cells(ms->fdt, name, "reg",
- 0x0, memmap[VIRT_UART0].base,
- 0x0, memmap[VIRT_UART0].size);
+ 0x0, s->memmap[VIRT_UART0].base,
+ 0x0, s->memmap[VIRT_UART0].size);
qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400);
qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle);
if (s->aia_type == VIRT_AIA_TYPE_NONE) {
@@ -982,18 +982,18 @@ static void create_fdt_uart(RISCVVirtState *s, const MemMapEntry *memmap,
qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name);
}
-static void create_fdt_rtc(RISCVVirtState *s, const MemMapEntry *memmap,
+static void create_fdt_rtc(RISCVVirtState *s,
uint32_t irq_mmio_phandle)
{
g_autofree char *name = NULL;
MachineState *ms = MACHINE(s);
- name = g_strdup_printf("/soc/rtc@%lx", (long)memmap[VIRT_RTC].base);
+ name = g_strdup_printf("/soc/rtc@%lx", (long)s->memmap[VIRT_RTC].base);
qemu_fdt_add_subnode(ms->fdt, name);
qemu_fdt_setprop_string(ms->fdt, name, "compatible",
"google,goldfish-rtc");
qemu_fdt_setprop_cells(ms->fdt, name, "reg",
- 0x0, memmap[VIRT_RTC].base, 0x0, memmap[VIRT_RTC].size);
+ 0x0, s->memmap[VIRT_RTC].base, 0x0, s->memmap[VIRT_RTC].size);
qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
irq_mmio_phandle);
if (s->aia_type == VIRT_AIA_TYPE_NONE) {
@@ -1143,14 +1143,14 @@ static void finalize_fdt(RISCVVirtState *s)
create_fdt_iommu_sys(s, irq_mmio_phandle, msi_pcie_phandle,
&iommu_sys_phandle);
}
- create_fdt_pcie(s, s->memmap, irq_pcie_phandle, msi_pcie_phandle,
+ create_fdt_pcie(s, irq_pcie_phandle, msi_pcie_phandle,
iommu_sys_phandle);
- create_fdt_reset(s, s->memmap, &phandle);
+ create_fdt_reset(s, &phandle);
- create_fdt_uart(s, s->memmap, irq_mmio_phandle);
+ create_fdt_uart(s, irq_mmio_phandle);
- create_fdt_rtc(s, s->memmap, irq_mmio_phandle);
+ create_fdt_rtc(s, irq_mmio_phandle);
}
static void create_fdt(RISCVVirtState *s)
--
2.49.0On Tue, Apr 29, 2025 at 11:01 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Change create_fdt_pcie(), create_fdt_reset(), create_fdt_uart() and
> create_fdt_rtc() to use s->memmap in their logic.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/virt.c | 44 ++++++++++++++++++++++----------------------
> 1 file changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 46ac42058e..f38b64d836 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -871,7 +871,7 @@ static void create_fdt_virtio(RISCVVirtState *s, uint32_t irq_virtio_phandle)
> }
> }
>
> -static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
> +static void create_fdt_pcie(RISCVVirtState *s,
> uint32_t irq_pcie_phandle,
> uint32_t msi_pcie_phandle,
> uint32_t iommu_sys_phandle)
> @@ -880,7 +880,7 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
> MachineState *ms = MACHINE(s);
>
> name = g_strdup_printf("/soc/pci@%lx",
> - (long) memmap[VIRT_PCIE_ECAM].base);
> + (long) s->memmap[VIRT_PCIE_ECAM].base);
> qemu_fdt_setprop_cell(ms->fdt, name, "#address-cells",
> FDT_PCI_ADDR_CELLS);
> qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells",
> @@ -891,19 +891,19 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
> qemu_fdt_setprop_string(ms->fdt, name, "device_type", "pci");
> qemu_fdt_setprop_cell(ms->fdt, name, "linux,pci-domain", 0);
> qemu_fdt_setprop_cells(ms->fdt, name, "bus-range", 0,
> - memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1);
> + s->memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1);
> qemu_fdt_setprop(ms->fdt, name, "dma-coherent", NULL, 0);
> if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
> qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle);
> }
> qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0,
> - memmap[VIRT_PCIE_ECAM].base, 0, memmap[VIRT_PCIE_ECAM].size);
> + s->memmap[VIRT_PCIE_ECAM].base, 0, s->memmap[VIRT_PCIE_ECAM].size);
> qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges",
> 1, FDT_PCI_RANGE_IOPORT, 2, 0,
> - 2, memmap[VIRT_PCIE_PIO].base, 2, memmap[VIRT_PCIE_PIO].size,
> + 2, s->memmap[VIRT_PCIE_PIO].base, 2, s->memmap[VIRT_PCIE_PIO].size,
> 1, FDT_PCI_RANGE_MMIO,
> - 2, memmap[VIRT_PCIE_MMIO].base,
> - 2, memmap[VIRT_PCIE_MMIO].base, 2, memmap[VIRT_PCIE_MMIO].size,
> + 2, s->memmap[VIRT_PCIE_MMIO].base,
> + 2, s->memmap[VIRT_PCIE_MMIO].base, 2, s->memmap[VIRT_PCIE_MMIO].size,
> 1, FDT_PCI_RANGE_MMIO_64BIT,
> 2, virt_high_pcie_memmap.base,
> 2, virt_high_pcie_memmap.base, 2, virt_high_pcie_memmap.size);
> @@ -917,8 +917,7 @@ static void create_fdt_pcie(RISCVVirtState *s, const MemMapEntry *memmap,
> create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle);
> }
>
> -static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
> - uint32_t *phandle)
> +static void create_fdt_reset(RISCVVirtState *s, uint32_t *phandle)
> {
> char *name;
> uint32_t test_phandle;
> @@ -926,7 +925,7 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
>
> test_phandle = (*phandle)++;
> name = g_strdup_printf("/soc/test@%lx",
> - (long)memmap[VIRT_TEST].base);
> + (long)s->memmap[VIRT_TEST].base);
> qemu_fdt_add_subnode(ms->fdt, name);
> {
> static const char * const compat[3] = {
> @@ -936,7 +935,7 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
> (char **)&compat, ARRAY_SIZE(compat));
> }
> qemu_fdt_setprop_cells(ms->fdt, name, "reg",
> - 0x0, memmap[VIRT_TEST].base, 0x0, memmap[VIRT_TEST].size);
> + 0x0, s->memmap[VIRT_TEST].base, 0x0, s->memmap[VIRT_TEST].size);
> qemu_fdt_setprop_cell(ms->fdt, name, "phandle", test_phandle);
> test_phandle = qemu_fdt_get_phandle(ms->fdt, name);
> g_free(name);
> @@ -958,18 +957,19 @@ static void create_fdt_reset(RISCVVirtState *s, const MemMapEntry *memmap,
> g_free(name);
> }
>
> -static void create_fdt_uart(RISCVVirtState *s, const MemMapEntry *memmap,
> +static void create_fdt_uart(RISCVVirtState *s,
> uint32_t irq_mmio_phandle)
> {
> g_autofree char *name = NULL;
> MachineState *ms = MACHINE(s);
>
> - name = g_strdup_printf("/soc/serial@%lx", (long)memmap[VIRT_UART0].base);
> + name = g_strdup_printf("/soc/serial@%lx",
> + (long)s->memmap[VIRT_UART0].base);
> qemu_fdt_add_subnode(ms->fdt, name);
> qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a");
> qemu_fdt_setprop_cells(ms->fdt, name, "reg",
> - 0x0, memmap[VIRT_UART0].base,
> - 0x0, memmap[VIRT_UART0].size);
> + 0x0, s->memmap[VIRT_UART0].base,
> + 0x0, s->memmap[VIRT_UART0].size);
> qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400);
> qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle);
> if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> @@ -982,18 +982,18 @@ static void create_fdt_uart(RISCVVirtState *s, const MemMapEntry *memmap,
> qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name);
> }
>
> -static void create_fdt_rtc(RISCVVirtState *s, const MemMapEntry *memmap,
> +static void create_fdt_rtc(RISCVVirtState *s,
> uint32_t irq_mmio_phandle)
> {
> g_autofree char *name = NULL;
> MachineState *ms = MACHINE(s);
>
> - name = g_strdup_printf("/soc/rtc@%lx", (long)memmap[VIRT_RTC].base);
> + name = g_strdup_printf("/soc/rtc@%lx", (long)s->memmap[VIRT_RTC].base);
> qemu_fdt_add_subnode(ms->fdt, name);
> qemu_fdt_setprop_string(ms->fdt, name, "compatible",
> "google,goldfish-rtc");
> qemu_fdt_setprop_cells(ms->fdt, name, "reg",
> - 0x0, memmap[VIRT_RTC].base, 0x0, memmap[VIRT_RTC].size);
> + 0x0, s->memmap[VIRT_RTC].base, 0x0, s->memmap[VIRT_RTC].size);
> qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
> irq_mmio_phandle);
> if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> @@ -1143,14 +1143,14 @@ static void finalize_fdt(RISCVVirtState *s)
> create_fdt_iommu_sys(s, irq_mmio_phandle, msi_pcie_phandle,
> &iommu_sys_phandle);
> }
> - create_fdt_pcie(s, s->memmap, irq_pcie_phandle, msi_pcie_phandle,
> + create_fdt_pcie(s, irq_pcie_phandle, msi_pcie_phandle,
> iommu_sys_phandle);
>
> - create_fdt_reset(s, s->memmap, &phandle);
> + create_fdt_reset(s, &phandle);
>
> - create_fdt_uart(s, s->memmap, irq_mmio_phandle);
> + create_fdt_uart(s, irq_mmio_phandle);
>
> - create_fdt_rtc(s, s->memmap, irq_mmio_phandle);
> + create_fdt_rtc(s, irq_mmio_phandle);
> }
>
> static void create_fdt(RISCVVirtState *s)
> --
> 2.49.0
>
>
© 2016 - 2025 Red Hat, Inc.