We're going to add support for scounteren in the next patch. KVM defines
as a target_ulong CSR, while QEMU defines env->scounteren as a 32 bit
field. This will cause the current code to read/write a 64 bit CSR in a
32 bit field when running in a 64 bit CPU.
To prevent that, change the current logic to honor the size of the QEMU
storage instead of the KVM CSR reg.
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/kvm/kvm-cpu.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 5efee8adb2..d55361962d 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -135,6 +135,7 @@ typedef struct KVMCPUConfig {
const char *description;
target_ulong offset;
uint64_t kvm_reg_id;
+ uint32_t prop_size;
bool user_set;
bool supported;
} KVMCPUConfig;
@@ -237,6 +238,7 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
#define KVM_CSR_CFG(_name, _env_prop, reg_id) \
{.name = _name, .offset = ENV_CSR_OFFSET(_env_prop), \
+ .prop_size = sizeof(((CPURISCVState *)0)->_env_prop), \
.kvm_reg_id = reg_id}
static KVMCPUConfig kvm_csr_cfgs[] = {
@@ -646,9 +648,9 @@ static int kvm_riscv_get_regs_csr(CPUState *cs)
return ret;
}
- if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
- kvm_cpu_csr_set_u32(cpu, csr_cfg, reg);
- } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
+ if (csr_cfg->prop_size == sizeof(uint32_t)) {
+ kvm_cpu_csr_set_u32(cpu, csr_cfg, (uint32_t)reg);
+ } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
kvm_cpu_csr_set_u64(cpu, csr_cfg, reg);
} else {
g_assert_not_reached();
@@ -671,9 +673,9 @@ static int kvm_riscv_put_regs_csr(CPUState *cs)
continue;
}
- if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
+ if (csr_cfg->prop_size == sizeof(uint32_t)) {
reg = kvm_cpu_csr_get_u32(cpu, csr_cfg);
- } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
+ } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
reg = kvm_cpu_csr_get_u64(cpu, csr_cfg);
} else {
g_assert_not_reached();
--
2.49.0On Tue, Apr 29, 2025 at 10:46 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> We're going to add support for scounteren in the next patch. KVM defines
> as a target_ulong CSR, while QEMU defines env->scounteren as a 32 bit
> field. This will cause the current code to read/write a 64 bit CSR in a
> 32 bit field when running in a 64 bit CPU.
>
> To prevent that, change the current logic to honor the size of the QEMU
> storage instead of the KVM CSR reg.
>
> Suggested-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/kvm/kvm-cpu.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 5efee8adb2..d55361962d 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -135,6 +135,7 @@ typedef struct KVMCPUConfig {
> const char *description;
> target_ulong offset;
> uint64_t kvm_reg_id;
> + uint32_t prop_size;
> bool user_set;
> bool supported;
> } KVMCPUConfig;
> @@ -237,6 +238,7 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
>
> #define KVM_CSR_CFG(_name, _env_prop, reg_id) \
> {.name = _name, .offset = ENV_CSR_OFFSET(_env_prop), \
> + .prop_size = sizeof(((CPURISCVState *)0)->_env_prop), \
> .kvm_reg_id = reg_id}
>
> static KVMCPUConfig kvm_csr_cfgs[] = {
> @@ -646,9 +648,9 @@ static int kvm_riscv_get_regs_csr(CPUState *cs)
> return ret;
> }
>
> - if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
> - kvm_cpu_csr_set_u32(cpu, csr_cfg, reg);
> - } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
> + if (csr_cfg->prop_size == sizeof(uint32_t)) {
> + kvm_cpu_csr_set_u32(cpu, csr_cfg, (uint32_t)reg);
> + } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
> kvm_cpu_csr_set_u64(cpu, csr_cfg, reg);
> } else {
> g_assert_not_reached();
> @@ -671,9 +673,9 @@ static int kvm_riscv_put_regs_csr(CPUState *cs)
> continue;
> }
>
> - if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
> + if (csr_cfg->prop_size == sizeof(uint32_t)) {
> reg = kvm_cpu_csr_get_u32(cpu, csr_cfg);
> - } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
> + } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
> reg = kvm_cpu_csr_get_u64(cpu, csr_cfg);
> } else {
> g_assert_not_reached();
> --
> 2.49.0
>
>
On Tue, Apr 29, 2025 at 09:44:20AM -0300, Daniel Henrique Barboza wrote:
> We're going to add support for scounteren in the next patch. KVM defines
> as a target_ulong CSR, while QEMU defines env->scounteren as a 32 bit
> field. This will cause the current code to read/write a 64 bit CSR in a
> 32 bit field when running in a 64 bit CPU.
>
> To prevent that, change the current logic to honor the size of the QEMU
> storage instead of the KVM CSR reg.
>
> Suggested-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> target/riscv/kvm/kvm-cpu.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 5efee8adb2..d55361962d 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -135,6 +135,7 @@ typedef struct KVMCPUConfig {
> const char *description;
> target_ulong offset;
> uint64_t kvm_reg_id;
> + uint32_t prop_size;
> bool user_set;
> bool supported;
> } KVMCPUConfig;
> @@ -237,6 +238,7 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
>
> #define KVM_CSR_CFG(_name, _env_prop, reg_id) \
> {.name = _name, .offset = ENV_CSR_OFFSET(_env_prop), \
> + .prop_size = sizeof(((CPURISCVState *)0)->_env_prop), \
> .kvm_reg_id = reg_id}
>
> static KVMCPUConfig kvm_csr_cfgs[] = {
> @@ -646,9 +648,9 @@ static int kvm_riscv_get_regs_csr(CPUState *cs)
> return ret;
> }
>
> - if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
> - kvm_cpu_csr_set_u32(cpu, csr_cfg, reg);
> - } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
> + if (csr_cfg->prop_size == sizeof(uint32_t)) {
> + kvm_cpu_csr_set_u32(cpu, csr_cfg, (uint32_t)reg);
> + } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
> kvm_cpu_csr_set_u64(cpu, csr_cfg, reg);
> } else {
> g_assert_not_reached();
> @@ -671,9 +673,9 @@ static int kvm_riscv_put_regs_csr(CPUState *cs)
> continue;
> }
>
> - if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint32_t)) {
> + if (csr_cfg->prop_size == sizeof(uint32_t)) {
> reg = kvm_cpu_csr_get_u32(cpu, csr_cfg);
> - } else if (KVM_REG_SIZE(csr_cfg->kvm_reg_id) == sizeof(uint64_t)) {
> + } else if (csr_cfg->prop_size == sizeof(uint64_t)) {
> reg = kvm_cpu_csr_get_u64(cpu, csr_cfg);
> } else {
> g_assert_not_reached();
> --
> 2.49.0
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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