On 4/29/25 3:12 AM, Joel Stanley wrote:
> The current device tree property uses two cells for the address (and for
> the size), but assumes the they are less than 32 bits by hard coding the
> high cell to zero.
>
> Use qemu_fdt_setprop_sized_cells to do the job of splitting the upper
> and lower 32 bits across cells.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/riscv/virt.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 0141ea4795e5..3b4c3d6b2683 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -493,8 +493,8 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
> s->soc[socket].num_harts * sizeof(uint32_t) * 4);
> }
>
> - qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg",
> - 0x0, plic_addr, 0x0, s->memmap[VIRT_PLIC].size);
> + qemu_fdt_setprop_sized_cells(ms->fdt, plic_name, "reg",
> + 2, plic_addr, 2, s->memmap[VIRT_PLIC].size);
> qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev",
> VIRT_IRQCHIP_NUM_SOURCES - 1);
> riscv_socket_fdt_write_id(ms, plic_name, socket);