On 4/29/25 3:12 AM, Joel Stanley wrote:
> The current device tree property uses two cells for the address (and for
> the size), but assumes the they are less than 32 bits by hard coding the
> high cell to zero.
>
> Use qemu_fdt_setprop_sized_cells to do the job of splitting the upper
> and lower 32 bits across cells.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/riscv/virt.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index e4c0ac8a2a9a..873d41d10c70 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -346,8 +346,8 @@ static void create_fdt_socket_clint(RISCVVirtState *s,
> qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible",
> (char **)&clint_compat,
> ARRAY_SIZE(clint_compat));
> - qemu_fdt_setprop_cells(ms->fdt, clint_name, "reg",
> - 0x0, clint_addr, 0x0, s->memmap[VIRT_CLINT].size);
> + qemu_fdt_setprop_sized_cells(ms->fdt, clint_name, "reg",
> + 2, clint_addr, 2, s->memmap[VIRT_CLINT].size);
> qemu_fdt_setprop(ms->fdt, clint_name, "interrupts-extended",
> clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4);
> riscv_socket_fdt_write_id(ms, clint_name, socket);