NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.

Signed-off-by: Tim Lee <timlee660101@gmail.com>
---
 hw/arm/npcm8xx_boards.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 3fb8478e72..6d3e59f6b9 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
     static const char * const valid_cpu_types[] = {
-        ARM_CPU_TYPE_NAME("cortex-a9"),
+        ARM_CPU_TYPE_NAME("cortex-a35"),
         NULL
     };
 
-- 
2.34.1

On Mon, 28 Apr 2025 at 03:29, Tim Lee <timlee660101@gmail.com> wrote:
>
> NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
> Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
> Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.
>
> Signed-off-by: Tim Lee <timlee660101@gmail.com>
> ---
>  hw/arm/npcm8xx_boards.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
> index 3fb8478e72..6d3e59f6b9 100644
> --- a/hw/arm/npcm8xx_boards.c
> +++ b/hw/arm/npcm8xx_boards.c
> @@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, void *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
>      static const char * const valid_cpu_types[] = {
> -        ARM_CPU_TYPE_NAME("cortex-a9"),
> +        ARM_CPU_TYPE_NAME("cortex-a35"),
>          NULL
>      };

Is this worth backporting to stable branches?

Applied to target-arm.next, thanks.

-- PMM

> Is this worth backporting to stable branches?
>
> Applied to target-arm.next, thanks.
>
> -- PMM

Hi Peter,
Thank you for taking the time to review this. I believe it is worth
backporting to stable branches.
The string "cortex-a9" and "cortex-a35" will point to different
ARMCPUInfo which could cause some features to not be applied correctly
in specific initial functions: "cortex_a9_initfn" and
"aarch64_a35_initfn".

Sincerely,
Tim Lee

From: Tim Lee <timlee660101@gmail.com>
Sent: Monday, April 28, 2025 10:30 AM
To: peter.maydell@linaro.org; wuhaotsh@google.com; CS20 KFTing <KFTING@nuvoton.com>; CS20 CHLi30 <CHLI30@nuvoton.com>
Cc: qemu-arm@nongnu.org; qemu-devel@nongnu.org; Tim Lee <timlee660101@gmail.com>
Subject: [PATCH] hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC


NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.

Signed-off-by: Tim Lee <timlee660101@gmail.com>
---
 hw/arm/npcm8xx_boards.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c index 3fb8478e72..6d3e59f6b9 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, void *data)  {
     MachineClass *mc = MACHINE_CLASS(oc);
     static const char * const valid_cpu_types[] = {
-        ARM_CPU_TYPE_NAME("cortex-a9"),
+        ARM_CPU_TYPE_NAME("cortex-a35"),
         NULL
     };

--
2.34.1

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
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