Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.
Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424222112.36194-3-philmd@linaro.org>
---
MAINTAINERS | 9 +++++++--
meson.build | 1 +
include/hw/core/cpu.h | 2 --
include/qemu/target-info-impl.h | 26 ++++++++++++++++++++++++++
include/qemu/target-info.h | 7 +++++++
cpu-target.c | 5 -----
hw/core/machine-qmp-cmds.c | 1 +
plugins/loader.c | 2 +-
system/vl.c | 2 +-
target-info-stub.c | 10 ++++++++++
target-info.c | 16 ++++++++++++++++
11 files changed, 70 insertions(+), 11 deletions(-)
create mode 100644 include/qemu/target-info-impl.h
create mode 100644 target-info.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 59d97128199..f8fee87c704 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -496,7 +496,6 @@ F: include/exec/cpu*.h
F: include/exec/exec-all.h
F: include/exec/target_long.h
F: include/qemu/accel.h
-F: include/qemu/target-info*.h
F: include/system/accel-*.h
F: include/system/cpus.h
F: include/accel/accel-cpu*.h
@@ -505,7 +504,6 @@ F: accel/Makefile.objs
F: accel/stubs/Makefile.objs
F: cpu-common.c
F: cpu-target.c
-F: target-info*.c
F: system/cpus.c
Apple Silicon HVF CPUs
@@ -1928,6 +1926,13 @@ F: tests/functional/test_empty_cpu_model.py
F: tests/unit/test-smp-parse.c
T: git https://gitlab.com/ehabkost/qemu.git machine-next
+TargetInfo API
+M: Pierrick Bouvier <pierrick.bouvier@linaro.org>
+M: Philippe Mathieu-Daudé <philmd@linaro.org>
+S: Supported
+F: include/qemu/target-info*.h
+F: target-info*.c
+
Xtensa Machines
---------------
sim
diff --git a/meson.build b/meson.build
index 185c2fb0d1b..8ae70dbe45a 100644
--- a/meson.build
+++ b/meson.build
@@ -3795,6 +3795,7 @@ endif
common_ss.add(pagevary)
specific_ss.add(files('page-target.c', 'page-vary-target.c'))
+common_ss.add(files('target-info.c'))
specific_ss.add(files('target-info-stub.c'))
subdir('backends')
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 2a02d4f0789..12b2ff1f7d2 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -1121,8 +1121,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
void cpu_exec_unrealizefn(CPUState *cpu);
void cpu_exec_reset_hold(CPUState *cpu);
-const char *target_name(void);
-
#ifdef COMPILING_PER_TARGET
extern const VMStateDescription vmstate_cpu_common;
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
new file mode 100644
index 00000000000..d30805f7f28
--- /dev/null
+++ b/include/qemu/target-info-impl.h
@@ -0,0 +1,26 @@
+/*
+ * QEMU TargetInfo structure definition
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_IMPL_H
+#define QEMU_TARGET_INFO_IMPL_H
+
+#include "qemu/target-info.h"
+
+typedef struct TargetInfo {
+ /* runtime equivalent of TARGET_NAME definition */
+ const char *target_name;
+} TargetInfo;
+
+/**
+ * target_info:
+ *
+ * Returns: The TargetInfo structure definition for this target binary.
+ */
+const TargetInfo *target_info(void);
+
+#endif
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index b4cc4888cac..58d41368974 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -9,6 +9,13 @@
#ifndef QEMU_TARGET_INFO_H
#define QEMU_TARGET_INFO_H
+/**
+ * target_name:
+ *
+ * Returns: Canonical target name (i.e. "i386").
+ */
+const char *target_name(void);
+
/**
* target_cpu_type:
*
diff --git a/cpu-target.c b/cpu-target.c
index b5645ff0dbb..1c90a307593 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -91,8 +91,3 @@ bool target_big_endian(void)
{
return TARGET_BIG_ENDIAN;
}
-
-const char *target_name(void)
-{
- return TARGET_NAME;
-}
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index a5e635152dc..d82043e1c68 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -19,6 +19,7 @@
#include "qapi/qobject-input-visitor.h"
#include "qapi/type-helpers.h"
#include "qemu/uuid.h"
+#include "qemu/target-info.h"
#include "qom/qom-qobject.h"
#include "system/hostmem.h"
#include "system/hw_accel.h"
diff --git a/plugins/loader.c b/plugins/loader.c
index 0d6e082e170..8f0d75c9049 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -29,7 +29,7 @@
#include "qemu/xxhash.h"
#include "qemu/plugin.h"
#include "qemu/memalign.h"
-#include "hw/core/cpu.h"
+#include "qemu/target-info.h"
#include "exec/tb-flush.h"
#include "plugin.h"
diff --git a/system/vl.c b/system/vl.c
index 4ab2001df75..520956f4a19 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -40,6 +40,7 @@
#include "qemu/help_option.h"
#include "qemu/hw-version.h"
#include "qemu/uuid.h"
+#include "qemu/target-info.h"
#include "system/reset.h"
#include "system/runstate.h"
#include "system/runstate-action.h"
@@ -79,7 +80,6 @@
#include "hw/block/block.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
-#include "hw/core/cpu.h"
#include "migration/cpr.h"
#include "migration/misc.h"
#include "migration/snapshot.h"
diff --git a/target-info-stub.c b/target-info-stub.c
index e5d2195e896..773a10188c8 100644
--- a/target-info-stub.c
+++ b/target-info-stub.c
@@ -8,8 +8,18 @@
#include "qemu/osdep.h"
#include "qemu/target-info.h"
+#include "qemu/target-info-impl.h"
#include "cpu.h"
+static const TargetInfo target_info_stub = {
+ .target_name = TARGET_NAME,
+};
+
+const TargetInfo *target_info(void)
+{
+ return &target_info_stub;
+}
+
const char *target_cpu_type(void)
{
return CPU_RESOLVING_TYPE;
diff --git a/target-info.c b/target-info.c
new file mode 100644
index 00000000000..84b18931e7e
--- /dev/null
+++ b/target-info.c
@@ -0,0 +1,16 @@
+/*
+ * QEMU target info helpers
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target-info.h"
+#include "qemu/target-info-impl.h"
+
+const char *target_name(void)
+{
+ return target_info()->target_name;
+}
--
2.47.1