[PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses

Joe Komlodi posted 1 patch 6 months, 3 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250422002747.2593465-1-komlodi@google.com
Maintainers: Alistair Francis <alistair@alistair23.me>, "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>
hw/ssi/aspeed_smc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
[PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
Posted by Joe Komlodi 6 months, 3 weeks ago
cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which
ends up making accesses 64-bits wide. However, the AST2600 bootloader
can sometimes compile with LDRD instructions, which causes the acceses
to fail when accessing the memory-mapped SPI flash.

To fix this, increase the MMIO region valid access size to allow for
64-bit accesses.

Signed-off-by: Joe Komlodi <komlodi@google.com>
---
 hw/ssi/aspeed_smc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index faef1a8e5b..a1160187a4 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -359,7 +359,7 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
-        .max_access_size = 4,
+        .max_access_size = 8,
     },
 };
 
@@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
-        .max_access_size = 4,
+        .max_access_size = 8,
     },
 };
 
-- 
2.49.0.805.g082f7c87e0-goog
Re: [PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
Posted by Cédric Le Goater 6 months, 3 weeks ago
On 4/22/25 02:27, Joe Komlodi wrote:
> cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which
> ends up making accesses 64-bits wide. However, the AST2600 bootloader
> can sometimes compile with LDRD instructions, which causes the acceses
> to fail when accessing the memory-mapped SPI flash.
> 
> To fix this, increase the MMIO region valid access size to allow for
> 64-bit accesses.
> 
> Signed-off-by: Joe Komlodi <komlodi@google.com>


Applied to aspeed-next.

Thanks,

C.
Re: [PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
Posted by Cédric Le Goater 6 months, 3 weeks ago
On 4/22/25 02:27, Joe Komlodi wrote:
> cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which
> ends up making accesses 64-bits wide. However, the AST2600 bootloader
> can sometimes compile with LDRD instructions, which causes the acceses
> to fail when accessing the memory-mapped SPI flash.
> 
> To fix this, increase the MMIO region valid access size to allow for
> 64-bit accesses.
> 
> Signed-off-by: Joe Komlodi <komlodi@google.com>

To backport on stable-10.0 when merged.

Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/ssi/aspeed_smc.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index faef1a8e5b..a1160187a4 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -359,7 +359,7 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = {
>       .endianness = DEVICE_LITTLE_ENDIAN,
>       .valid = {
>           .min_access_size = 1,
> -        .max_access_size = 4,
> +        .max_access_size = 8,
>       },
>   };
>   
> @@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = {
>       .endianness = DEVICE_LITTLE_ENDIAN,
>       .valid = {
>           .min_access_size = 1,
> -        .max_access_size = 4,
> +        .max_access_size = 8,
>       },
>   };
>