[PATCH v4 0/3] target/loongarch: Improve feature gating for instruction translation

WANG Rui posted 3 patches 7 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250418082103.447780-1-wangrui@loongson.cn
Maintainers: Song Gao <gaosong@loongson.cn>
target/loongarch/cpu.c                        |  4 +--
target/loongarch/cpu.h                        |  2 +-
.../tcg/insn_trans/trans_atomic.c.inc         | 36 +++++++++----------
.../tcg/insn_trans/trans_branch.c.inc         |  4 +--
.../tcg/insn_trans/trans_extra.c.inc          | 20 ++++++-----
.../tcg/insn_trans/trans_privileged.c.inc     |  4 +--
.../tcg/insn_trans/trans_shift.c.inc          |  4 +--
.../loongarch/tcg/insn_trans/trans_vec.c.inc  | 16 ++++-----
target/loongarch/translate.h                  |  5 +++
9 files changed, 52 insertions(+), 43 deletions(-)
[PATCH v4 0/3] target/loongarch: Improve feature gating for instruction translation
Posted by WANG Rui 7 months ago
This series refines feature gating for LoongArch instruction translation
in TCG to improve correctness and configurability.

v4:
 - Split into smaller patches for clarity and easier review.

WANG Rui (3):
  target/loongarch: Add CRC feature flag and use it to gate CRC
    instructions
  target/loongarch: Guard BCEQZ/BCNEZ instructions with FP feature
  target/loongarch: Guard 64-bit-only insn translation with TRANS64
    macro

 target/loongarch/cpu.c                        |  4 +--
 target/loongarch/cpu.h                        |  2 +-
 .../tcg/insn_trans/trans_atomic.c.inc         | 36 +++++++++----------
 .../tcg/insn_trans/trans_branch.c.inc         |  4 +--
 .../tcg/insn_trans/trans_extra.c.inc          | 20 ++++++-----
 .../tcg/insn_trans/trans_privileged.c.inc     |  4 +--
 .../tcg/insn_trans/trans_shift.c.inc          |  4 +--
 .../loongarch/tcg/insn_trans/trans_vec.c.inc  | 16 ++++-----
 target/loongarch/translate.h                  |  5 +++
 9 files changed, 52 insertions(+), 43 deletions(-)

-- 
2.49.0