[PATCH v3 2/5] target/hexagon: Fix badva reference, delete CAUSE

Brian Cain posted 5 patches 8 months, 2 weeks ago
Maintainers: Brian Cain <brian.cain@oss.qualcomm.com>, Alessandro Di Federico <ale@rev.ng>, Anton Johansson <anjo@rev.ng>
[PATCH v3 2/5] target/hexagon: Fix badva reference, delete CAUSE
Posted by Brian Cain 8 months, 2 weeks ago
The BADVA reg is referred to with the wrong identifier.  The
CAUSE reg field of SSR is not yet modeled.

Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 target/hexagon/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 766b678651..62f1fe15b8 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -216,8 +216,7 @@ static void hexagon_dump(CPUHexagonState *env, FILE *f, int flags)
     qemu_fprintf(f, "  cs0 = 0x00000000\n");
     qemu_fprintf(f, "  cs1 = 0x00000000\n");
 #else
-    print_reg(f, env, HEX_REG_CAUSE);
-    print_reg(f, env, HEX_REG_BADVA);
+    print_reg(f, env, HEX_SREG_BADVA);
     print_reg(f, env, HEX_REG_CS0);
     print_reg(f, env, HEX_REG_CS1);
 #endif
-- 
2.34.1

RE: [PATCH v3 2/5] target/hexagon: Fix badva reference, delete CAUSE
Posted by ltaylorsimpson@gmail.com 8 months, 1 week ago

> -----Original Message-----
> From: Brian Cain <brian.cain@oss.qualcomm.com>
> Sent: Monday, April 7, 2025 1:27 PM
> To: qemu-devel@nongnu.org
> Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org;
> philmd@linaro.org; matheus.bernardino@oss.qualcomm.com; ale@rev.ng;
> anjo@rev.ng; marco.liebel@oss.qualcomm.com; ltaylorsimpson@gmail.com;
> alex.bennee@linaro.org; quic_mburton@quicinc.com;
> sidneym@quicinc.com
> Subject: [PATCH v3 2/5] target/hexagon: Fix badva reference, delete CAUSE
> 
> The BADVA reg is referred to with the wrong identifier.  The CAUSE reg field
> of SSR is not yet modeled.
> 
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
>  target/hexagon/cpu.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index
> 766b678651..62f1fe15b8 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -216,8 +216,7 @@ static void hexagon_dump(CPUHexagonState *env,
> FILE *f, int flags)
>      qemu_fprintf(f, "  cs0 = 0x00000000\n");
>      qemu_fprintf(f, "  cs1 = 0x00000000\n");  #else
> -    print_reg(f, env, HEX_REG_CAUSE);
> -    print_reg(f, env, HEX_REG_BADVA);
> +    print_reg(f, env, HEX_SREG_BADVA);

Since BADVA is a proxy for BADVA0/BADVA1, consider naming it HEX_SREG_BADVA_ALIASED to help avoid the problems we've seen with HEX_REG_P3_0_ALIASED.

Taylor