On 3/23/25 10:37, Richard Henderson wrote:
> The comment about not being able to define a field with
> zero bits is out of date since 94597b6146f3
> ("decodetree: Allow !function with no input bits").
>
> This fixes the missing load of imm in the disassembler.
>
> Cc: qemu-stable@nongnu.org
> Fixes: 9d8caa67a24 ("target/avr: Add support for disassembling via option '-d in_asm'")
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/avr/translate.c | 2 --
> target/avr/insn.decode | 7 ++-----
> 2 files changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/target/avr/translate.c b/target/avr/translate.c
> index 4ab71d8138..e7f8ced9b3 100644
> --- a/target/avr/translate.c
> +++ b/target/avr/translate.c
> @@ -1578,7 +1578,6 @@ static bool trans_LDS(DisasContext *ctx, arg_LDS *a)
> TCGv Rd = cpu_r[a->rd];
> TCGv addr = tcg_temp_new_i32();
> TCGv H = cpu_rampD;
> - a->imm = next_word(ctx);
>
> tcg_gen_mov_tl(addr, H); /* addr = H:M:L */
> tcg_gen_shli_tl(addr, addr, 16);
> @@ -1783,7 +1782,6 @@ static bool trans_STS(DisasContext *ctx, arg_STS *a)
> TCGv Rd = cpu_r[a->rd];
> TCGv addr = tcg_temp_new_i32();
> TCGv H = cpu_rampD;
> - a->imm = next_word(ctx);
>
> tcg_gen_mov_tl(addr, H); /* addr = H:M:L */
> tcg_gen_shli_tl(addr, addr, 16);
> diff --git a/target/avr/insn.decode b/target/avr/insn.decode
> index 482c23ad0c..cc302249db 100644
> --- a/target/avr/insn.decode
> +++ b/target/avr/insn.decode
> @@ -118,11 +118,8 @@ BRBC 1111 01 ....... ... @op_bit_imm
> @io_rd_imm .... . .. ..... .... &rd_imm rd=%rd imm=%io_imm
> @ldst_d .. . . .. . rd:5 . ... &rd_imm imm=%ldst_d_imm
>
> -# The 16-bit immediate is completely in the next word.
> -# Fields cannot be defined with no bits, so we cannot play
> -# the same trick and append to a zero-bit value.
> -# Defer reading the immediate until trans_{LDS,STS}.
> -@ldst_s .... ... rd:5 .... imm=0
> +%ldst_imm !function=next_word
> +@ldst_s .... ... rd:5 .... imm=%ldst_imm
>
> MOV 0010 11 . ..... .... @op_rd_rr
> MOVW 0000 0001 .... .... &rd_rr rd=%rd_d rr=%rr_d
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>