[PATCH v1 22/22] test/qtest/hace: Add tests for AST2700

Jamin Lin via posted 22 patches 10 months, 3 weeks ago
There is a newer version of this series
[PATCH v1 22/22] test/qtest/hace: Add tests for AST2700
Posted by Jamin Lin via 10 months, 3 weeks ago
The HACE models in AST2600 and AST2700 are nearly identical. Based on the
AST2600 test cases, new tests have been added for AST2700.

Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5.
Added scatter-gather and accumulation test variants.
For AST2700, the HACE controller base address starts at "0x12070000", and
the DRAM start address is "0x4_00000000".

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 tests/qtest/ast2700-hace-test.c | 98 +++++++++++++++++++++++++++++++++
 tests/qtest/meson.build         |  4 +-
 2 files changed, 101 insertions(+), 1 deletion(-)
 create mode 100644 tests/qtest/ast2700-hace-test.c

diff --git a/tests/qtest/ast2700-hace-test.c b/tests/qtest/ast2700-hace-test.c
new file mode 100644
index 0000000000..a400e2962b
--- /dev/null
+++ b/tests/qtest/ast2700-hace-test.c
@@ -0,0 +1,98 @@
+/*
+ * QTest testcase for the ASPEED Hash and Crypto Engine
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Copyright (C) 2025 ASPEED Technology Inc.
+ */
+
+#include "qemu/osdep.h"
+#include "libqtest.h"
+#include "qemu/bitops.h"
+#include "aspeed-hace-utils.h"
+
+static const struct AspeedMasks as2700_masks = {
+    .src  = 0x7fffffff,
+    .dest = 0x7ffffff8,
+    .key = 0x7ffffff8,
+    .len  = 0x0fffffff,
+    .src_hi  = 0x00000003,
+    .dest_hi = 0x00000003,
+    .key_hi = 0x00000003,
+};
+
+/* ast2700 */
+static void test_md5_ast2700(void)
+{
+    aspeed_test_md5("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha256_ast2700(void)
+{
+    aspeed_test_sha256("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha256_sg_ast2700(void)
+{
+    aspeed_test_sha256_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha384_ast2700(void)
+{
+    aspeed_test_sha384("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha384_sg_ast2700(void)
+{
+    aspeed_test_sha384_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha512_ast2700(void)
+{
+    aspeed_test_sha512("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha512_sg_ast2700(void)
+{
+    aspeed_test_sha512_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha256_accum_ast2700(void)
+{
+    aspeed_test_sha256_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha384_accum_ast2700(void)
+{
+    aspeed_test_sha384_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_sha512_accum_ast2700(void)
+{
+    aspeed_test_sha512_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+}
+
+static void test_addresses_ast2700(void)
+{
+    aspeed_test_addresses("-machine ast2700a1-evb", 0x12070000, &as2700_masks);
+}
+
+int main(int argc, char **argv)
+{
+    g_test_init(&argc, &argv, NULL);
+
+    qtest_add_func("ast2700/hace/addresses", test_addresses_ast2700);
+    qtest_add_func("ast2700/hace/sha512", test_sha512_ast2700);
+    qtest_add_func("ast2700/hace/sha384", test_sha384_ast2700);
+    qtest_add_func("ast2700/hace/sha256", test_sha256_ast2700);
+    qtest_add_func("ast2700/hace/md5", test_md5_ast2700);
+
+    qtest_add_func("ast2700/hace/sha512_sg", test_sha512_sg_ast2700);
+    qtest_add_func("ast2700/hace/sha384_sg", test_sha384_sg_ast2700);
+    qtest_add_func("ast2700/hace/sha256_sg", test_sha256_sg_ast2700);
+
+    qtest_add_func("ast2700/hace/sha512_accum", test_sha512_accum_ast2700);
+    qtest_add_func("ast2700/hace/sha384_accum", test_sha384_accum_ast2700);
+    qtest_add_func("ast2700/hace/sha256_accum", test_sha256_accum_ast2700);
+
+    return g_test_run();
+}
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 62fc8f9868..253d37f7bd 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -218,7 +218,8 @@ qtests_aspeed = \
    'aspeed_gpio-test']
 qtests_aspeed64 = \
   ['ast2700-gpio-test',
-   'ast2700-smc-test']
+   'ast2700-smc-test',
+   'ast2700-hace-test']
 
 qtests_stm32l4x5 = \
   ['stm32l4x5_exti-test',
@@ -384,6 +385,7 @@ qtests = {
   'aspeed_smc-test': files('aspeed-smc-utils.c', 'aspeed_smc-test.c'),
   'ast2700-smc-test': files('aspeed-smc-utils.c', 'ast2700-smc-test.c'),
   'aspeed_hace-test': files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),
+  'ast2700-hace-test': files('aspeed-hace-utils.c', 'ast2700-hace-test.c'),
 }
 
 if vnc.found()
-- 
2.43.0
Re: [PATCH v1 22/22] test/qtest/hace: Add tests for AST2700
Posted by Cédric Le Goater 10 months, 1 week ago
On 3/21/25 10:26, Jamin Lin wrote:
> The HACE models in AST2600 and AST2700 are nearly identical. Based on the
> AST2600 test cases, new tests have been added for AST2700.
> 
> Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5.
> Added scatter-gather and accumulation test variants.
> For AST2700, the HACE controller base address starts at "0x12070000", and
> the DRAM start address is "0x4_00000000".
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   tests/qtest/ast2700-hace-test.c | 98 +++++++++++++++++++++++++++++++++
>   tests/qtest/meson.build         |  4 +-
>   2 files changed, 101 insertions(+), 1 deletion(-)
>   create mode 100644 tests/qtest/ast2700-hace-test.c
> 
> diff --git a/tests/qtest/ast2700-hace-test.c b/tests/qtest/ast2700-hace-test.c
> new file mode 100644
> index 0000000000..a400e2962b
> --- /dev/null
> +++ b/tests/qtest/ast2700-hace-test.c
> @@ -0,0 +1,98 @@
> +/*
> + * QTest testcase for the ASPEED Hash and Crypto Engine
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + * Copyright (C) 2025 ASPEED Technology Inc.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "libqtest.h"
> +#include "qemu/bitops.h"
> +#include "aspeed-hace-utils.h"
> +
> +static const struct AspeedMasks as2700_masks = {
> +    .src  = 0x7fffffff,
> +    .dest = 0x7ffffff8,
> +    .key = 0x7ffffff8,
> +    .len  = 0x0fffffff,
> +    .src_hi  = 0x00000003,
> +    .dest_hi = 0x00000003,
> +    .key_hi = 0x00000003,
> +};
> +
> +/* ast2700 */
> +static void test_md5_ast2700(void)
> +{
> +    aspeed_test_md5("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha256_ast2700(void)
> +{
> +    aspeed_test_sha256("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha256_sg_ast2700(void)
> +{
> +    aspeed_test_sha256_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha384_ast2700(void)
> +{
> +    aspeed_test_sha384("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha384_sg_ast2700(void)
> +{
> +    aspeed_test_sha384_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha512_ast2700(void)
> +{
> +    aspeed_test_sha512("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha512_sg_ast2700(void)
> +{
> +    aspeed_test_sha512_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha256_accum_ast2700(void)
> +{
> +    aspeed_test_sha256_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha384_accum_ast2700(void)
> +{
> +    aspeed_test_sha384_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_sha512_accum_ast2700(void)
> +{
> +    aspeed_test_sha512_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
> +}
> +
> +static void test_addresses_ast2700(void)
> +{
> +    aspeed_test_addresses("-machine ast2700a1-evb", 0x12070000, &as2700_masks);
> +}
> +
> +int main(int argc, char **argv)
> +{
> +    g_test_init(&argc, &argv, NULL);
> +
> +    qtest_add_func("ast2700/hace/addresses", test_addresses_ast2700);
> +    qtest_add_func("ast2700/hace/sha512", test_sha512_ast2700);
> +    qtest_add_func("ast2700/hace/sha384", test_sha384_ast2700);
> +    qtest_add_func("ast2700/hace/sha256", test_sha256_ast2700);
> +    qtest_add_func("ast2700/hace/md5", test_md5_ast2700);
> +
> +    qtest_add_func("ast2700/hace/sha512_sg", test_sha512_sg_ast2700);
> +    qtest_add_func("ast2700/hace/sha384_sg", test_sha384_sg_ast2700);
> +    qtest_add_func("ast2700/hace/sha256_sg", test_sha256_sg_ast2700);
> +
> +    qtest_add_func("ast2700/hace/sha512_accum", test_sha512_accum_ast2700);
> +    qtest_add_func("ast2700/hace/sha384_accum", test_sha384_accum_ast2700);
> +    qtest_add_func("ast2700/hace/sha256_accum", test_sha256_accum_ast2700);
> +
> +    return g_test_run();
> +}
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 62fc8f9868..253d37f7bd 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -218,7 +218,8 @@ qtests_aspeed = \
>      'aspeed_gpio-test']
>   qtests_aspeed64 = \
>     ['ast2700-gpio-test',
> -   'ast2700-smc-test']
> +   'ast2700-smc-test',
> +   'ast2700-hace-test']

I would keep the alphabetical order.

Anyhow,


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.



>   
>   qtests_stm32l4x5 = \
>     ['stm32l4x5_exti-test',
> @@ -384,6 +385,7 @@ qtests = {
>     'aspeed_smc-test': files('aspeed-smc-utils.c', 'aspeed_smc-test.c'),
>     'ast2700-smc-test': files('aspeed-smc-utils.c', 'ast2700-smc-test.c'),
>     'aspeed_hace-test': files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),
> +  'ast2700-hace-test': files('aspeed-hace-utils.c', 'ast2700-hace-test.c'),
>   }
>   
>   if vnc.found()