target/ppc: Fix e200 duplicate SPRs

[PATCH] target/ppc: Fix e200 duplicate SPRs

Posted by Nicholas Piggin 1 week, 4 days ago

DSRR0/1 registers are in the BookE ISA not e200 specific, so
remove the duplicate e200 register definitions.

Cc: Author: Roman Kapl <rka@sysgo.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768
Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/ppc/cpu_init.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 8b590e7f17c..7decc09aec8 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -2744,14 +2744,6 @@ static void init_proc_e200(CPUPPCState *env)
                  SPR_NOACCESS, SPR_NOACCESS,
                  &spr_read_generic, &spr_write_generic,
                  0x00000000); /* TOFIX */
-    spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
-    spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
 
     init_tlbs_emb(env);
     init_excp_e200(env, 0xFFFF0000UL);
-- 
2.47.1

Re: [PATCH] target/ppc: Fix e200 duplicate SPRs

Posted by Philippe Mathieu-Daudé 1 week, 4 days ago

On 20/3/25 13:27, Nicholas Piggin wrote:
> DSRR0/1 registers are in the BookE ISA not e200 specific, so
> remove the duplicate e200 register definitions.
> 

Cc: qemu-stable@nongnu.org

> Cc: Author: Roman Kapl <rka@sysgo.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768
> Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging")
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>   target/ppc/cpu_init.c | 8 --------
>   1 file changed, 8 deletions(-)
> 
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 8b590e7f17c..7decc09aec8 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -2744,14 +2744,6 @@ static void init_proc_e200(CPUPPCState *env)
>                    SPR_NOACCESS, SPR_NOACCESS,
>                    &spr_read_generic, &spr_write_generic,
>                    0x00000000); /* TOFIX */
> -    spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, &spr_write_generic,
> -                 0x00000000);
> -    spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, &spr_write_generic,
> -                 0x00000000);
>   
>       init_tlbs_emb(env);
>       init_excp_e200(env, 0xFFFF0000UL);