On Thu, Mar 20, 2025 at 5:24 AM Jim Shu <jim.shu@sifive.com> wrote:
>
> VSTIP is only writable when both [mh]envcfg.STCE is enabled, or it will
> revert it's defined behavior as if sstc extension is not implemented.
>
> Signed-off-by: Jim Shu <jim.shu@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/csr.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 49566d3c08..ba026dfc8e 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -3630,7 +3630,14 @@ static RISCVException rmw_mip64(CPURISCVState *env, int csrno,
> if (riscv_cpu_cfg(env)->ext_sstc && (env->priv == PRV_M) &&
> get_field(env->menvcfg, MENVCFG_STCE)) {
> /* sstc extension forbids STIP & VSTIP to be writeable in mip */
> - mask = mask & ~(MIP_STIP | MIP_VSTIP);
> +
> + /* STIP is not writable when menvcfg.STCE is enabled. */
> + mask = mask & ~MIP_STIP;
> +
> + /* VSTIP is not writable when both [mh]envcfg.STCE are enabled. */
> + if (get_field(env->henvcfg, HENVCFG_STCE)) {
> + mask = mask & ~MIP_VSTIP;
> + }
> }
>
> if (mask) {
> --
> 2.17.1
>
>