On Tue, Mar 18, 2025 at 02:07:58PM +0100, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> It is assumed, that the programmable logic (PL) is always powered
> during emulation. Therefor the PCFG_POR_B bit in the MCTRL register
> is set.
>
> This commit is necessary for the Beckhoff CX7200 board emulation
> that has a FPGA implemented in the PL.
>
> Signed-off-by: Yannick Voßen <y.vossen@beckhoff.com>
> ---
> hw/dma/xlnx-zynq-devcfg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index c44b802b22..c595d090fa 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -339,7 +339,7 @@ static const RegisterAccessInfo xlnx_zynq_devcfg_regs_info[] = {
> /* Silicon 3.0 for version field, the mysterious reserved bit 23
> * and QEMU platform identifier.
> */
> - .reset = 0x2 << R_MCTRL_PS_VERSION_SHIFT | 1 << 23 | R_MCTRL_QEMU_MASK,
> + .reset = 0x2 << R_MCTRL_PS_VERSION_SHIFT | 1 << 23 | 1 << R_MCTRL_PCFG_POR_B_SHIFT | R_MCTRL_QEMU_MASK,
This line is too long, ./scripts/checkpatch will complain.
You can use R_MCTRL_PCFG_POR_B_MASK here instead of the shift.
> .ro = ~R_MCTRL_INT_PCAP_LPBK_MASK,
> .rsvd = 0x00f00303,
> },
> --
> 2.49.0
>