Investigate the git history to uncover when and why the VFIO

properties were introduced and update the models. This is mostly

targeting vfio-pci device, since vfio-platform, vfio-ap and vfio-ccw

devices are simpler.

Sort the properties based on the QEMU version in which they were

introduced.

Cc: Tony Krowiak <akrowiak@linux.ibm.com>

Cc: Eric Farman <farman@linux.ibm.com>

Cc: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Kirti Wankhede <kwankhede@nvidia.com>

Reviewed-by: Anthony Krowiak <akrowiak@linux.ibm.com>

Reviewed-by: Eric Farman <farman@linux.ibm.com> # vfio-ccw

Reviewed-by: Alex Williamson <alex.williamson@redhat.com>

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Link: https://lore.kernel.org/qemu-devel/20250217173455.449983-1-clg@redhat.com

Signed-off-by: Cédric Le Goater <clg@redhat.com>

---

hw/vfio/ap.c | 9 ++++

hw/vfio/ccw.c | 15 ++++++

hw/vfio/pci.c | 125 +++++++++++++++++++++++++++++++++++++++++++++

hw/vfio/platform.c | 24 +++++++++

4 files changed, 173 insertions(+)

diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/vfio/ap.c

+++ b/hw/vfio/ap.c

@@ -XXX,XX +XXX,XX @@ static void vfio_ap_class_init(ObjectClass *klass, void *data)

dc->hotpluggable = true;

device_class_set_legacy_reset(dc, vfio_ap_reset);

dc->bus_type = TYPE_AP_BUS;

+

+ object_class_property_set_description(klass, /* 3.1 */

+ "sysfsdev",

+ "Host sysfs path of assigned device");

+#ifdef CONFIG_IOMMUFD

+ object_class_property_set_description(klass, /* 9.0 */

+ "iommufd",

+ "Set host IOMMUFD backend device");

+#endif

}

static const TypeInfo vfio_ap_info = {

diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/vfio/ccw.c

+++ b/hw/vfio/ccw.c

@@ -XXX,XX +XXX,XX @@ static void vfio_ccw_class_init(ObjectClass *klass, void *data)

cdc->handle_halt = vfio_ccw_handle_halt;

cdc->handle_clear = vfio_ccw_handle_clear;

cdc->handle_store = vfio_ccw_handle_store;

+

+ object_class_property_set_description(klass, /* 2.10 */

+ "sysfsdev",

+ "Host sysfs path of assigned device");

+ object_class_property_set_description(klass, /* 3.0 */

+ "force-orb-pfch",

+ "Force unlimited prefetch");

+#ifdef CONFIG_IOMMUFD

+ object_class_property_set_description(klass, /* 9.0 */

+ "iommufd",

+ "Set host IOMMUFD backend device");

+#endif

+ object_class_property_set_description(klass, /* 9.2 */

+ "loadparm",

+ "Define which devices that can be used for booting");

}

static const TypeInfo vfio_ccw_info = {

diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/vfio/pci.c

+++ b/hw/vfio/pci.c

@@ -XXX,XX +XXX,XX @@ static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)

pdc->exit = vfio_exitfn;

pdc->config_read = vfio_pci_read_config;

pdc->config_write = vfio_pci_write_config;

+

+ object_class_property_set_description(klass, /* 1.3 */

+ "host",

+ "Host PCI address [domain:]<bus:slot.function> of assigned device");

+ object_class_property_set_description(klass, /* 1.3 */

+ "x-intx-mmap-timeout-ms",

+ "When EOI is not provided by KVM/QEMU, wait time "

+ "(milliseconds) to re-enable device direct access "

+ "after INTx (DEBUG)");

+ object_class_property_set_description(klass, /* 1.5 */

+ "x-vga",

+ "Expose VGA address spaces for device");

+ object_class_property_set_description(klass, /* 2.3 */

+ "x-req",

+ "Disable device request notification support (DEBUG)");

+ object_class_property_set_description(klass, /* 2.4 and 2.5 */

+ "x-no-mmap",

+ "Disable MMAP for device. Allows to trace MMIO "

+ "accesses (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-no-kvm-intx",

+ "Disable direct VFIO->KVM INTx injection. Allows to "

+ "trace INTx interrupts (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-no-kvm-msi",

+ "Disable direct VFIO->KVM MSI injection. Allows to "

+ "trace MSI interrupts (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-no-kvm-msix",

+ "Disable direct VFIO->KVM MSIx injection. Allows to "

+ "trace MSIx interrupts (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-pci-vendor-id",

+ "Override PCI Vendor ID with provided value (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-pci-device-id",

+ "Override PCI device ID with provided value (DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-pci-sub-vendor-id",

+ "Override PCI Subsystem Vendor ID with provided value "

+ "(DEBUG)");

+ object_class_property_set_description(klass, /* 2.5 */

+ "x-pci-sub-device-id",

+ "Override PCI Subsystem Device ID with provided value "

+ "(DEBUG)");

+ object_class_property_set_description(klass, /* 2.6 */

+ "sysfsdev",

+ "Host sysfs path of assigned device");

+ object_class_property_set_description(klass, /* 2.7 */

+ "x-igd-opregion",

+ "Expose host IGD OpRegion to guest");

+ object_class_property_set_description(klass, /* 2.7 (See c4c45e943e51) */

+ "x-igd-gms",

+ "Override IGD data stolen memory size (32MiB units)");

+ object_class_property_set_description(klass, /* 2.11 */

+ "x-nv-gpudirect-clique",

+ "Add NVIDIA GPUDirect capability indicating P2P DMA "

+ "clique for device [0-15]");

+ object_class_property_set_description(klass, /* 2.12 */

+ "x-no-geforce-quirks",

+ "Disable GeForce quirks (for NVIDIA Quadro/GRID/Tesla). "

+ "Improves performance");

+ object_class_property_set_description(klass, /* 2.12 */

+ "display",

+ "Enable display support for device, ex. vGPU");

+ object_class_property_set_description(klass, /* 2.12 */

+ "x-msix-relocation",

+ "Specify MSI-X MMIO relocation to the end of specified "

+ "existing BAR or new BAR to avoid virtualization overhead "

+ "due to adjacent device registers");

+ object_class_property_set_description(klass, /* 3.0 */

+ "x-no-kvm-ioeventfd",

+ "Disable registration of ioeventfds with KVM (DEBUG)");

+ object_class_property_set_description(klass, /* 3.0 */

+ "x-no-vfio-ioeventfd",

+ "Disable linking of KVM ioeventfds to VFIO ioeventfds "

+ "(DEBUG)");

+ object_class_property_set_description(klass, /* 3.1 */

+ "x-balloon-allowed",

+ "Override allowing ballooning with device (DEBUG, DANGER)");

+ object_class_property_set_description(klass, /* 3.2 */

+ "xres",

+ "Set X display resolution the vGPU should use");

+ object_class_property_set_description(klass, /* 3.2 */

+ "yres",

+ "Set Y display resolution the vGPU should use");

+ object_class_property_set_description(klass, /* 5.2 */

+ "x-pre-copy-dirty-page-tracking",

+ "Disable dirty pages tracking during iterative phase "

+ "(DEBUG)");

+ object_class_property_set_description(klass, /* 5.2, 8.0 non-experimetal */

+ "enable-migration",

+ "Enale device migration. Also requires a host VFIO PCI "

+ "variant or mdev driver with migration support enabled");

+ object_class_property_set_description(klass, /* 8.1 */

+ "vf-token",

+ "Specify UUID VF token. Required for VF when PF is owned "

+ "by another VFIO driver");

+#ifdef CONFIG_IOMMUFD

+ object_class_property_set_description(klass, /* 9.0 */

+ "iommufd",

+ "Set host IOMMUFD backend device");

+#endif

+ object_class_property_set_description(klass, /* 9.1 */

+ "x-device-dirty-page-tracking",

+ "Disable device dirty page tracking and use "

+ "container-based dirty page tracking (DEBUG)");

+ object_class_property_set_description(klass, /* 9.1 */

+ "migration-events",

+ "Emit VFIO migration QAPI event when a VFIO device "

+ "changes its migration state. For management applications");

+ object_class_property_set_description(klass, /* 9.1 */

+ "skip-vsc-check",

+ "Skip config space check for Vendor Specific Capability. "

+ "Setting to false will enforce strict checking of VSC content "

+ "(DEBUG)");

}

static const TypeInfo vfio_pci_dev_info = {

@@ -XXX,XX +XXX,XX @@ static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data)

device_class_set_props(dc, vfio_pci_dev_nohotplug_properties);

dc->hotpluggable = false;

+

+ object_class_property_set_description(klass, /* 3.1 */

+ "ramfb",

+ "Enable ramfb to provide pre-boot graphics for devices "

+ "enabling display option");

+ object_class_property_set_description(klass, /* 8.2 */

+ "x-ramfb-migrate",

+ "Override default migration support for ramfb support "

+ "(DEBUG)");

}

static const TypeInfo vfio_pci_nohotplug_dev_info = {

diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/vfio/platform.c

+++ b/hw/vfio/platform.c

@@ -XXX,XX +XXX,XX @@ static void vfio_platform_class_init(ObjectClass *klass, void *data)

dc->desc = "VFIO-based platform device assignment";

sbc->connect_irq_notifier = vfio_start_irqfd_injection;

set_bit(DEVICE_CATEGORY_MISC, dc->categories);

+

+ object_class_property_set_description(klass, /* 2.4 */

+ "host",

+ "Host device name of assigned device");

+ object_class_property_set_description(klass, /* 2.4 and 2.5 */

+ "x-no-mmap",

+ "Disable MMAP for device. Allows to trace MMIO "

+ "accesses (DEBUG)");

+ object_class_property_set_description(klass, /* 2.4 */

+ "mmap-timeout-ms",

+ "When EOI is not provided by KVM/QEMU, wait time "

+ "(milliseconds) to re-enable device direct access "

+ "after level interrupt (DEBUG)");

+ object_class_property_set_description(klass, /* 2.4 */

+ "x-irqfd",

+ "Allow disabling irqfd support (DEBUG)");

+ object_class_property_set_description(klass, /* 2.6 */

+ "sysfsdev",

+ "Host sysfs path of assigned device");

+#ifdef CONFIG_IOMMUFD

+ object_class_property_set_description(klass, /* 9.0 */

+ "iommufd",

+ "Set host IOMMUFD backend device");

+#endif

}

static const TypeInfo vfio_platform_dev_info = {

--

2.48.1

Use the common helper warn_report_once() instead of implementing its

own.

Cc: Eric Farman <farman@linux.ibm.com>

Reviewed-by: Eric Farman <farman@linux.ibm.com>

Link: https://lore.kernel.org/qemu-devel/20250214161936.1720039-1-clg@redhat.com

Signed-off-by: Cédric Le Goater <clg@redhat.com>

---

hw/vfio/ccw.c | 12 ++----------

1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/vfio/ccw.c

+++ b/hw/vfio/ccw.c

@@ -XXX,XX +XXX,XX @@ struct VFIOCCWDevice {

EventNotifier crw_notifier;

EventNotifier req_notifier;

bool force_orb_pfch;

- bool warned_orb_pfch;

};

-static inline void warn_once_pfch(VFIOCCWDevice *vcdev, SubchDev *sch,

- const char *msg)

-{

- warn_report_once_cond(&vcdev->warned_orb_pfch,

- "vfio-ccw (devno %x.%x.%04x): %s",

- sch->cssid, sch->ssid, sch->devno, msg);

-}

-

static void vfio_ccw_compute_needs_reset(VFIODevice *vdev)

{

vdev->needs_reset = false;

@@ -XXX,XX +XXX,XX @@ static IOInstEnding vfio_ccw_handle_request(SubchDev *sch)

if (!(sch->orb.ctrl0 & ORB_CTRL0_MASK_PFCH) && vcdev->force_orb_pfch) {

sch->orb.ctrl0 |= ORB_CTRL0_MASK_PFCH;

- warn_once_pfch(vcdev, sch, "PFCH flag forced");

+ warn_report_once("vfio-ccw (devno %x.%x.%04x): PFCH flag forced",

+ sch->cssid, sch->ssid, sch->devno);

}

QEMU_BUILD_BUG_ON(sizeof(region->orb_area) != sizeof(ORB));

--

2.48.1

From: Alex Williamson <alex.williamson@redhat.com>

The memory and IO BARs for devices are only accessible in the D0 power

state. In other power states the PCI spec defines that the device

responds to TLPs and messages with an Unsupported Request response.

To approximate this behavior, consider the BARs as unmapped when the

device is not in the D0 power state. This makes the BARs inaccessible

and has the additional bonus for vfio-pci that we don't attempt to DMA

map BARs for devices in a non-D0 power state.

To support this, an interface is added for devices to register the PM

capability, which allows central tracking to enforce valid transitions

and unmap BARs in non-D0 states.

NB. We currently have device models (eepro100 and pcie_pci_bridge)

that register a PM capability but do not set wmask to enable writes to

the power state field. In order to maintain migration compatibility,

this new helper does not manage the wmask to enable guest writes to

initiate a power state change. The contents and write access of the

PM capability are still managed by the caller.

Cc: Michael S. Tsirkin <mst@redhat.com>

Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>

Link: https://lore.kernel.org/qemu-devel/20250225215237.3314011-2-alex.williamson@redhat.com

Signed-off-by: Cédric Le Goater <clg@redhat.com>

---

include/hw/pci/pci.h | 3 ++

include/hw/pci/pci_device.h | 3 ++

hw/pci/pci.c | 93 ++++++++++++++++++++++++++++++++++++-

hw/pci/trace-events | 2 +

4 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/pci/pci.h

+++ b/include/hw/pci/pci.h

@@ -XXX,XX +XXX,XX @@ enum {

QEMU_PCIE_ARI_NEXTFN_1 = (1 << QEMU_PCIE_ARI_NEXTFN_1_BITNR),

#define QEMU_PCIE_EXT_TAG_BITNR 13

QEMU_PCIE_EXT_TAG = (1 << QEMU_PCIE_EXT_TAG_BITNR),

+#define QEMU_PCI_CAP_PM_BITNR 14

+ QEMU_PCI_CAP_PM = (1 << QEMU_PCI_CAP_PM_BITNR),

};

typedef struct PCIINTxRoute {

@@ -XXX,XX +XXX,XX @@ static inline void pci_irq_deassert(PCIDevice *pci_dev)

MSIMessage pci_get_msi_message(PCIDevice *dev, int vector);

void pci_set_enabled(PCIDevice *pci_dev, bool state);

void pci_set_power(PCIDevice *pci_dev, bool state);

+int pci_pm_init(PCIDevice *pci_dev, uint8_t offset, Error **errp);

#endif

diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/pci/pci_device.h

+++ b/include/hw/pci/pci_device.h

@@ -XXX,XX +XXX,XX @@ struct PCIDevice {

/* Capability bits */

uint32_t cap_present;

+ /* Offset of PM capability in config space */

+ uint8_t pm_cap;

+

/* Offset of MSI-X capability in config space */

uint8_t msix_cap;

diff --git a/hw/pci/pci.c b/hw/pci/pci.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/pci/pci.c

+++ b/hw/pci/pci.c

@@ -XXX,XX +XXX,XX @@ static void pci_msi_trigger(PCIDevice *dev, MSIMessage msg)

attrs, NULL);

}

+/*

+ * Register and track a PM capability. If wmask is also enabled for the power

+ * state field of the pmcsr register, guest writes may change the device PM

+ * state. BAR access is only enabled while the device is in the D0 state.

+ * Return the capability offset or negative error code.

+ */

+int pci_pm_init(PCIDevice *d, uint8_t offset, Error **errp)

+{

+ int cap = pci_add_capability(d, PCI_CAP_ID_PM, offset, PCI_PM_SIZEOF, errp);

+

+ if (cap < 0) {

+ return cap;

+ }

+

+ d->pm_cap = cap;

+ d->cap_present |= QEMU_PCI_CAP_PM;

+

+ return cap;

+}

+

+static uint8_t pci_pm_state(PCIDevice *d)

+{

+ uint16_t pmcsr;

+

+ if (!(d->cap_present & QEMU_PCI_CAP_PM)) {

+ return 0;

+ }

+

+ pmcsr = pci_get_word(d->config + d->pm_cap + PCI_PM_CTRL);

+

+ return pmcsr & PCI_PM_CTRL_STATE_MASK;

+}

+

+/*

+ * Update the PM capability state based on the new value stored in config

+ * space respective to the old, pre-write state provided. If the new value

+ * is rejected (unsupported or invalid transition) restore the old value.

+ * Return the resulting PM state.

+ */

+static uint8_t pci_pm_update(PCIDevice *d, uint32_t addr, int l, uint8_t old)

+{

+ uint16_t pmc;

+ uint8_t new;

+

+ if (!(d->cap_present & QEMU_PCI_CAP_PM) ||

+ !range_covers_byte(addr, l, d->pm_cap + PCI_PM_CTRL)) {

+ return old;

+ }

+

+ new = pci_pm_state(d);

+ if (new == old) {

+ return old;

+ }

+

+ pmc = pci_get_word(d->config + d->pm_cap + PCI_PM_PMC);

+

+ /*

+ * Transitions to D1 & D2 are only allowed if supported. Devices may

+ * only transition to higher D-states or to D0.

+ */

+ if ((!(pmc & PCI_PM_CAP_D1) && new == 1) ||

+ (!(pmc & PCI_PM_CAP_D2) && new == 2) ||

+ (old && new && new < old)) {

+ pci_word_test_and_clear_mask(d->config + d->pm_cap + PCI_PM_CTRL,

+ PCI_PM_CTRL_STATE_MASK);

+ pci_word_test_and_set_mask(d->config + d->pm_cap + PCI_PM_CTRL,

+ old);

+ trace_pci_pm_bad_transition(d->name, pci_dev_bus_num(d),

+ PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),

+ old, new);

+ return old;

+ }

+

+ trace_pci_pm_transition(d->name, pci_dev_bus_num(d), PCI_SLOT(d->devfn),

+ PCI_FUNC(d->devfn), old, new);

+ return new;

+}

+

static void pci_reset_regions(PCIDevice *dev)

{

int r;

@@ -XXX,XX +XXX,XX @@ static void pci_do_device_reset(PCIDevice *dev)

pci_get_word(dev->wmask + PCI_INTERRUPT_LINE) |

pci_get_word(dev->w1cmask + PCI_INTERRUPT_LINE));

dev->config[PCI_CACHE_LINE_SIZE] = 0x0;

+ /* Default PM state is D0 */

+ if (dev->cap_present & QEMU_PCI_CAP_PM) {

+ pci_word_test_and_clear_mask(dev->config + dev->pm_cap + PCI_PM_CTRL,

+ PCI_PM_CTRL_STATE_MASK);

+ }

pci_reset_regions(dev);

pci_update_mappings(dev);

@@ -XXX,XX +XXX,XX @@ static void pci_update_mappings(PCIDevice *d)

continue;

new_addr = pci_bar_address(d, i, r->type, r->size);

- if (!d->enabled) {

+ if (!d->enabled || pci_pm_state(d)) {

new_addr = PCI_BAR_UNMAPPED;

}

@@ -XXX,XX +XXX,XX @@ uint32_t pci_default_read_config(PCIDevice *d,

void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int l)

{

+ uint8_t new_pm_state, old_pm_state = pci_pm_state(d);

int i, was_irq_disabled = pci_irq_disabled(d);

uint32_t val = val_in;

@@ -XXX,XX +XXX,XX @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int

d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);

d->config[addr + i] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */

}

+

+ new_pm_state = pci_pm_update(d, addr, l, old_pm_state);

+

if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) ||

ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) ||

ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||

- range_covers_byte(addr, l, PCI_COMMAND))

+ range_covers_byte(addr, l, PCI_COMMAND) ||

+ !!new_pm_state != !!old_pm_state) {

pci_update_mappings(d);

+ }

if (ranges_overlap(addr, l, PCI_COMMAND, 2)) {

pci_update_irq_disabled(d, was_irq_disabled);

diff --git a/hw/pci/trace-events b/hw/pci/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/pci/trace-events

+++ b/hw/pci/trace-events

@@ -XXX,XX +XXX,XX @@

# See docs/devel/tracing.rst for syntax documentation.

# pci.c

+pci_pm_bad_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x REJECTED PM transition D%d->D%d"

+pci_pm_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, uint8_t old, uint8_t new) "%s %02x:%02x.%x PM transition D%d->D%d"

pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64

pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64

pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s"

--

2.48.1