[v2] target/riscv: Support scontext-based trigger matching

[PATCH v2 0/2] target/riscv: Support scontext-based trigger matching

Florian Lugou posted 2 patches 11 months, 1 week ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250303093155.35585-1-florian.lugou@provenrun.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

target/riscv/cpu.h      |  1 +
target/riscv/cpu_bits.h |  5 +++
target/riscv/csr.c      | 36 +++++++++++++++++++
target/riscv/debug.c    | 76 +++++++++++++++++++++++++++++------------
target/riscv/debug.h    |  3 ++
5 files changed, 100 insertions(+), 21 deletions(-)

Expand all Fold all

[PATCH v2 0/2] target/riscv: Support scontext-based trigger matching

Posted by Florian Lugou 11 months, 1 week ago

Hello,

v2: Rebasing the patch series on top of the maintainer's tree.

Thank you,

Florian Lugou (2):
  target/riscv: Add scontext CSR handling
  target/riscv: Support matching scontext in Sdtrig's textra CSRs

 target/riscv/cpu.h      |  1 +
 target/riscv/cpu_bits.h |  5 +++
 target/riscv/csr.c      | 36 +++++++++++++++++++
 target/riscv/debug.c    | 76 +++++++++++++++++++++++++++++------------
 target/riscv/debug.h    |  3 ++
 5 files changed, 100 insertions(+), 21 deletions(-)

-- 
2.43.0