Setting BIT6 in VGA0 SCRATCH register will indicate that the ddr traning
is done, therefore skipping the u-boot-spl dram_init() process.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
---
 hw/misc/aspeed_scu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index bac1441b06..50f74fbabd 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -157,6 +157,7 @@
 #define AST2700_SCU_FREQ_CNTR       TO_REG(0x3b0)
 #define AST2700_SCU_CPU_SCRATCH_0   TO_REG(0x780)
 #define AST2700_SCU_CPU_SCRATCH_1   TO_REG(0x784)
+#define AST2700_SCU_VGA_SCRATCH_0   TO_REG(0x900)
 
 #define AST2700_SCUIO_CLK_STOP_CTL_1    TO_REG(0x240)
 #define AST2700_SCUIO_CLK_STOP_CLR_1    TO_REG(0x244)
@@ -930,6 +931,7 @@ static const uint32_t ast2700_a0_resets[ASPEED_AST2700_SCU_NR_REGS] = {
     [AST2700_SCU_FREQ_CNTR]         = 0x000375eb,
     [AST2700_SCU_CPU_SCRATCH_0]     = 0x00000000,
     [AST2700_SCU_CPU_SCRATCH_1]     = 0x00000004,
+    [AST2700_SCU_VGA_SCRATCH_0]     = 0x00000040,
 };
 
 static void aspeed_ast2700_scu_reset(DeviceState *dev)
-- 
2.34.1

On 3/3/25 08:35, Jamin Lin wrote:
> Setting BIT6 in VGA0 SCRATCH register will indicate that the ddr traning
> is done, therefore skipping the u-boot-spl dram_init() process.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/misc/aspeed_scu.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
> index bac1441b06..50f74fbabd 100644
> --- a/hw/misc/aspeed_scu.c
> +++ b/hw/misc/aspeed_scu.c
> @@ -157,6 +157,7 @@
>   #define AST2700_SCU_FREQ_CNTR       TO_REG(0x3b0)
>   #define AST2700_SCU_CPU_SCRATCH_0   TO_REG(0x780)
>   #define AST2700_SCU_CPU_SCRATCH_1   TO_REG(0x784)
> +#define AST2700_SCU_VGA_SCRATCH_0   TO_REG(0x900)
>   
>   #define AST2700_SCUIO_CLK_STOP_CTL_1    TO_REG(0x240)
>   #define AST2700_SCUIO_CLK_STOP_CLR_1    TO_REG(0x244)
> @@ -930,6 +931,7 @@ static const uint32_t ast2700_a0_resets[ASPEED_AST2700_SCU_NR_REGS] = {
>       [AST2700_SCU_FREQ_CNTR]         = 0x000375eb,
>       [AST2700_SCU_CPU_SCRATCH_0]     = 0x00000000,
>       [AST2700_SCU_CPU_SCRATCH_1]     = 0x00000004,
> +    [AST2700_SCU_VGA_SCRATCH_0]     = 0x00000040,
>   };
>   
>   static void aspeed_ast2700_scu_reset(DeviceState *dev)