> -----Original Message-----
> From: Brian Cain <brian.cain@oss.qualcomm.com>
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org;
> philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng; anjo@rev.ng;
> quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com;
> alex.bennee@linaro.org; quic_mburton@quicinc.com;
> sidneym@quicinc.com; Brian Cain <bcain@quicinc.com>
> Subject: [PATCH 23/38] target/hexagon: Add implicit attributes to sysemu
> macros
>
> From: Brian Cain <bcain@quicinc.com>
>
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
> target/hexagon/hex_common.py | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/hexagon/hex_common.py
> b/target/hexagon/hex_common.py index 1e94e1fef5..7b5bb2cd46 100755
> --- a/target/hexagon/hex_common.py
> +++ b/target/hexagon/hex_common.py
> @@ -128,8 +128,13 @@ def calculate_attribs():
> add_qemu_macro_attrib("fTRAP", "A_IMPLICIT_READS_PC")
> add_qemu_macro_attrib("fSET_OVERFLOW",
> "A_IMPLICIT_WRITES_USR")
> add_qemu_macro_attrib("fSET_LPCFG", "A_IMPLICIT_WRITES_USR")
> + add_qemu_macro_attrib("fLOAD_LOCKED", "A_LLSC")
> + add_qemu_macro_attrib("fSTORE_LOCKED", "A_LLSC")
I don't see a use of A_LLSC.
Otherwise
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> + add_qemu_macro_attrib("fCLEAR_RTE_EX", "A_IMPLICIT_WRITES_SSR")
> add_qemu_macro_attrib("fLOAD", "A_SCALAR_LOAD")
> add_qemu_macro_attrib("fSTORE", "A_SCALAR_STORE")
> + add_qemu_macro_attrib("fSET_K0_LOCK", "A_IMPLICIT_READS_PC")
> + add_qemu_macro_attrib("fSET_TLB_LOCK", "A_IMPLICIT_READS_PC")
> add_qemu_macro_attrib('fLSBNEW0', 'A_IMPLICIT_READS_P0')
> add_qemu_macro_attrib('fLSBNEW0NOT', 'A_IMPLICIT_READS_P0')
> add_qemu_macro_attrib('fREAD_P0', 'A_IMPLICIT_READS_P0')
> --
> 2.34.1