Do not create the RHCT MMU type entry for RV32 CPUs, since it
only has definitions for SV39/SV48/SV57. Likewise, check that
satp_mode_max_from_map() will actually return a valid value, skipping
the MMU type entry if all MMU types were disabled on the command line.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/riscv/virt-acpi-build.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 1ad68005085..2b374ebacbf 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -262,6 +262,7 @@ static void build_rhct(GArray *table_data,
RISCVCPU *cpu = &s->soc[0].harts[0];
uint32_t mmu_offset = 0;
uint8_t satp_mode_max;
+ bool rv32 = riscv_cpu_is_32bit(cpu);
g_autofree char *isa = NULL;
AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
@@ -281,7 +282,8 @@ static void build_rhct(GArray *table_data,
num_rhct_nodes++;
}
- if (cpu->cfg.satp_mode.supported != 0) {
+ if (!rv32 && cpu->cfg.satp_mode.supported != 0 &&
+ (cpu->cfg.satp_mode.map & ~(1 << VM_1_10_MBARE))) {
num_rhct_nodes++;
}
@@ -341,7 +343,8 @@ static void build_rhct(GArray *table_data,
}
/* MMU node structure */
- if (cpu->cfg.satp_mode.supported != 0) {
+ if (!rv32 && cpu->cfg.satp_mode.supported != 0 &&
+ (cpu->cfg.satp_mode.map & ~(1 << VM_1_10_MBARE))) {
satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map);
mmu_offset = table_data->len - table.table_offset;
build_append_int_noprefix(table_data, 2, 2); /* Type */
@@ -356,7 +359,7 @@ static void build_rhct(GArray *table_data,
} else if (satp_mode_max == VM_1_10_SV39) {
build_append_int_noprefix(table_data, 0, 1); /* Sv39 */
} else {
- assert(1);
+ g_assert_not_reached();
}
}
--
2.48.1
On Wed, Feb 19, 2025 at 2:58 AM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> Do not create the RHCT MMU type entry for RV32 CPUs, since it
> only has definitions for SV39/SV48/SV57. Likewise, check that
I don't have access to the spec, so I'm going to take your word on this
> satp_mode_max_from_map() will actually return a valid value, skipping
> the MMU type entry if all MMU types were disabled on the command line.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/virt-acpi-build.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 1ad68005085..2b374ebacbf 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -262,6 +262,7 @@ static void build_rhct(GArray *table_data,
> RISCVCPU *cpu = &s->soc[0].harts[0];
> uint32_t mmu_offset = 0;
> uint8_t satp_mode_max;
> + bool rv32 = riscv_cpu_is_32bit(cpu);
> g_autofree char *isa = NULL;
>
> AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
> @@ -281,7 +282,8 @@ static void build_rhct(GArray *table_data,
> num_rhct_nodes++;
> }
>
> - if (cpu->cfg.satp_mode.supported != 0) {
> + if (!rv32 && cpu->cfg.satp_mode.supported != 0 &&
> + (cpu->cfg.satp_mode.map & ~(1 << VM_1_10_MBARE))) {
> num_rhct_nodes++;
> }
>
> @@ -341,7 +343,8 @@ static void build_rhct(GArray *table_data,
> }
>
> /* MMU node structure */
> - if (cpu->cfg.satp_mode.supported != 0) {
> + if (!rv32 && cpu->cfg.satp_mode.supported != 0 &&
> + (cpu->cfg.satp_mode.map & ~(1 << VM_1_10_MBARE))) {
> satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map);
> mmu_offset = table_data->len - table.table_offset;
> build_append_int_noprefix(table_data, 2, 2); /* Type */
> @@ -356,7 +359,7 @@ static void build_rhct(GArray *table_data,
> } else if (satp_mode_max == VM_1_10_SV39) {
> build_append_int_noprefix(table_data, 0, 1); /* Sv39 */
> } else {
> - assert(1);
> + g_assert_not_reached();
> }
> }
>
> --
> 2.48.1
>
>
On Thu, Mar 6, 2025 at 2:13 AM Alistair Francis <alistair23@gmail.com> wrote: > > On Wed, Feb 19, 2025 at 2:58 AM Paolo Bonzini <pbonzini@redhat.com> wrote: > > > > Do not create the RHCT MMU type entry for RV32 CPUs, since it > > only has definitions for SV39/SV48/SV57. Likewise, check that > > I don't have access to the spec, so I'm going to take your word on this Thanks for reviewing - the closest thing I found to a spec are two Google documents linked from https://github.com/riscv-non-isa/riscv-acpi/issues/16 and https://github.com/riscv-non-isa/riscv-acpi/issues/18. In particular, the MMU type documentation can be found at https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view: MMU Type (byte length=1, byte offset=7) 0: Sv39 1: Sv48 2: Sv57 All other values are reserved. Paolo
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