target/riscv: Fix minor whitespace issue in riscv_cpu_properties

[PATCH] target/riscv: Fix minor whitespace issue in riscv_cpu_properties

Posted by Rob Bradford 1 month, 3 weeks ago

The mvendorid/mimpid/marchid properties have the wrong amount of
whitespace ahead of them.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
---
 target/riscv/cpu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 3d4bd157d2..cca24b9f1f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -2844,9 +2844,9 @@ static const Property riscv_cpu_properties[] = {
     {.name = "cbop_blocksize", .info = &prop_cbop_blksize},
     {.name = "cboz_blocksize", .info = &prop_cboz_blksize},
 
-     {.name = "mvendorid", .info = &prop_mvendorid},
-     {.name = "mimpid", .info = &prop_mimpid},
-     {.name = "marchid", .info = &prop_marchid},
+    {.name = "mvendorid", .info = &prop_mvendorid},
+    {.name = "mimpid", .info = &prop_mimpid},
+    {.name = "marchid", .info = &prop_marchid},
 
 #ifndef CONFIG_USER_ONLY
     DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
-- 
2.48.1

Re: [PATCH] target/riscv: Fix minor whitespace issue in riscv_cpu_properties

Posted by Alistair Francis 1 month, 3 weeks ago

On Sat, Feb 8, 2025 at 1:29 AM Rob Bradford <rbradford@rivosinc.com> wrote:
>
> The mvendorid/mimpid/marchid properties have the wrong amount of
> whitespace ahead of them.
>
> Signed-off-by: Rob Bradford <rbradford@rivosinc.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  target/riscv/cpu.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 3d4bd157d2..cca24b9f1f 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2844,9 +2844,9 @@ static const Property riscv_cpu_properties[] = {
>      {.name = "cbop_blocksize", .info = &prop_cbop_blksize},
>      {.name = "cboz_blocksize", .info = &prop_cboz_blksize},
>
> -     {.name = "mvendorid", .info = &prop_mvendorid},
> -     {.name = "mimpid", .info = &prop_mimpid},
> -     {.name = "marchid", .info = &prop_marchid},
> +    {.name = "mvendorid", .info = &prop_mvendorid},
> +    {.name = "mimpid", .info = &prop_mimpid},
> +    {.name = "marchid", .info = &prop_marchid},
>
>  #ifndef CONFIG_USER_ONLY
>      DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
> --
> 2.48.1
>
>

Re: [PATCH] target/riscv: Fix minor whitespace issue in riscv_cpu_properties

Posted by Daniel Henrique Barboza 1 month, 3 weeks ago

Ccing qemu-trivial and Michael
  
On 2/7/25 12:28 PM, Rob Bradford wrote:
> The mvendorid/mimpid/marchid properties have the wrong amount of
> whitespace ahead of them.
> 
> Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
> ---


Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/cpu.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 3d4bd157d2..cca24b9f1f 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2844,9 +2844,9 @@ static const Property riscv_cpu_properties[] = {
>       {.name = "cbop_blocksize", .info = &prop_cbop_blksize},
>       {.name = "cboz_blocksize", .info = &prop_cboz_blksize},
>   
> -     {.name = "mvendorid", .info = &prop_mvendorid},
> -     {.name = "mimpid", .info = &prop_mimpid},
> -     {.name = "marchid", .info = &prop_marchid},
> +    {.name = "mvendorid", .info = &prop_mvendorid},
> +    {.name = "mimpid", .info = &prop_mimpid},
> +    {.name = "marchid", .info = &prop_marchid},
>   
>   #ifndef CONFIG_USER_ONLY
>       DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),