[v9] Support RISC-V CSR read/write in Qtest environment

[PATCH v9 0/2] Support RISC-V CSR read/write in Qtest environment

Posted by Ivan Klokov 2 months, 3 weeks ago

These patches add functionality for unit testing RISC-V-specific registers.
The first patch adds a Qtest backend, and the second implements a simple test.

---
v9:
   - Fix build errors.
v8:
   - Delete RFC label.
v7:
   - Fix build errors, add Reviewed-by, Acked-by.
---

Ivan Klokov (2):
  target/riscv: Add RISC-V CSR qtest support
  tests/qtest: QTest example for RISC-V CSR register

 hw/riscv/riscv_hart.c        | 55 +++++++++++++++++++++++++++++++++++
 tests/qtest/libqtest.c       | 27 +++++++++++++++++
 tests/qtest/libqtest.h       | 14 +++++++++
 tests/qtest/meson.build      |  2 +-
 tests/qtest/riscv-csr-test.c | 56 ++++++++++++++++++++++++++++++++++++
 5 files changed, 153 insertions(+), 1 deletion(-)
 create mode 100644 tests/qtest/riscv-csr-test.c

-- 
2.34.1

Re: [PATCH v9 0/2] Support RISC-V CSR read/write in Qtest environment

Posted by Alistair Francis 2 months ago

On Thu, Jan 9, 2025 at 7:13 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> These patches add functionality for unit testing RISC-V-specific registers.
> The first patch adds a Qtest backend, and the second implements a simple test.
>
> ---
> v9:
>    - Fix build errors.
> v8:
>    - Delete RFC label.
> v7:
>    - Fix build errors, add Reviewed-by, Acked-by.
> ---
>
> Ivan Klokov (2):
>   target/riscv: Add RISC-V CSR qtest support
>   tests/qtest: QTest example for RISC-V CSR register

Do you mind rebasing on
https://github.com/alistair23/qemu/tree/riscv-to-apply.next ?

Alistair

>
>  hw/riscv/riscv_hart.c        | 55 +++++++++++++++++++++++++++++++++++
>  tests/qtest/libqtest.c       | 27 +++++++++++++++++
>  tests/qtest/libqtest.h       | 14 +++++++++
>  tests/qtest/meson.build      |  2 +-
>  tests/qtest/riscv-csr-test.c | 56 ++++++++++++++++++++++++++++++++++++
>  5 files changed, 153 insertions(+), 1 deletion(-)
>  create mode 100644 tests/qtest/riscv-csr-test.c
>
> --
> 2.34.1
>
>
>

Re: [PATCH v9 0/2] Support RISC-V CSR read/write in Qtest environment

Posted by Fabiano Rosas 2 months ago

Alistair Francis <alistair23@gmail.com> writes:

> On Thu, Jan 9, 2025 at 7:13 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>>
>> These patches add functionality for unit testing RISC-V-specific registers.
>> The first patch adds a Qtest backend, and the second implements a simple test.
>>
>> ---
>> v9:
>>    - Fix build errors.
>> v8:
>>    - Delete RFC label.
>> v7:
>>    - Fix build errors, add Reviewed-by, Acked-by.
>> ---
>>
>> Ivan Klokov (2):
>>   target/riscv: Add RISC-V CSR qtest support
>>   tests/qtest: QTest example for RISC-V CSR register
>
> Do you mind rebasing on
> https://github.com/alistair23/qemu/tree/riscv-to-apply.next ?
>

This was already merged via the qtest tree. I forgot to post a message
to this thread, sorry.