| 1 | The following changes since commit aa3a285b5bc56a4208b3b57d4a55291e9c260107: | 1 | The following changes since commit 92ec7805190313c9e628f8fc4eb4f932c15247bd: |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Merge tag 'mem-2024-12-21' of https://github.com/davidhildenbrand/qemu into staging (2024-12-22 14:33:27 -0500) | 3 | Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/qemu into staging (2024-10-31 16:34:25 +0000) |
| 4 | 4 | ||
| 5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
| 6 | 6 | ||
| 7 | https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241225 | 7 | https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241102 |
| 8 | 8 | ||
| 9 | for you to fetch changes up to cb91b7108cb0b3781de9a00994fe78b631d80012: | 9 | for you to fetch changes up to 47b54e15bbe78722c62dfafc3e04deded820c05e: |
| 10 | 10 | ||
| 11 | target/loongarch: Use auto method with LASX feature (2024-12-25 10:33:20 +0800) | 11 | target/loongarch: Add steal time support on migration (2024-11-02 15:45:45 +0800) |
| 12 | 12 | ||
| 13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
| 14 | pull-loongarch-20241225 | 14 | pull-loongarch-20241102 |
| 15 | 15 | ||
| 16 | V2: Fix no 'asm/unistd_64.h' build error. | ||
| 17 | Add a new patch (hw/loongarch/boot: Use warn_report when no kernel filename). | ||
| 16 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 17 | Bibo Mao (5): | 19 | Bibo Mao (7): |
| 18 | target/loongarch: Use actual operand size with vbsrl check | 20 | target/loongarch: Add loongson binary translation feature |
| 19 | hw/loongarch/virt: Create fdt table on machine creation done notification | 21 | target/loongarch: Implement lbt registers save/restore function |
| 20 | hw/loongarch/virt: Improve fdt table creation for CPU object | 22 | target/loongarch/kvm: Implement LoongArch PMU extension |
| 21 | target/loongarch: Use auto method with LSX feature | 23 | linux-headers: Add unistd_64.h |
| 22 | target/loongarch: Use auto method with LASX feature | 24 | linux-headers: loongarch: Add kvm_para.h |
| 25 | linux-headers: Update to Linux v6.12-rc5 | ||
| 26 | target/loongarch: Add steal time support on migration | ||
| 23 | 27 | ||
| 24 | ghy (1): | 28 | Song Gao (1): |
| 25 | target/loongarch: Fix vldi inst | 29 | hw/loongarch/boot: Use warn_report when no kernel filename |
| 26 | 30 | ||
| 27 | hw/loongarch/virt.c | 142 ++++++++++++++---------- | 31 | hw/loongarch/boot.c | 5 +- |
| 28 | target/loongarch/cpu.c | 86 ++++++++------ | 32 | include/standard-headers/drm/drm_fourcc.h | 43 +++ |
| 29 | target/loongarch/cpu.h | 4 + | 33 | include/standard-headers/linux/const.h | 17 ++ |
| 30 | target/loongarch/kvm/kvm.c | 107 ++++++++++++++++++ | 34 | include/standard-headers/linux/ethtool.h | 226 ++++++++++++++ |
| 31 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 4 +- | 35 | include/standard-headers/linux/fuse.h | 22 +- |
| 32 | 5 files changed, 249 insertions(+), 94 deletions(-) | 36 | include/standard-headers/linux/input-event-codes.h | 2 + |
| 37 | include/standard-headers/linux/pci_regs.h | 41 ++- | ||
| 38 | include/standard-headers/linux/virtio_balloon.h | 16 +- | ||
| 39 | include/standard-headers/linux/virtio_gpu.h | 1 + | ||
| 40 | linux-headers/asm-arm64/mman.h | 9 + | ||
| 41 | linux-headers/asm-arm64/unistd.h | 25 +- | ||
| 42 | linux-headers/asm-arm64/unistd_64.h | 324 ++++++++++++++++++++ | ||
| 43 | linux-headers/asm-generic/unistd.h | 6 +- | ||
| 44 | linux-headers/asm-loongarch/kvm.h | 24 ++ | ||
| 45 | linux-headers/asm-loongarch/kvm_para.h | 21 ++ | ||
| 46 | linux-headers/asm-loongarch/unistd.h | 4 +- | ||
| 47 | linux-headers/asm-loongarch/unistd_64.h | 320 ++++++++++++++++++++ | ||
| 48 | linux-headers/asm-riscv/kvm.h | 7 + | ||
| 49 | linux-headers/asm-riscv/unistd.h | 41 +-- | ||
| 50 | linux-headers/asm-riscv/unistd_32.h | 315 ++++++++++++++++++++ | ||
| 51 | linux-headers/asm-riscv/unistd_64.h | 325 +++++++++++++++++++++ | ||
| 52 | linux-headers/asm-x86/kvm.h | 2 + | ||
| 53 | linux-headers/asm-x86/unistd_64.h | 1 + | ||
| 54 | linux-headers/asm-x86/unistd_x32.h | 1 + | ||
| 55 | linux-headers/linux/bits.h | 3 + | ||
| 56 | linux-headers/linux/const.h | 17 ++ | ||
| 57 | linux-headers/linux/iommufd.h | 143 +++++++-- | ||
| 58 | linux-headers/linux/kvm.h | 23 +- | ||
| 59 | linux-headers/linux/mman.h | 1 + | ||
| 60 | linux-headers/linux/psp-sev.h | 28 ++ | ||
| 61 | scripts/update-linux-headers.sh | 7 + | ||
| 62 | target/loongarch/cpu.c | 43 +++ | ||
| 63 | target/loongarch/cpu.h | 23 ++ | ||
| 64 | target/loongarch/kvm/kvm.c | 225 +++++++++++++- | ||
| 65 | target/loongarch/loongarch-qmp-cmds.c | 2 +- | ||
| 66 | target/loongarch/machine.c | 30 +- | ||
| 67 | 36 files changed, 2243 insertions(+), 100 deletions(-) | ||
| 68 | create mode 100644 linux-headers/asm-arm64/unistd_64.h | ||
| 69 | create mode 100644 linux-headers/asm-loongarch/kvm_para.h | ||
| 70 | create mode 100644 linux-headers/asm-loongarch/unistd_64.h | ||
| 71 | create mode 100644 linux-headers/asm-riscv/unistd_32.h | ||
| 72 | create mode 100644 linux-headers/asm-riscv/unistd_64.h | diff view generated by jsdifflib |
| 1 | Like LBT feature, add type OnOffAuto for LSX feature setting. Also | 1 | From: Bibo Mao <maobibo@loongson.cn> |
|---|---|---|---|
| 2 | add LSX feature detection with new VM ioctl command, fallback to old | 2 | |
| 3 | method if it is not supported. | 3 | Loongson Binary Translation (LBT) is used to accelerate binary |
| 4 | translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM | ||
| 5 | eflags (eflags) and x87 fpu stack pointer (ftop). | ||
| 6 | |||
| 7 | Now LBT feature is added in kvm mode, not supported in TCG mode since | ||
| 8 | it is not emulated. Feature variable lbt is added with OnOffAuto type, | ||
| 9 | If lbt feature is not supported with KVM host, it reports error if there | ||
| 10 | is lbt=on command line. | ||
| 11 | |||
| 12 | If there is no any command line about lbt parameter, it checks whether | ||
| 13 | KVM host supports lbt feature and set the corresponding value in cpucfg. | ||
| 4 | 14 | ||
| 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 15 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 16 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 17 | Message-Id: <20240929070405.235200-2-maobibo@loongson.cn> | ||
| 18 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 7 | --- | 19 | --- |
| 8 | target/loongarch/cpu.c | 38 +++++++++++++++------------ | 20 | target/loongarch/cpu.c | 24 +++++++++++ |
| 9 | target/loongarch/cpu.h | 2 ++ | 21 | target/loongarch/cpu.h | 6 +++ |
| 10 | target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++ | 22 | target/loongarch/kvm/kvm.c | 57 ++++++++++++++++++++++++++- |
| 11 | 3 files changed, 77 insertions(+), 17 deletions(-) | 23 | target/loongarch/loongarch-qmp-cmds.c | 2 +- |
| 24 | 4 files changed, 87 insertions(+), 2 deletions(-) | ||
| 12 | 25 | ||
| 13 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 26 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
| 14 | index XXXXXXX..XXXXXXX 100644 | 27 | index XXXXXXX..XXXXXXX 100644 |
| 15 | --- a/target/loongarch/cpu.c | 28 | --- a/target/loongarch/cpu.c |
| 16 | +++ b/target/loongarch/cpu.c | 29 | +++ b/target/loongarch/cpu.c |
| 17 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) | 30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp) |
| 31 | } | ||
| 32 | } | ||
| 33 | |||
| 34 | +static bool loongarch_get_lbt(Object *obj, Error **errp) | ||
| 35 | +{ | ||
| 36 | + return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF; | ||
| 37 | +} | ||
| 38 | + | ||
| 39 | +static void loongarch_set_lbt(Object *obj, bool value, Error **errp) | ||
| 40 | +{ | ||
| 41 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 42 | + | ||
| 43 | + cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
| 44 | +} | ||
| 45 | + | ||
| 46 | void loongarch_cpu_post_init(Object *obj) | ||
| 18 | { | 47 | { |
| 19 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 48 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 20 | CPULoongArchState *env = &cpu->env; | ||
| 21 | + uint32_t data = 0; | ||
| 22 | int i; | ||
| 23 | |||
| 24 | for (i = 0; i < 21; i++) { | ||
| 25 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) | ||
| 26 | cpu->dtb_compatible = "loongarch,Loongson-3A5000"; | ||
| 27 | env->cpucfg[0] = 0x14c010; /* PRID */ | ||
| 28 | |||
| 29 | - uint32_t data = 0; | ||
| 30 | data = FIELD_DP32(data, CPUCFG1, ARCH, 2); | ||
| 31 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
| 32 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
| 33 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
| 34 | { | ||
| 35 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 36 | CPULoongArchState *env = &cpu->env; | ||
| 37 | - | ||
| 38 | + uint32_t data = 0; | ||
| 39 | int i; | ||
| 40 | |||
| 41 | for (i = 0; i < 21; i++) { | ||
| 42 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
| 43 | cpu->dtb_compatible = "loongarch,Loongson-1C103"; | ||
| 44 | env->cpucfg[0] = 0x148042; /* PRID */ | ||
| 45 | |||
| 46 | - uint32_t data = 0; | ||
| 47 | data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ | ||
| 48 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
| 49 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
| 50 | @@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) | ||
| 51 | |||
| 52 | static bool loongarch_get_lsx(Object *obj, Error **errp) | ||
| 53 | { | ||
| 54 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 55 | - bool ret; | ||
| 56 | - | ||
| 57 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
| 58 | - ret = true; | ||
| 59 | - } else { | ||
| 60 | - ret = false; | ||
| 61 | - } | ||
| 62 | - return ret; | ||
| 63 | + return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF; | ||
| 64 | } | ||
| 65 | |||
| 66 | static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
| 67 | { | ||
| 68 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 69 | + uint32_t val; | ||
| 70 | |||
| 71 | - if (value) { | ||
| 72 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
| 73 | - } else { | ||
| 74 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0); | ||
| 75 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
| 76 | + cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
| 77 | + if (kvm_enabled()) { | ||
| 78 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
| 79 | + return; | ||
| 80 | } | ||
| 81 | + | 49 | + |
| 82 | + /* LSX feature detection in TCG mode */ | ||
| 83 | + val = cpu->env.cpucfg[2]; | ||
| 84 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
| 85 | + if (FIELD_EX32(val, CPUCFG2, LSX) == 0) { | ||
| 86 | + error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
| 87 | + return; | ||
| 88 | + } | ||
| 89 | + } | ||
| 90 | + | ||
| 91 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
| 92 | } | ||
| 93 | |||
| 94 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
| 95 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
| 96 | { | ||
| 97 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 98 | |||
| 99 | + cpu->lsx = ON_OFF_AUTO_AUTO; | ||
| 100 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | 50 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, |
| 101 | loongarch_set_lsx); | 51 | loongarch_set_lsx); |
| 102 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | 52 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, |
| 103 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | 53 | loongarch_set_lasx); |
| 104 | 54 | + /* lbt is enabled only in kvm mode, not supported in tcg mode */ | |
| 105 | } else { | 55 | + if (kvm_enabled()) { |
| 106 | cpu->lbt = ON_OFF_AUTO_OFF; | 56 | + cpu->lbt = ON_OFF_AUTO_AUTO; |
| 107 | + cpu->pmu = ON_OFF_AUTO_OFF; | 57 | + object_property_add_bool(obj, "lbt", loongarch_get_lbt, |
| 108 | } | 58 | + loongarch_set_lbt); |
| 59 | + object_property_set_description(obj, "lbt", | ||
| 60 | + "Set off to disable Binary Tranlation."); | ||
| 61 | + } else { | ||
| 62 | + cpu->lbt = ON_OFF_AUTO_OFF; | ||
| 63 | + } | ||
| 109 | } | 64 | } |
| 110 | 65 | ||
| 66 | static void loongarch_cpu_init(Object *obj) | ||
| 111 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 67 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
| 112 | index XXXXXXX..XXXXXXX 100644 | 68 | index XXXXXXX..XXXXXXX 100644 |
| 113 | --- a/target/loongarch/cpu.h | 69 | --- a/target/loongarch/cpu.h |
| 114 | +++ b/target/loongarch/cpu.h | 70 | +++ b/target/loongarch/cpu.h |
| 115 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | 71 | @@ -XXX,XX +XXX,XX @@ FIELD(CPUCFG2, LLFTP_VER, 15, 3) |
| 72 | FIELD(CPUCFG2, LBT_X86, 18, 1) | ||
| 73 | FIELD(CPUCFG2, LBT_ARM, 19, 1) | ||
| 74 | FIELD(CPUCFG2, LBT_MIPS, 20, 1) | ||
| 75 | +FIELD(CPUCFG2, LBT_ALL, 18, 3) | ||
| 76 | FIELD(CPUCFG2, LSPW, 21, 1) | ||
| 77 | FIELD(CPUCFG2, LAM, 22, 1) | ||
| 78 | |||
| 79 | @@ -XXX,XX +XXX,XX @@ struct LoongArchTLB { | ||
| 80 | typedef struct LoongArchTLB LoongArchTLB; | ||
| 116 | #endif | 81 | #endif |
| 117 | 82 | ||
| 118 | enum loongarch_features { | 83 | +enum loongarch_features { |
| 119 | + LOONGARCH_FEATURE_LSX, | 84 | + LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ |
| 120 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | 85 | +}; |
| 121 | LOONGARCH_FEATURE_PMU, | 86 | + |
| 122 | }; | 87 | typedef struct CPUArchState { |
| 88 | uint64_t gpr[32]; | ||
| 89 | uint64_t pc; | ||
| 123 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | 90 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { |
| 91 | CPULoongArchState env; | ||
| 92 | QEMUTimer timer; | ||
| 124 | uint32_t phy_id; | 93 | uint32_t phy_id; |
| 125 | OnOffAuto lbt; | 94 | + OnOffAuto lbt; |
| 126 | OnOffAuto pmu; | ||
| 127 | + OnOffAuto lsx; | ||
| 128 | 95 | ||
| 129 | /* 'compatible' string for this CPU for Linux device trees */ | 96 | /* 'compatible' string for this CPU for Linux device trees */ |
| 130 | const char *dtb_compatible; | 97 | const char *dtb_compatible; |
| 131 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | 98 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c |
| 132 | index XXXXXXX..XXXXXXX 100644 | 99 | index XXXXXXX..XXXXXXX 100644 |
| 133 | --- a/target/loongarch/kvm/kvm.c | 100 | --- a/target/loongarch/kvm/kvm.c |
| 134 | +++ b/target/loongarch/kvm/kvm.c | 101 | +++ b/target/loongarch/kvm/kvm.c |
| 135 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | 102 | @@ -XXX,XX +XXX,XX @@ |
| 136 | { | 103 | #include <sys/ioctl.h> |
| 137 | int ret; | 104 | #include <linux/kvm.h> |
| 138 | struct kvm_device_attr attr; | 105 | |
| 139 | + uint64_t val; | 106 | +#include "qapi/error.h" |
| 140 | 107 | #include "qemu/timer.h" | |
| 141 | switch (feature) { | 108 | #include "qemu/error-report.h" |
| 142 | + case LOONGARCH_FEATURE_LSX: | 109 | #include "qemu/main-loop.h" |
| 110 | @@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running, | ||
| 111 | } | ||
| 112 | } | ||
| 113 | |||
| 114 | +static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
| 115 | +{ | ||
| 116 | + int ret; | ||
| 117 | + struct kvm_device_attr attr; | ||
| 118 | + | ||
| 119 | + switch (feature) { | ||
| 120 | + case LOONGARCH_FEATURE_LBT: | ||
| 121 | + /* | ||
| 122 | + * Return all if all the LBT features are supported such as: | ||
| 123 | + * KVM_LOONGARCH_VM_FEAT_X86BT | ||
| 124 | + * KVM_LOONGARCH_VM_FEAT_ARMBT | ||
| 125 | + * KVM_LOONGARCH_VM_FEAT_MIPSBT | ||
| 126 | + */ | ||
| 143 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | 127 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 144 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LSX; | 128 | + attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT; |
| 145 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 129 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 146 | + if (ret == 0) { | 130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT; |
| 147 | + return true; | 131 | + ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 148 | + } | 132 | + attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT; |
| 133 | + ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 134 | + return (ret == 0); | ||
| 135 | + default: | ||
| 136 | + return false; | ||
| 137 | + } | ||
| 138 | +} | ||
| 149 | + | 139 | + |
| 150 | + /* Fallback to old kernel detect interface */ | 140 | +static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
| 151 | + val = 0; | ||
| 152 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
| 153 | + /* Cpucfg2 */ | ||
| 154 | + attr.attr = 2; | ||
| 155 | + attr.addr = (uint64_t)&val; | ||
| 156 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 157 | + if (!ret) { | ||
| 158 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
| 159 | + if (ret) { | ||
| 160 | + return false; | ||
| 161 | + } | ||
| 162 | + | ||
| 163 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX); | ||
| 164 | + return (ret != 0); | ||
| 165 | + } | ||
| 166 | + return false; | ||
| 167 | + | ||
| 168 | case LOONGARCH_FEATURE_LBT: | ||
| 169 | /* | ||
| 170 | * Return all if all the LBT features are supported such as: | ||
| 171 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
| 172 | return false; | ||
| 173 | } | ||
| 174 | |||
| 175 | +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
| 176 | +{ | 141 | +{ |
| 177 | + CPULoongArchState *env = cpu_env(cs); | 142 | + CPULoongArchState *env = cpu_env(cs); |
| 178 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | 143 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 179 | + bool kvm_supported; | 144 | + bool kvm_supported; |
| 180 | + | 145 | + |
| 181 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); | 146 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT); |
| 182 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); | 147 | + if (cpu->lbt == ON_OFF_AUTO_ON) { |
| 183 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
| 184 | + if (kvm_supported) { | 148 | + if (kvm_supported) { |
| 185 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | 149 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); |
| 186 | + } else { | 150 | + } else { |
| 187 | + error_setg(errp, "'lsx' feature not supported by KVM on this host"); | 151 | + error_setg(errp, "'lbt' feature not supported by KVM on this host"); |
| 188 | + return -ENOTSUP; | 152 | + return -ENOTSUP; |
| 189 | + } | 153 | + } |
| 190 | + } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) { | 154 | + } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) { |
| 191 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | 155 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); |
| 192 | + } | 156 | + } |
| 193 | + | 157 | + |
| 194 | + return 0; | 158 | + return 0; |
| 195 | +} | 159 | +} |
| 196 | + | 160 | + |
| 197 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | 161 | int kvm_arch_init_vcpu(CPUState *cs) |
| 198 | { | 162 | { |
| 199 | CPULoongArchState *env = cpu_env(cs); | 163 | uint64_t val; |
| 200 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) | 164 | + int ret; |
| 165 | + Error *local_err = NULL; | ||
| 166 | |||
| 167 | + ret = 0; | ||
| 168 | qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs); | ||
| 169 | |||
| 170 | if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) { | ||
| 201 | brk_insn = val; | 171 | brk_insn = val; |
| 202 | } | 172 | } |
| 203 | 173 | ||
| 204 | + ret = kvm_cpu_check_lsx(cs, &local_err); | 174 | - return 0; |
| 175 | + ret = kvm_cpu_check_lbt(cs, &local_err); | ||
| 205 | + if (ret < 0) { | 176 | + if (ret < 0) { |
| 206 | + error_report_err(local_err); | 177 | + error_report_err(local_err); |
| 207 | + } | 178 | + } |
| 208 | + | 179 | + return ret; |
| 209 | ret = kvm_cpu_check_lbt(cs, &local_err); | 180 | } |
| 210 | if (ret < 0) { | 181 | |
| 211 | error_report_err(local_err); | 182 | int kvm_arch_destroy_vcpu(CPUState *cs) |
| 183 | diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c | ||
| 184 | index XXXXXXX..XXXXXXX 100644 | ||
| 185 | --- a/target/loongarch/loongarch-qmp-cmds.c | ||
| 186 | +++ b/target/loongarch/loongarch-qmp-cmds.c | ||
| 187 | @@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) | ||
| 188 | } | ||
| 189 | |||
| 190 | static const char *cpu_model_advertised_features[] = { | ||
| 191 | - "lsx", "lasx", NULL | ||
| 192 | + "lsx", "lasx", "lbt", NULL | ||
| 193 | }; | ||
| 194 | |||
| 195 | CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, | ||
| 212 | -- | 196 | -- |
| 213 | 2.43.5 | 197 | 2.34.1 | diff view generated by jsdifflib |
| 1 | The same with ACPI table, fdt table is created on machine done | 1 | From: Bibo Mao <maobibo@loongson.cn> |
|---|---|---|---|
| 2 | notification. Some objects like CPU objects can be created with cold-plug | 2 | |
| 3 | method with command such as -smp x, -device la464-loongarch-cpu, so all | 3 | Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate. |
| 4 | objects finish to create when machine is done. | 4 | And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added |
| 5 | to save/restore lbt registers. | ||
| 5 | 6 | ||
| 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 7 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 8 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 9 | Message-Id: <20240929070405.235200-3-maobibo@loongson.cn> | ||
| 10 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 8 | --- | 11 | --- |
| 9 | hw/loongarch/virt.c | 103 ++++++++++++++++++++++++-------------------- | 12 | target/loongarch/cpu.h | 12 ++++++++ |
| 10 | 1 file changed, 57 insertions(+), 46 deletions(-) | 13 | target/loongarch/kvm/kvm.c | 62 ++++++++++++++++++++++++++++++++++++++ |
| 14 | target/loongarch/machine.c | 24 +++++++++++++++ | ||
| 15 | 3 files changed, 98 insertions(+) | ||
| 11 | 16 | ||
| 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 17 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
| 13 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
| 14 | --- a/hw/loongarch/virt.c | 19 | --- a/target/loongarch/cpu.h |
| 15 | +++ b/hw/loongarch/virt.c | 20 | +++ b/target/loongarch/cpu.h |
| 16 | @@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms) | 21 | @@ -XXX,XX +XXX,XX @@ enum loongarch_features { |
| 17 | } | 22 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ |
| 23 | }; | ||
| 24 | |||
| 25 | +typedef struct LoongArchBT { | ||
| 26 | + /* scratch registers */ | ||
| 27 | + uint64_t scr0; | ||
| 28 | + uint64_t scr1; | ||
| 29 | + uint64_t scr2; | ||
| 30 | + uint64_t scr3; | ||
| 31 | + /* loongarch eflags */ | ||
| 32 | + uint32_t eflags; | ||
| 33 | + uint32_t ftop; | ||
| 34 | +} lbt_t; | ||
| 35 | + | ||
| 36 | typedef struct CPUArchState { | ||
| 37 | uint64_t gpr[32]; | ||
| 38 | uint64_t pc; | ||
| 39 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState { | ||
| 40 | fpr_t fpr[32]; | ||
| 41 | bool cf[8]; | ||
| 42 | uint32_t fcsr0; | ||
| 43 | + lbt_t lbt; | ||
| 44 | |||
| 45 | uint32_t cpucfg[21]; | ||
| 46 | |||
| 47 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
| 48 | index XXXXXXX..XXXXXXX 100644 | ||
| 49 | --- a/target/loongarch/kvm/kvm.c | ||
| 50 | +++ b/target/loongarch/kvm/kvm.c | ||
| 51 | @@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs) | ||
| 52 | return ret; | ||
| 18 | } | 53 | } |
| 19 | 54 | ||
| 20 | +static void virt_fdt_setup(LoongArchVirtMachineState *lvms) | 55 | +static int kvm_loongarch_put_lbt(CPUState *cs) |
| 21 | +{ | 56 | +{ |
| 22 | + MachineState *machine = MACHINE(lvms); | 57 | + CPULoongArchState *env = cpu_env(cs); |
| 23 | + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | 58 | + uint64_t val; |
| 24 | + int i; | 59 | + int ret; |
| 25 | + | 60 | + |
| 26 | + create_fdt(lvms); | 61 | + /* check whether vm support LBT firstly */ |
| 27 | + fdt_add_cpu_nodes(lvms); | 62 | + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { |
| 28 | + fdt_add_memory_nodes(machine); | 63 | + return 0; |
| 29 | + fdt_add_fw_cfg_node(lvms); | ||
| 30 | + fdt_add_flash_node(lvms); | ||
| 31 | + | ||
| 32 | + /* Add cpu interrupt-controller */ | ||
| 33 | + fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
| 34 | + /* Add Extend I/O Interrupt Controller node */ | ||
| 35 | + fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
| 36 | + /* Add PCH PIC node */ | ||
| 37 | + fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
| 38 | + /* Add PCH MSI node */ | ||
| 39 | + fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
| 40 | + /* Add pcie node */ | ||
| 41 | + fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
| 42 | + | ||
| 43 | + /* | ||
| 44 | + * Create uart fdt node in reverse order so that they appear | ||
| 45 | + * in the finished device tree lowest address first | ||
| 46 | + */ | ||
| 47 | + for (i = VIRT_UART_COUNT; i-- > 0;) { | ||
| 48 | + hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; | ||
| 49 | + int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; | ||
| 50 | + fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0); | ||
| 51 | + } | 64 | + } |
| 52 | + | 65 | + |
| 53 | + fdt_add_rtc_node(lvms, &pch_pic_phandle); | 66 | + /* set six LBT registers including scr0-scr3, eflags, ftop */ |
| 54 | + fdt_add_ged_reset(lvms); | 67 | + ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); |
| 55 | + platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | 68 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); |
| 56 | + VIRT_PLATFORM_BUS_BASEADDRESS, | 69 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); |
| 57 | + VIRT_PLATFORM_BUS_SIZE, | 70 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); |
| 58 | + VIRT_PLATFORM_BUS_IRQ); | 71 | + /* |
| 72 | + * Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however | ||
| 73 | + * lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register | ||
| 74 | + */ | ||
| 75 | + val = env->lbt.eflags; | ||
| 76 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); | ||
| 77 | + val = env->lbt.ftop; | ||
| 78 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); | ||
| 59 | + | 79 | + |
| 60 | + /* | 80 | + return ret; |
| 61 | + * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
| 62 | + * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
| 63 | + * access. FDT size limit with 1 MiB. | ||
| 64 | + * Put the FDT into the memory map as a ROM image: this will ensure | ||
| 65 | + * the FDT is copied again upon reset, even if addr points into RAM. | ||
| 66 | + */ | ||
| 67 | + qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
| 68 | + rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
| 69 | + &address_space_memory); | ||
| 70 | + qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
| 71 | + rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
| 72 | +} | 81 | +} |
| 73 | + | 82 | + |
| 74 | static void virt_done(Notifier *notifier, void *data) | 83 | +static int kvm_loongarch_get_lbt(CPUState *cs) |
| 84 | +{ | ||
| 85 | + CPULoongArchState *env = cpu_env(cs); | ||
| 86 | + uint64_t val; | ||
| 87 | + int ret; | ||
| 88 | + | ||
| 89 | + /* check whether vm support LBT firstly */ | ||
| 90 | + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { | ||
| 91 | + return 0; | ||
| 92 | + } | ||
| 93 | + | ||
| 94 | + /* get six LBT registers including scr0-scr3, eflags, ftop */ | ||
| 95 | + ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); | ||
| 96 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); | ||
| 97 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); | ||
| 98 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); | ||
| 99 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); | ||
| 100 | + env->lbt.eflags = (uint32_t)val; | ||
| 101 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); | ||
| 102 | + env->lbt.ftop = (uint32_t)val; | ||
| 103 | + | ||
| 104 | + return ret; | ||
| 105 | +} | ||
| 106 | + | ||
| 107 | void kvm_arch_reset_vcpu(CPUState *cs) | ||
| 75 | { | 108 | { |
| 76 | LoongArchVirtMachineState *lvms = container_of(notifier, | 109 | CPULoongArchState *env = cpu_env(cs); |
| 77 | LoongArchVirtMachineState, machine_done); | 110 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp) |
| 78 | virt_build_smbios(lvms); | 111 | return ret; |
| 79 | loongarch_acpi_setup(lvms); | 112 | } |
| 80 | + virt_fdt_setup(lvms); | 113 | |
| 114 | + ret = kvm_loongarch_get_lbt(cs); | ||
| 115 | + if (ret) { | ||
| 116 | + return ret; | ||
| 117 | + } | ||
| 118 | + | ||
| 119 | ret = kvm_loongarch_get_mpstate(cs); | ||
| 120 | return ret; | ||
| 81 | } | 121 | } |
| 82 | 122 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) | |
| 83 | static void virt_powerdown_req(Notifier *notifier, void *opaque) | 123 | return ret; |
| 84 | @@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic) | 124 | } |
| 125 | |||
| 126 | + ret = kvm_loongarch_put_lbt(cs); | ||
| 127 | + if (ret) { | ||
| 128 | + return ret; | ||
| 129 | + } | ||
| 130 | + | ||
| 131 | ret = kvm_loongarch_put_mpstate(cs); | ||
| 132 | return ret; | ||
| 85 | } | 133 | } |
| 86 | 134 | diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c | |
| 87 | static void virt_devices_init(DeviceState *pch_pic, | 135 | index XXXXXXX..XXXXXXX 100644 |
| 88 | - LoongArchVirtMachineState *lvms, | 136 | --- a/target/loongarch/machine.c |
| 89 | - uint32_t *pch_pic_phandle, | 137 | +++ b/target/loongarch/machine.c |
| 90 | - uint32_t *pch_msi_phandle) | 138 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_lasx = { |
| 91 | + LoongArchVirtMachineState *lvms) | 139 | }, |
| 140 | }; | ||
| 141 | |||
| 142 | +static bool lbt_needed(void *opaque) | ||
| 143 | +{ | ||
| 144 | + LoongArchCPU *cpu = opaque; | ||
| 145 | + | ||
| 146 | + return !!FIELD_EX64(cpu->env.cpucfg[2], CPUCFG2, LBT_ALL); | ||
| 147 | +} | ||
| 148 | + | ||
| 149 | +static const VMStateDescription vmstate_lbt = { | ||
| 150 | + .name = "cpu/lbt", | ||
| 151 | + .version_id = 0, | ||
| 152 | + .minimum_version_id = 0, | ||
| 153 | + .needed = lbt_needed, | ||
| 154 | + .fields = (const VMStateField[]) { | ||
| 155 | + VMSTATE_UINT64(env.lbt.scr0, LoongArchCPU), | ||
| 156 | + VMSTATE_UINT64(env.lbt.scr1, LoongArchCPU), | ||
| 157 | + VMSTATE_UINT64(env.lbt.scr2, LoongArchCPU), | ||
| 158 | + VMSTATE_UINT64(env.lbt.scr3, LoongArchCPU), | ||
| 159 | + VMSTATE_UINT32(env.lbt.eflags, LoongArchCPU), | ||
| 160 | + VMSTATE_UINT32(env.lbt.ftop, LoongArchCPU), | ||
| 161 | + VMSTATE_END_OF_LIST() | ||
| 162 | + }, | ||
| 163 | +}; | ||
| 164 | + | ||
| 165 | #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) | ||
| 166 | static bool tlb_needed(void *opaque) | ||
| 92 | { | 167 | { |
| 93 | MachineClass *mc = MACHINE_GET_CLASS(lvms); | 168 | @@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = { |
| 94 | DeviceState *gpex_dev; | 169 | #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) |
| 95 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | 170 | &vmstate_tlb, |
| 96 | gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); | 171 | #endif |
| 172 | + &vmstate_lbt, | ||
| 173 | NULL | ||
| 97 | } | 174 | } |
| 98 | 175 | }; | |
| 99 | - /* Add pcie node */ | ||
| 100 | - fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle); | ||
| 101 | - | ||
| 102 | /* | ||
| 103 | * Create uart fdt node in reverse order so that they appear | ||
| 104 | * in the finished device tree lowest address first | ||
| 105 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
| 106 | serial_mm_init(get_system_memory(), base, 0, | ||
| 107 | qdev_get_gpio_in(pch_pic, irq), | ||
| 108 | 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); | ||
| 109 | - fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0); | ||
| 110 | } | ||
| 111 | |||
| 112 | /* Network init */ | ||
| 113 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
| 114 | sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, | ||
| 115 | qdev_get_gpio_in(pch_pic, | ||
| 116 | VIRT_RTC_IRQ - VIRT_GSI_BASE)); | ||
| 117 | - fdt_add_rtc_node(lvms, pch_pic_phandle); | ||
| 118 | - fdt_add_ged_reset(lvms); | ||
| 119 | |||
| 120 | /* acpi ged */ | ||
| 121 | lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); | ||
| 122 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 123 | CPULoongArchState *env; | ||
| 124 | CPUState *cpu_state; | ||
| 125 | int cpu, pin, i, start, num; | ||
| 126 | - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | ||
| 127 | |||
| 128 | /* | ||
| 129 | * Extended IRQ model. | ||
| 130 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 131 | memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, | ||
| 132 | sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); | ||
| 133 | |||
| 134 | - /* Add cpu interrupt-controller */ | ||
| 135 | - fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
| 136 | - | ||
| 137 | for (cpu = 0; cpu < ms->smp.cpus; cpu++) { | ||
| 138 | cpu_state = qemu_get_cpu(cpu); | ||
| 139 | cpudev = DEVICE(cpu_state); | ||
| 140 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 141 | } | ||
| 142 | } | ||
| 143 | |||
| 144 | - /* Add Extend I/O Interrupt Controller node */ | ||
| 145 | - fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
| 146 | - | ||
| 147 | pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | ||
| 148 | num = VIRT_PCH_PIC_IRQ_NUM; | ||
| 149 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); | ||
| 150 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 151 | qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); | ||
| 152 | } | ||
| 153 | |||
| 154 | - /* Add PCH PIC node */ | ||
| 155 | - fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
| 156 | - | ||
| 157 | pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); | ||
| 158 | start = num; | ||
| 159 | num = EXTIOI_IRQS - start; | ||
| 160 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 161 | qdev_get_gpio_in(extioi, i + start)); | ||
| 162 | } | ||
| 163 | |||
| 164 | - /* Add PCH MSI node */ | ||
| 165 | - fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
| 166 | - | ||
| 167 | - virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
| 168 | + virt_devices_init(pch_pic, lvms); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void virt_firmware_init(LoongArchVirtMachineState *lvms) | ||
| 172 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 173 | cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); | ||
| 174 | } | ||
| 175 | |||
| 176 | - create_fdt(lvms); | ||
| 177 | - | ||
| 178 | /* Create IOCSR space */ | ||
| 179 | memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, | ||
| 180 | machine, "iocsr", UINT64_MAX); | ||
| 181 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 182 | lacpu = LOONGARCH_CPU(cpu); | ||
| 183 | lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; | ||
| 184 | } | ||
| 185 | - fdt_add_cpu_nodes(lvms); | ||
| 186 | - fdt_add_memory_nodes(machine); | ||
| 187 | fw_cfg_add_memory(machine); | ||
| 188 | |||
| 189 | /* Node0 memory */ | ||
| 190 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 191 | memmap_table, | ||
| 192 | sizeof(struct memmap_entry) * (memmap_entries)); | ||
| 193 | } | ||
| 194 | - fdt_add_fw_cfg_node(lvms); | ||
| 195 | - fdt_add_flash_node(lvms); | ||
| 196 | |||
| 197 | /* Initialize the IO interrupt subsystem */ | ||
| 198 | virt_irq_init(lvms); | ||
| 199 | - platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
| 200 | - VIRT_PLATFORM_BUS_BASEADDRESS, | ||
| 201 | - VIRT_PLATFORM_BUS_SIZE, | ||
| 202 | - VIRT_PLATFORM_BUS_IRQ); | ||
| 203 | lvms->machine_done.notify = virt_done; | ||
| 204 | qemu_add_machine_init_done_notifier(&lvms->machine_done); | ||
| 205 | /* connect powerdown request */ | ||
| 206 | lvms->powerdown_notifier.notify = virt_powerdown_req; | ||
| 207 | qemu_register_powerdown_notifier(&lvms->powerdown_notifier); | ||
| 208 | |||
| 209 | - /* | ||
| 210 | - * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
| 211 | - * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
| 212 | - * access. FDT size limit with 1 MiB. | ||
| 213 | - * Put the FDT into the memory map as a ROM image: this will ensure | ||
| 214 | - * the FDT is copied again upon reset, even if addr points into RAM. | ||
| 215 | - */ | ||
| 216 | - qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
| 217 | - rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
| 218 | - &address_space_memory); | ||
| 219 | - qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
| 220 | - rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
| 221 | - | ||
| 222 | lvms->bootinfo.ram_size = ram_size; | ||
| 223 | loongarch_load_kernel(machine, &lvms->bootinfo); | ||
| 224 | } | ||
| 225 | -- | 176 | -- |
| 226 | 2.43.5 | 177 | 2.34.1 | diff view generated by jsdifflib |
| 1 | Like LSX feature, add type OnOffAuto for LASX feature setting. | 1 | From: Bibo Mao <maobibo@loongson.cn> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type | ||
| 4 | variable pmu to check the PMU feature. If the PMU Feature is not supported | ||
| 5 | with KVM host, it reports error if there is pmu=on command line. | ||
| 6 | |||
| 7 | If there is no any command line about pmu parameter, it checks whether | ||
| 8 | KVM host supports the PMU Feature and set the corresponding value in cpucfg. | ||
| 9 | |||
| 10 | This patch is based on lbt patch located at | ||
| 11 | https://lore.kernel.org/qemu-devel/20240904061859.86615-1-maobibo@loongson.cn | ||
| 12 | |||
| 13 | Co-developed-by: Song Gao <gaosong@loongson.cn> | ||
| 3 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 14 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 4 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 15 | Reviewed-by: Song Gao <gaosong@loongson.cn> |
| 16 | Message-Id: <20240918082315.2345034-1-maobibo@loongson.cn> | ||
| 17 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 5 | --- | 18 | --- |
| 6 | target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------ | 19 | target/loongarch/cpu.c | 19 +++++++++++++ |
| 7 | target/loongarch/cpu.h | 2 ++ | 20 | target/loongarch/cpu.h | 2 ++ |
| 8 | target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++ | 21 | target/loongarch/kvm/kvm.c | 41 +++++++++++++++++++++++++++ |
| 9 | 3 files changed, 89 insertions(+), 16 deletions(-) | 22 | target/loongarch/loongarch-qmp-cmds.c | 2 +- |
| 23 | 4 files changed, 63 insertions(+), 1 deletion(-) | ||
| 10 | 24 | ||
| 11 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 25 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
| 12 | index XXXXXXX..XXXXXXX 100644 | 26 | index XXXXXXX..XXXXXXX 100644 |
| 13 | --- a/target/loongarch/cpu.c | 27 | --- a/target/loongarch/cpu.c |
| 14 | +++ b/target/loongarch/cpu.c | 28 | +++ b/target/loongarch/cpu.c |
| 15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | 29 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lbt(Object *obj, bool value, Error **errp) |
| 16 | uint32_t val; | 30 | cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 17 | 31 | } | |
| 18 | cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | 32 | |
| 19 | + if (cpu->lsx == ON_OFF_AUTO_OFF) { | 33 | +static bool loongarch_get_pmu(Object *obj, Error **errp) |
| 20 | + cpu->lasx = ON_OFF_AUTO_OFF; | 34 | +{ |
| 21 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | 35 | + return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF; |
| 22 | + error_setg(errp, "Failed to disable LSX since LASX is enabled"); | 36 | +} |
| 23 | + return; | ||
| 24 | + } | ||
| 25 | + } | ||
| 26 | + | 37 | + |
| 27 | if (kvm_enabled()) { | 38 | +static void loongarch_set_pmu(Object *obj, bool value, Error **errp) |
| 28 | /* kvm feature detection in function kvm_arch_init_vcpu */ | 39 | +{ |
| 29 | return; | 40 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | 41 | + |
| 31 | error_setg(errp, "Failed to enable LSX in TCG mode"); | 42 | + cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 32 | return; | 43 | +} |
| 33 | } | 44 | + |
| 34 | + } else { | 45 | void loongarch_cpu_post_init(Object *obj) |
| 35 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0); | ||
| 36 | + val = cpu->env.cpucfg[2]; | ||
| 37 | } | ||
| 38 | |||
| 39 | cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
| 40 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
| 41 | |||
| 42 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
| 43 | { | ||
| 44 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 45 | - bool ret; | ||
| 46 | - | ||
| 47 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { | ||
| 48 | - ret = true; | ||
| 49 | - } else { | ||
| 50 | - ret = false; | ||
| 51 | - } | ||
| 52 | - return ret; | ||
| 53 | + return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF; | ||
| 54 | } | ||
| 55 | |||
| 56 | static void loongarch_set_lasx(Object *obj, bool value, Error **errp) | ||
| 57 | { | 46 | { |
| 58 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 47 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 59 | + uint32_t val; | 48 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
| 60 | 49 | loongarch_set_lbt); | |
| 61 | - if (value) { | 50 | object_property_set_description(obj, "lbt", |
| 62 | - if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | 51 | "Set off to disable Binary Tranlation."); |
| 63 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
| 64 | - } | ||
| 65 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1); | ||
| 66 | - } else { | ||
| 67 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
| 68 | + cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
| 69 | + if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) { | ||
| 70 | + error_setg(errp, "Failed to enable LASX since lSX is disabled"); | ||
| 71 | + return; | ||
| 72 | + } | ||
| 73 | + | 52 | + |
| 74 | + if (kvm_enabled()) { | 53 | + cpu->pmu = ON_OFF_AUTO_AUTO; |
| 75 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | 54 | + object_property_add_bool(obj, "pmu", loongarch_get_pmu, |
| 76 | + return; | 55 | + loongarch_set_pmu); |
| 56 | + object_property_set_description(obj, "pmu", | ||
| 57 | + "Set off to performance monitor unit."); | ||
| 58 | + | ||
| 59 | } else { | ||
| 60 | cpu->lbt = ON_OFF_AUTO_OFF; | ||
| 77 | } | 61 | } |
| 78 | + | ||
| 79 | + /* LASX feature detection in TCG mode */ | ||
| 80 | + val = cpu->env.cpucfg[2]; | ||
| 81 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
| 82 | + if (FIELD_EX32(val, CPUCFG2, LASX) == 0) { | ||
| 83 | + error_setg(errp, "Failed to enable LASX in TCG mode"); | ||
| 84 | + return; | ||
| 85 | + } | ||
| 86 | + } | ||
| 87 | + | ||
| 88 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value); | ||
| 89 | } | ||
| 90 | |||
| 91 | static bool loongarch_get_lbt(Object *obj, Error **errp) | ||
| 92 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
| 93 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 94 | |||
| 95 | cpu->lsx = ON_OFF_AUTO_AUTO; | ||
| 96 | + cpu->lasx = ON_OFF_AUTO_AUTO; | ||
| 97 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | ||
| 98 | loongarch_set_lsx); | ||
| 99 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | ||
| 100 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 62 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
| 101 | index XXXXXXX..XXXXXXX 100644 | 63 | index XXXXXXX..XXXXXXX 100644 |
| 102 | --- a/target/loongarch/cpu.h | 64 | --- a/target/loongarch/cpu.h |
| 103 | +++ b/target/loongarch/cpu.h | 65 | +++ b/target/loongarch/cpu.h |
| 104 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | 66 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; |
| 105 | 67 | ||
| 106 | enum loongarch_features { | 68 | enum loongarch_features { |
| 107 | LOONGARCH_FEATURE_LSX, | ||
| 108 | + LOONGARCH_FEATURE_LASX, | ||
| 109 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | 69 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ |
| 110 | LOONGARCH_FEATURE_PMU, | 70 | + LOONGARCH_FEATURE_PMU, |
| 111 | }; | 71 | }; |
| 72 | |||
| 73 | typedef struct LoongArchBT { | ||
| 112 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | 74 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { |
| 75 | QEMUTimer timer; | ||
| 76 | uint32_t phy_id; | ||
| 113 | OnOffAuto lbt; | 77 | OnOffAuto lbt; |
| 114 | OnOffAuto pmu; | 78 | + OnOffAuto pmu; |
| 115 | OnOffAuto lsx; | ||
| 116 | + OnOffAuto lasx; | ||
| 117 | 79 | ||
| 118 | /* 'compatible' string for this CPU for Linux device trees */ | 80 | /* 'compatible' string for this CPU for Linux device trees */ |
| 119 | const char *dtb_compatible; | 81 | const char *dtb_compatible; |
| 120 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | 82 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c |
| 121 | index XXXXXXX..XXXXXXX 100644 | 83 | index XXXXXXX..XXXXXXX 100644 |
| 122 | --- a/target/loongarch/kvm/kvm.c | 84 | --- a/target/loongarch/kvm/kvm.c |
| 123 | +++ b/target/loongarch/kvm/kvm.c | 85 | +++ b/target/loongarch/kvm/kvm.c |
| 124 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | 86 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) |
| 125 | } | 87 | attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT; |
| 88 | ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 89 | return (ret == 0); | ||
| 90 | + | ||
| 91 | + case LOONGARCH_FEATURE_PMU: | ||
| 92 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
| 93 | + attr.attr = KVM_LOONGARCH_VM_FEAT_PMU; | ||
| 94 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 95 | + return (ret == 0); | ||
| 96 | + | ||
| 97 | default: | ||
| 126 | return false; | 98 | return false; |
| 127 | 99 | } | |
| 128 | + case LOONGARCH_FEATURE_LASX: | ||
| 129 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
| 130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LASX; | ||
| 131 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 132 | + if (ret == 0) { | ||
| 133 | + return true; | ||
| 134 | + } | ||
| 135 | + | 100 | + |
| 136 | + /* Fallback to old kernel detect interface */ | 101 | + return false; |
| 137 | + val = 0; | 102 | } |
| 138 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | 103 | |
| 139 | + /* Cpucfg2 */ | 104 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
| 140 | + attr.attr = 2; | 105 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
| 141 | + attr.addr = (uint64_t)&val; | ||
| 142 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 143 | + if (!ret) { | ||
| 144 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
| 145 | + if (ret) { | ||
| 146 | + return false; | ||
| 147 | + } | ||
| 148 | + | ||
| 149 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX); | ||
| 150 | + return (ret != 0); | ||
| 151 | + } | ||
| 152 | + return false; | ||
| 153 | + | ||
| 154 | case LOONGARCH_FEATURE_LBT: | ||
| 155 | /* | ||
| 156 | * Return all if all the LBT features are supported such as: | ||
| 157 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
| 158 | return 0; | 106 | return 0; |
| 159 | } | 107 | } |
| 160 | 108 | ||
| 161 | +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) | 109 | +static int kvm_cpu_check_pmu(CPUState *cs, Error **errp) |
| 162 | +{ | 110 | +{ |
| 111 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | ||
| 163 | + CPULoongArchState *env = cpu_env(cs); | 112 | + CPULoongArchState *env = cpu_env(cs); |
| 164 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | ||
| 165 | + bool kvm_supported; | 113 | + bool kvm_supported; |
| 166 | + | 114 | + |
| 167 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); | 115 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU); |
| 168 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); | 116 | + if (cpu->pmu == ON_OFF_AUTO_ON) { |
| 169 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | 117 | + if (!kvm_supported) { |
| 170 | + if (kvm_supported) { | 118 | + error_setg(errp, "'pmu' feature not supported by KVM on the host"); |
| 171 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
| 172 | + } else { | ||
| 173 | + error_setg(errp, "'lasx' feature not supported by KVM on host"); | ||
| 174 | + return -ENOTSUP; | 119 | + return -ENOTSUP; |
| 175 | + } | 120 | + } |
| 176 | + } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) { | 121 | + } else if (cpu->pmu != ON_OFF_AUTO_AUTO) { |
| 177 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | 122 | + /* disable pmu if ON_OFF_AUTO_OFF is set */ |
| 123 | + kvm_supported = false; | ||
| 178 | + } | 124 | + } |
| 179 | + | 125 | + |
| 126 | + if (kvm_supported) { | ||
| 127 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1); | ||
| 128 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3); | ||
| 129 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63); | ||
| 130 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1); | ||
| 131 | + } | ||
| 180 | + return 0; | 132 | + return 0; |
| 181 | +} | 133 | +} |
| 182 | + | 134 | + |
| 183 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | 135 | int kvm_arch_init_vcpu(CPUState *cs) |
| 184 | { | 136 | { |
| 185 | CPULoongArchState *env = cpu_env(cs); | 137 | uint64_t val; |
| 186 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) | 138 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
| 139 | if (ret < 0) { | ||
| 187 | error_report_err(local_err); | 140 | error_report_err(local_err); |
| 188 | } | 141 | } |
| 189 | 142 | + | |
| 190 | + ret = kvm_cpu_check_lasx(cs, &local_err); | 143 | + ret = kvm_cpu_check_pmu(cs, &local_err); |
| 191 | + if (ret < 0) { | 144 | + if (ret < 0) { |
| 192 | + error_report_err(local_err); | 145 | + error_report_err(local_err); |
| 193 | + } | 146 | + } |
| 194 | + | 147 | + |
| 195 | ret = kvm_cpu_check_lbt(cs, &local_err); | 148 | return ret; |
| 196 | if (ret < 0) { | 149 | } |
| 197 | error_report_err(local_err); | 150 | |
| 151 | diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c | ||
| 152 | index XXXXXXX..XXXXXXX 100644 | ||
| 153 | --- a/target/loongarch/loongarch-qmp-cmds.c | ||
| 154 | +++ b/target/loongarch/loongarch-qmp-cmds.c | ||
| 155 | @@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) | ||
| 156 | } | ||
| 157 | |||
| 158 | static const char *cpu_model_advertised_features[] = { | ||
| 159 | - "lsx", "lasx", "lbt", NULL | ||
| 160 | + "lsx", "lasx", "lbt", "pmu", NULL | ||
| 161 | }; | ||
| 162 | |||
| 163 | CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, | ||
| 198 | -- | 164 | -- |
| 199 | 2.43.5 | 165 | 2.34.1 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | From: Bibo Mao <maobibo@loongson.cn> | ||
| 1 | 2 | ||
| 3 | since 6.11, unistd.h includes header file unistd_64.h directly on | ||
| 4 | some platforms, here add unistd_64.h on these platforms. Affected | ||
| 5 | platforms are ARM64, LoongArch64 and Riscv. Otherwise there will | ||
| 6 | be compiling error such as: | ||
| 7 | |||
| 8 | linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or directory | ||
| 9 | #include <asm/unistd_64.h> | ||
| 10 | |||
| 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 12 | Acked-by: Song Gao <gaosong@loongson.cn> | ||
| 13 | Message-Id: <20241028023809.1554405-2-maobibo@loongson.cn> | ||
| 14 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 15 | --- | ||
| 16 | scripts/update-linux-headers.sh | 6 ++++++ | ||
| 17 | 1 file changed, 6 insertions(+) | ||
| 18 | |||
| 19 | diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh | ||
| 20 | index XXXXXXX..XXXXXXX 100755 | ||
| 21 | --- a/scripts/update-linux-headers.sh | ||
| 22 | +++ b/scripts/update-linux-headers.sh | ||
| 23 | @@ -XXX,XX +XXX,XX @@ EOF | ||
| 24 | fi | ||
| 25 | if [ $arch = arm64 ]; then | ||
| 26 | cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/" | ||
| 27 | + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-arm64/" | ||
| 28 | fi | ||
| 29 | if [ $arch = x86 ]; then | ||
| 30 | cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/" | ||
| 31 | @@ -XXX,XX +XXX,XX @@ EOF | ||
| 32 | fi | ||
| 33 | if [ $arch = riscv ]; then | ||
| 34 | cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" | ||
| 35 | + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-riscv/" | ||
| 36 | + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-riscv/" | ||
| 37 | + fi | ||
| 38 | + if [ $arch = loongarch ]; then | ||
| 39 | + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/" | ||
| 40 | fi | ||
| 41 | done | ||
| 42 | arch= | ||
| 43 | -- | ||
| 44 | 2.34.1 | diff view generated by jsdifflib |
| 1 | For CPU object, possible_cpu_arch_ids() function is used rather than | 1 | From: Bibo Mao <maobibo@loongson.cn> |
|---|---|---|---|
| 2 | smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus | 2 | |
| 3 | is not accurate for all possible CPU objects, possible_cpu_arch_ids() | 3 | KVM LBT supports on LoongArch depends on the linux-header file |
| 4 | is used here. | 4 | kvm_para.h, add header file kvm_para.h here. |
| 5 | 5 | ||
| 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 7 | Acked-by: Song Gao <gaosong@loongson.cn> |
| 8 | Message-Id: <20241028023809.1554405-3-maobibo@loongson.cn> | ||
| 9 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 8 | --- | 10 | --- |
| 9 | hw/loongarch/virt.c | 39 +++++++++++++++++++++++++-------------- | 11 | scripts/update-linux-headers.sh | 1 + |
| 10 | 1 file changed, 25 insertions(+), 14 deletions(-) | 12 | 1 file changed, 1 insertion(+) |
| 11 | 13 | ||
| 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 14 | diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh |
| 13 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100755 |
| 14 | --- a/hw/loongarch/virt.c | 16 | --- a/scripts/update-linux-headers.sh |
| 15 | +++ b/hw/loongarch/virt.c | 17 | +++ b/scripts/update-linux-headers.sh |
| 16 | @@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms) | 18 | @@ -XXX,XX +XXX,XX @@ EOF |
| 17 | static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | 19 | cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-riscv/" |
| 18 | { | 20 | fi |
| 19 | int num; | 21 | if [ $arch = loongarch ]; then |
| 20 | - const MachineState *ms = MACHINE(lvms); | 22 | + cp "$hdrdir/include/asm/kvm_para.h" "$output/linux-headers/asm-loongarch/" |
| 21 | - int smp_cpus = ms->smp.cpus; | 23 | cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/" |
| 22 | + MachineState *ms = MACHINE(lvms); | 24 | fi |
| 23 | + MachineClass *mc = MACHINE_GET_CLASS(ms); | 25 | done |
| 24 | + const CPUArchIdList *possible_cpus; | ||
| 25 | + LoongArchCPU *cpu; | ||
| 26 | + CPUState *cs; | ||
| 27 | + char *nodename, *map_path; | ||
| 28 | |||
| 29 | qemu_fdt_add_subnode(ms->fdt, "/cpus"); | ||
| 30 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); | ||
| 31 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); | ||
| 32 | |||
| 33 | /* cpu nodes */ | ||
| 34 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
| 35 | - char *nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 36 | - LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num)); | ||
| 37 | - CPUState *cs = CPU(cpu); | ||
| 38 | + possible_cpus = mc->possible_cpu_arch_ids(ms); | ||
| 39 | + for (num = 0; num < possible_cpus->len; num++) { | ||
| 40 | + cs = possible_cpus->cpus[num].cpu; | ||
| 41 | + if (cs == NULL) { | ||
| 42 | + continue; | ||
| 43 | + } | ||
| 44 | + | ||
| 45 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 46 | + cpu = LOONGARCH_CPU(cs); | ||
| 47 | |||
| 48 | qemu_fdt_add_subnode(ms->fdt, nodename); | ||
| 49 | qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); | ||
| 50 | qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", | ||
| 51 | cpu->dtb_compatible); | ||
| 52 | - if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { | ||
| 53 | + if (possible_cpus->cpus[num].props.has_node_id) { | ||
| 54 | qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", | ||
| 55 | - ms->possible_cpus->cpus[cs->cpu_index].props.node_id); | ||
| 56 | + possible_cpus->cpus[num].props.node_id); | ||
| 57 | } | ||
| 58 | qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); | ||
| 59 | qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", | ||
| 60 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
| 61 | |||
| 62 | /*cpu map */ | ||
| 63 | qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); | ||
| 64 | + for (num = 0; num < possible_cpus->len; num++) { | ||
| 65 | + cs = possible_cpus->cpus[num].cpu; | ||
| 66 | + if (cs == NULL) { | ||
| 67 | + continue; | ||
| 68 | + } | ||
| 69 | |||
| 70 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
| 71 | - char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 72 | - char *map_path; | ||
| 73 | - | ||
| 74 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 75 | if (ms->smp.threads > 1) { | ||
| 76 | map_path = g_strdup_printf( | ||
| 77 | "/cpus/cpu-map/socket%d/core%d/thread%d", | ||
| 78 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
| 79 | num % ms->smp.cores); | ||
| 80 | } | ||
| 81 | qemu_fdt_add_path(ms->fdt, map_path); | ||
| 82 | - qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); | ||
| 83 | + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename); | ||
| 84 | |||
| 85 | g_free(map_path); | ||
| 86 | - g_free(cpu_path); | ||
| 87 | + g_free(nodename); | ||
| 88 | } | ||
| 89 | } | ||
| 90 | |||
| 91 | -- | 26 | -- |
| 92 | 2.43.5 | 27 | 2.34.1 | diff view generated by jsdifflib |
| 1 | Hardcoded 32 bytes is used for vbsrl emulation check, there is | 1 | When we run “qemu-system-loongarch64 -qmp stdio -vnc none -S”, |
|---|---|---|---|
| 2 | problem when options lsx=on,lasx=off is used for vbsrl.v instruction | 2 | we get an error message “Need kernel filename” and then we can't use qmp cmd to query some information. |
| 3 | in TCG mode. It injects LASX exception rather LSX exception. | 3 | So, we just throw a warning and then the cpus starts running from address VIRT_FLASH0_BASE. |
| 4 | 4 | ||
| 5 | Here actual operand size is used. | 5 | Signed-off-by: Song Gao <gaosong@loongson.cn> |
| 6 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 7 | Message-Id: <20241030012359.4040817-1-gaosong@loongson.cn> | ||
| 8 | --- | ||
| 9 | hw/loongarch/boot.c | 5 ++--- | ||
| 10 | 1 file changed, 2 insertions(+), 3 deletions(-) | ||
| 6 | 11 | ||
| 7 | Cc: qemu-stable@nongnu.org | 12 | diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c |
| 8 | Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve") | ||
| 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 12 | --- | ||
| 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- | ||
| 14 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 15 | |||
| 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
| 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc | 14 | --- a/hw/loongarch/boot.c |
| 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc | 15 | +++ b/hw/loongarch/boot.c |
| 20 | @@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz) | 16 | @@ -XXX,XX +XXX,XX @@ static void init_boot_rom(struct loongarch_boot_info *info, void *p) |
| 17 | static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info) | ||
| 21 | { | 18 | { |
| 22 | int i, ofs; | 19 | void *p, *bp; |
| 23 | 20 | - int64_t kernel_addr = 0; | |
| 24 | - if (!check_vec(ctx, 32)) { | 21 | + int64_t kernel_addr = VIRT_FLASH0_BASE; |
| 25 | + if (!check_vec(ctx, oprsz)) { | 22 | LoongArchCPU *lacpu; |
| 26 | return true; | 23 | CPUState *cs; |
| 24 | |||
| 25 | @@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info) | ||
| 26 | kernel_addr = load_kernel_info(info); | ||
| 27 | } else { | ||
| 28 | if(!qtest_enabled()) { | ||
| 29 | - error_report("Need kernel filename\n"); | ||
| 30 | - exit(1); | ||
| 31 | + warn_report("No kernel provided, booting from flash drive."); | ||
| 32 | } | ||
| 27 | } | 33 | } |
| 28 | 34 | ||
| 29 | -- | 35 | -- |
| 30 | 2.43.5 | 36 | 2.34.1 |
| 31 | 37 | ||
| 32 | 38 | diff view generated by jsdifflib |
| 1 | From: ghy <2247883756@qq.com> | 1 | From: Bibo Mao <maobibo@loongson.cn> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Refer to the link below for a description of the vldi instructions: | 3 | With pv steal time supported, VM machine needs get physical address |
| 4 | https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 | 4 | of each vcpu and notify new host during migration. Here two |
| 5 | Fixed errors in vldi instruction implementation. | 5 | functions kvm_get_stealtime/kvm_set_stealtime, and guest steal time |
| 6 | physical address is only updated on KVM_PUT_FULL_STATE stage. | ||
| 6 | 7 | ||
| 7 | Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> | ||
| 8 | Tested-by: Xianglai Li <lixianglai@loongson.cn> | ||
| 9 | Signed-off-by: Xianglai Li <lixianglai@loongson.cn> | ||
| 10 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
| 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 8 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 9 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
| 10 | Message-Id: <20240930064040.753929-1-maobibo@loongson.cn> | ||
| 11 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 12 | --- | 12 | --- |
| 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- | 13 | target/loongarch/cpu.h | 3 ++ |
| 14 | 1 file changed, 1 insertion(+), 1 deletion(-) | 14 | target/loongarch/kvm/kvm.c | 65 ++++++++++++++++++++++++++++++++++++++ |
| 15 | target/loongarch/machine.c | 6 ++-- | ||
| 16 | 3 files changed, 72 insertions(+), 2 deletions(-) | ||
| 15 | 17 | ||
| 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc | 18 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
| 17 | index XXXXXXX..XXXXXXX 100644 | 19 | index XXXXXXX..XXXXXXX 100644 |
| 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc | 20 | --- a/target/loongarch/cpu.h |
| 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc | 21 | +++ b/target/loongarch/cpu.h |
| 20 | @@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm) | 22 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState { |
| 21 | break; | 23 | uint64_t CSR_DBG; |
| 22 | case 1: | 24 | uint64_t CSR_DERA; |
| 23 | /* data: {2{16'0, imm[7:0], 8'0}} */ | 25 | uint64_t CSR_DSAVE; |
| 24 | - data = (t << 24) | (t << 8); | 26 | + struct { |
| 25 | + data = (t << 40) | (t << 8); | 27 | + uint64_t guest_addr; |
| 26 | break; | 28 | + } stealtime; |
| 27 | case 2: | 29 | |
| 28 | /* data: {2{8'0, imm[7:0], 16'0}} */ | 30 | #ifdef CONFIG_TCG |
| 31 | float_status fp_status; | ||
| 32 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
| 33 | index XXXXXXX..XXXXXXX 100644 | ||
| 34 | --- a/target/loongarch/kvm/kvm.c | ||
| 35 | +++ b/target/loongarch/kvm/kvm.c | ||
| 36 | @@ -XXX,XX +XXX,XX @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { | ||
| 37 | KVM_CAP_LAST_INFO | ||
| 38 | }; | ||
| 39 | |||
| 40 | +static int kvm_get_stealtime(CPUState *cs) | ||
| 41 | +{ | ||
| 42 | + CPULoongArchState *env = cpu_env(cs); | ||
| 43 | + int err; | ||
| 44 | + struct kvm_device_attr attr = { | ||
| 45 | + .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, | ||
| 46 | + .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, | ||
| 47 | + .addr = (uint64_t)&env->stealtime.guest_addr, | ||
| 48 | + }; | ||
| 49 | + | ||
| 50 | + err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); | ||
| 51 | + if (err) { | ||
| 52 | + return 0; | ||
| 53 | + } | ||
| 54 | + | ||
| 55 | + err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, attr); | ||
| 56 | + if (err) { | ||
| 57 | + error_report("PVTIME: KVM_GET_DEVICE_ATTR: %s", strerror(errno)); | ||
| 58 | + return err; | ||
| 59 | + } | ||
| 60 | + | ||
| 61 | + return 0; | ||
| 62 | +} | ||
| 63 | + | ||
| 64 | +static int kvm_set_stealtime(CPUState *cs) | ||
| 65 | +{ | ||
| 66 | + CPULoongArchState *env = cpu_env(cs); | ||
| 67 | + int err; | ||
| 68 | + struct kvm_device_attr attr = { | ||
| 69 | + .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, | ||
| 70 | + .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, | ||
| 71 | + .addr = (uint64_t)&env->stealtime.guest_addr, | ||
| 72 | + }; | ||
| 73 | + | ||
| 74 | + err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); | ||
| 75 | + if (err) { | ||
| 76 | + return 0; | ||
| 77 | + } | ||
| 78 | + | ||
| 79 | + err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); | ||
| 80 | + if (err) { | ||
| 81 | + error_report("PVTIME: KVM_SET_DEVICE_ATTR %s with gpa "TARGET_FMT_lx, | ||
| 82 | + strerror(errno), env->stealtime.guest_addr); | ||
| 83 | + return err; | ||
| 84 | + } | ||
| 85 | + | ||
| 86 | + return 0; | ||
| 87 | +} | ||
| 88 | + | ||
| 89 | static int kvm_loongarch_get_regs_core(CPUState *cs) | ||
| 90 | { | ||
| 91 | int ret = 0; | ||
| 92 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp) | ||
| 93 | return ret; | ||
| 94 | } | ||
| 95 | |||
| 96 | + ret = kvm_get_stealtime(cs); | ||
| 97 | + if (ret) { | ||
| 98 | + return ret; | ||
| 99 | + } | ||
| 100 | + | ||
| 101 | ret = kvm_loongarch_get_mpstate(cs); | ||
| 102 | return ret; | ||
| 103 | } | ||
| 104 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) | ||
| 105 | return ret; | ||
| 106 | } | ||
| 107 | |||
| 108 | + if (level >= KVM_PUT_FULL_STATE) { | ||
| 109 | + /* | ||
| 110 | + * only KVM_PUT_FULL_STATE is required, kvm kernel will clear | ||
| 111 | + * guest_addr for KVM_PUT_RESET_STATE | ||
| 112 | + */ | ||
| 113 | + ret = kvm_set_stealtime(cs); | ||
| 114 | + if (ret) { | ||
| 115 | + return ret; | ||
| 116 | + } | ||
| 117 | + } | ||
| 118 | + | ||
| 119 | ret = kvm_loongarch_put_mpstate(cs); | ||
| 120 | return ret; | ||
| 121 | } | ||
| 122 | diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c | ||
| 123 | index XXXXXXX..XXXXXXX 100644 | ||
| 124 | --- a/target/loongarch/machine.c | ||
| 125 | +++ b/target/loongarch/machine.c | ||
| 126 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = { | ||
| 127 | /* LoongArch CPU state */ | ||
| 128 | const VMStateDescription vmstate_loongarch_cpu = { | ||
| 129 | .name = "cpu", | ||
| 130 | - .version_id = 2, | ||
| 131 | - .minimum_version_id = 2, | ||
| 132 | + .version_id = 3, | ||
| 133 | + .minimum_version_id = 3, | ||
| 134 | .fields = (const VMStateField[]) { | ||
| 135 | VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32), | ||
| 136 | VMSTATE_UINTTL(env.pc, LoongArchCPU), | ||
| 137 | @@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = { | ||
| 138 | VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU), | ||
| 139 | |||
| 140 | VMSTATE_UINT64(kvm_state_counter, LoongArchCPU), | ||
| 141 | + /* PV steal time */ | ||
| 142 | + VMSTATE_UINT64(env.stealtime.guest_addr, LoongArchCPU), | ||
| 143 | |||
| 144 | VMSTATE_END_OF_LIST() | ||
| 145 | }, | ||
| 29 | -- | 146 | -- |
| 30 | 2.43.5 | 147 | 2.34.1 | diff view generated by jsdifflib |