1 | The following changes since commit 8032c78e556cd0baec111740a6c636863f9bd7c8: | 1 | The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595: |
---|---|---|---|
2 | 2 | ||
3 | Merge tag 'firmware-20241216-pull-request' of https://gitlab.com/kraxel/qemu into staging (2024-12-16 14:20:33 -0500) | 3 | Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500) |
4 | 4 | ||
5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
6 | 6 | ||
7 | https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241219 | 7 | https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227 |
8 | 8 | ||
9 | for you to fetch changes up to 6f6006ad07243543595c7607ffbeee7f45b94b80: | 9 | for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424: |
10 | 10 | ||
11 | hw/intc/loongarch_extioi: Code cleanup about loongarch_extioi (2024-12-19 15:23:30 +0800) | 11 | target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800) |
12 | 12 | ||
13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
14 | pull-loongarch-20241219 | 14 | pull-loongarch-20241227 |
15 | v2 .. v3: | 15 | v1 ... v2 |
16 | 1. Fix make check issue on freeBSD 14 | 16 | 1. Modify patch auther inconsistent with SOB |
17 | |||
18 | v1 .. v2: | ||
19 | 1. Push patch again since forgot to push to upstream | ||
20 | 17 | ||
21 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
22 | Bibo Mao (18): | 19 | Bibo Mao (5): |
23 | include: Add loongarch_pic_common header file | 20 | target/loongarch: Use actual operand size with vbsrl check |
24 | include: Move struct LoongArchPCHPIC to loongarch_pic_common header file | 21 | hw/loongarch/virt: Create fdt table on machine creation done notification |
25 | hw/intc/loongarch_pch: Merge instance_init() into realize() | 22 | hw/loongarch/virt: Improve fdt table creation for CPU object |
26 | hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState | 23 | target/loongarch: Use auto method with LSX feature |
27 | hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common | 24 | target/loongarch: Use auto method with LASX feature |
28 | hw/intc/loongarch_pch: Inherit from loongarch_pic_common | ||
29 | hw/intc/loongarch_pch: Add pre_save and post_load interfaces | ||
30 | hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic | ||
31 | include: Add loongarch_extioi_common header file | ||
32 | include: Move struct LoongArchExtIOI to header file loongarch_extioi_common | ||
33 | include: Rename LoongArchExtIOI with LoongArchExtIOICommonState | ||
34 | hw/intc/loongarch_extioi: Rename LoongArchExtIOI with LoongArchExtIOICommonState | ||
35 | hw/intc/loongarch_extioi: Add common realize interface | ||
36 | hw/intc/loongarch_extioi: Add unrealize interface | ||
37 | hw/intc/loongarch_extioi: Add common file loongarch_extioi_common | ||
38 | hw/intc/loongarch_extioi: Inherit from loongarch_extioi_common | ||
39 | hw/intc/loongarch_extioi: Add pre_save interface | ||
40 | hw/intc/loongarch_extioi: Code cleanup about loongarch_extioi | ||
41 | 25 | ||
42 | hw/intc/loongarch_extioi.c | 112 ++++++++++------------------- | 26 | Guo Hongyu (1): |
43 | hw/intc/loongarch_extioi_common.c | 113 ++++++++++++++++++++++++++++++ | 27 | target/loongarch: Fix vldi inst |
44 | hw/intc/loongarch_pch_pic.c | 106 +++++++++------------------- | 28 | |
45 | hw/intc/loongarch_pic_common.c | 97 +++++++++++++++++++++++++ | 29 | hw/loongarch/virt.c | 142 ++++++++++++++---------- |
46 | hw/intc/meson.build | 4 +- | 30 | target/loongarch/cpu.c | 86 ++++++++------ |
47 | hw/loongarch/virt.c | 2 +- | 31 | target/loongarch/cpu.h | 4 + |
48 | include/hw/intc/loongarch_extioi.h | 84 +++------------------- | 32 | target/loongarch/kvm/kvm.c | 107 ++++++++++++++++++ |
49 | include/hw/intc/loongarch_extioi_common.h | 98 ++++++++++++++++++++++++++ | 33 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 4 +- |
50 | include/hw/intc/loongarch_pch_pic.h | 70 ++++-------------- | 34 | 5 files changed, 249 insertions(+), 94 deletions(-) |
51 | include/hw/intc/loongarch_pic_common.h | 82 ++++++++++++++++++++++ | ||
52 | 10 files changed, 490 insertions(+), 278 deletions(-) | ||
53 | create mode 100644 hw/intc/loongarch_extioi_common.c | ||
54 | create mode 100644 hw/intc/loongarch_pic_common.c | ||
55 | create mode 100644 include/hw/intc/loongarch_extioi_common.h | ||
56 | create mode 100644 include/hw/intc/loongarch_pic_common.h | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Add common header file hw/intc/loongarch_pic_common.h, and move | ||
2 | some macro definition from hw/intc/loongarch_pch_pic.h to the common | ||
3 | header file. | ||
4 | 1 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_pch_pic.h | 36 +++------------------- | ||
9 | include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++ | ||
10 | 2 files changed, 47 insertions(+), 31 deletions(-) | ||
11 | create mode 100644 include/hw/intc/loongarch_pic_common.h | ||
12 | |||
13 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
16 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | * Copyright (c) 2021 Loongson Technology Corporation Limited | ||
19 | */ | ||
20 | |||
21 | -#include "hw/sysbus.h" | ||
22 | +#ifndef HW_LOONGARCH_PCH_PIC_H | ||
23 | +#define HW_LOONGARCH_PCH_PIC_H | ||
24 | + | ||
25 | +#include "hw/intc/loongarch_pic_common.h" | ||
26 | |||
27 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
28 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
29 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
30 | |||
31 | -#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
32 | -#define PCH_PIC_INT_ID_VER 0x1UL | ||
33 | - | ||
34 | -#define PCH_PIC_INT_ID_LO 0x00 | ||
35 | -#define PCH_PIC_INT_ID_HI 0x04 | ||
36 | -#define PCH_PIC_INT_MASK_LO 0x20 | ||
37 | -#define PCH_PIC_INT_MASK_HI 0x24 | ||
38 | -#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
39 | -#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
40 | -#define PCH_PIC_INT_EDGE_LO 0x60 | ||
41 | -#define PCH_PIC_INT_EDGE_HI 0x64 | ||
42 | -#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
43 | -#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
44 | -#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
45 | -#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
46 | -#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
47 | -#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
48 | -#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
49 | -#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
50 | -#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
51 | -#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
52 | -#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
53 | -#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
54 | -#define PCH_PIC_INT_POL_LO 0x3e0 | ||
55 | -#define PCH_PIC_INT_POL_HI 0x3e4 | ||
56 | - | ||
57 | -#define STATUS_LO_START 0 | ||
58 | -#define STATUS_HI_START 0x4 | ||
59 | -#define POL_LO_START 0x40 | ||
60 | -#define POL_HI_START 0x44 | ||
61 | struct LoongArchPCHPIC { | ||
62 | SysBusDevice parent_obj; | ||
63 | qemu_irq parent_irq[64]; | ||
64 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC { | ||
65 | MemoryRegion iomem8; | ||
66 | unsigned int irq_num; | ||
67 | }; | ||
68 | +#endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
69 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
70 | new file mode 100644 | ||
71 | index XXXXXXX..XXXXXXX | ||
72 | --- /dev/null | ||
73 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
74 | @@ -XXX,XX +XXX,XX @@ | ||
75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
76 | +/* | ||
77 | + * LoongArch 7A1000 I/O interrupt controller definitions | ||
78 | + * Copyright (c) 2024 Loongson Technology Corporation Limited | ||
79 | + */ | ||
80 | + | ||
81 | +#ifndef HW_LOONGARCH_PIC_COMMON_H | ||
82 | +#define HW_LOONGARCH_PIC_COMMON_H | ||
83 | + | ||
84 | +#include "hw/pci-host/ls7a.h" | ||
85 | +#include "hw/sysbus.h" | ||
86 | + | ||
87 | +#define PCH_PIC_INT_ID_VAL 0x7000000UL | ||
88 | +#define PCH_PIC_INT_ID_VER 0x1UL | ||
89 | +#define PCH_PIC_INT_ID_LO 0x00 | ||
90 | +#define PCH_PIC_INT_ID_HI 0x04 | ||
91 | +#define PCH_PIC_INT_MASK_LO 0x20 | ||
92 | +#define PCH_PIC_INT_MASK_HI 0x24 | ||
93 | +#define PCH_PIC_HTMSI_EN_LO 0x40 | ||
94 | +#define PCH_PIC_HTMSI_EN_HI 0x44 | ||
95 | +#define PCH_PIC_INT_EDGE_LO 0x60 | ||
96 | +#define PCH_PIC_INT_EDGE_HI 0x64 | ||
97 | +#define PCH_PIC_INT_CLEAR_LO 0x80 | ||
98 | +#define PCH_PIC_INT_CLEAR_HI 0x84 | ||
99 | +#define PCH_PIC_AUTO_CTRL0_LO 0xc0 | ||
100 | +#define PCH_PIC_AUTO_CTRL0_HI 0xc4 | ||
101 | +#define PCH_PIC_AUTO_CTRL1_LO 0xe0 | ||
102 | +#define PCH_PIC_AUTO_CTRL1_HI 0xe4 | ||
103 | +#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100 | ||
104 | +#define PCH_PIC_ROUTE_ENTRY_END 0x13f | ||
105 | +#define PCH_PIC_HTMSI_VEC_OFFSET 0x200 | ||
106 | +#define PCH_PIC_HTMSI_VEC_END 0x23f | ||
107 | +#define PCH_PIC_INT_STATUS_LO 0x3a0 | ||
108 | +#define PCH_PIC_INT_STATUS_HI 0x3a4 | ||
109 | +#define PCH_PIC_INT_POL_LO 0x3e0 | ||
110 | +#define PCH_PIC_INT_POL_HI 0x3e4 | ||
111 | + | ||
112 | +#define STATUS_LO_START 0 | ||
113 | +#define STATUS_HI_START 0x4 | ||
114 | +#define POL_LO_START 0x40 | ||
115 | +#define POL_HI_START 0x44 | ||
116 | +#endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
117 | -- | ||
118 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h | ||
2 | to file loongarch_pic_common.h, and rename structure name with | ||
3 | LoongArchPICCommonState. | ||
4 | 1 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_pch_pic.h | 27 +------------------------ | ||
9 | include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++ | ||
10 | 2 files changed, 29 insertions(+), 26 deletions(-) | ||
11 | |||
12 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
15 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
16 | @@ -XXX,XX +XXX,XX @@ | ||
17 | |||
18 | #include "hw/intc/loongarch_pic_common.h" | ||
19 | |||
20 | +#define LoongArchPCHPIC LoongArchPICCommonState | ||
21 | #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
22 | #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
23 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
24 | |||
25 | -struct LoongArchPCHPIC { | ||
26 | - SysBusDevice parent_obj; | ||
27 | - qemu_irq parent_irq[64]; | ||
28 | - uint64_t int_mask; /*0x020 interrupt mask register*/ | ||
29 | - uint64_t htmsi_en; /*0x040 1=msi*/ | ||
30 | - uint64_t intedge; /*0x060 edge=1 level =0*/ | ||
31 | - uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/ | ||
32 | - uint64_t auto_crtl0; /*0x0c0*/ | ||
33 | - uint64_t auto_crtl1; /*0x0e0*/ | ||
34 | - uint64_t last_intirr; /* edge detection */ | ||
35 | - uint64_t intirr; /* 0x380 interrupt request register */ | ||
36 | - uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
37 | - /* | ||
38 | - * 0x3e0 interrupt level polarity selection | ||
39 | - * register 0 for high level trigger | ||
40 | - */ | ||
41 | - uint64_t int_polarity; | ||
42 | - | ||
43 | - uint8_t route_entry[64]; /*0x100 - 0x138*/ | ||
44 | - uint8_t htmsi_vector[64]; /*0x200 - 0x238*/ | ||
45 | - | ||
46 | - MemoryRegion iomem32_low; | ||
47 | - MemoryRegion iomem32_high; | ||
48 | - MemoryRegion iomem8; | ||
49 | - unsigned int irq_num; | ||
50 | -}; | ||
51 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
52 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
53 | index XXXXXXX..XXXXXXX 100644 | ||
54 | --- a/include/hw/intc/loongarch_pic_common.h | ||
55 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
56 | @@ -XXX,XX +XXX,XX @@ | ||
57 | #define STATUS_HI_START 0x4 | ||
58 | #define POL_LO_START 0x40 | ||
59 | #define POL_HI_START 0x44 | ||
60 | + | ||
61 | +struct LoongArchPICCommonState { | ||
62 | + SysBusDevice parent_obj; | ||
63 | + | ||
64 | + qemu_irq parent_irq[64]; | ||
65 | + uint64_t int_mask; /* 0x020 interrupt mask register */ | ||
66 | + uint64_t htmsi_en; /* 0x040 1=msi */ | ||
67 | + uint64_t intedge; /* 0x060 edge=1 level=0 */ | ||
68 | + uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */ | ||
69 | + uint64_t auto_crtl0; /* 0x0c0 */ | ||
70 | + uint64_t auto_crtl1; /* 0x0e0 */ | ||
71 | + uint64_t last_intirr; /* edge detection */ | ||
72 | + uint64_t intirr; /* 0x380 interrupt request register */ | ||
73 | + uint64_t intisr; /* 0x3a0 interrupt service register */ | ||
74 | + /* | ||
75 | + * 0x3e0 interrupt level polarity selection | ||
76 | + * register 0 for high level trigger | ||
77 | + */ | ||
78 | + uint64_t int_polarity; | ||
79 | + | ||
80 | + uint8_t route_entry[64]; /* 0x100 - 0x138 */ | ||
81 | + uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ | ||
82 | + | ||
83 | + MemoryRegion iomem32_low; | ||
84 | + MemoryRegion iomem32_high; | ||
85 | + MemoryRegion iomem8; | ||
86 | + unsigned int irq_num; | ||
87 | +}; | ||
88 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
89 | -- | ||
90 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Memory region is created in instance_init(), merge it into function | ||
2 | realize(). There is no special class_init() for loongarch_pch object. | ||
3 | 1 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | hw/intc/loongarch_pch_pic.c | 15 ++++----------- | ||
8 | 1 file changed, 4 insertions(+), 11 deletions(-) | ||
9 | |||
10 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
11 | index XXXXXXX..XXXXXXX 100644 | ||
12 | --- a/hw/intc/loongarch_pch_pic.c | ||
13 | +++ b/hw/intc/loongarch_pch_pic.c | ||
14 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
15 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
16 | { | ||
17 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
18 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
19 | |||
20 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
21 | error_setg(errp, "Invalid 'pic_irq_num'"); | ||
22 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
23 | |||
24 | qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); | ||
25 | qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); | ||
26 | -} | ||
27 | - | ||
28 | -static void loongarch_pch_pic_init(Object *obj) | ||
29 | -{ | ||
30 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); | ||
31 | - SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | ||
32 | - | ||
33 | - memory_region_init_io(&s->iomem32_low, obj, | ||
34 | + memory_region_init_io(&s->iomem32_low, OBJECT(dev), | ||
35 | &loongarch_pch_pic_reg32_low_ops, | ||
36 | s, PCH_PIC_NAME(.reg32_part1), 0x100); | ||
37 | - memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops, | ||
38 | + memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, | ||
39 | s, PCH_PIC_NAME(.reg8), 0x2a0); | ||
40 | - memory_region_init_io(&s->iomem32_high, obj, | ||
41 | + memory_region_init_io(&s->iomem32_high, OBJECT(dev), | ||
42 | &loongarch_pch_pic_reg32_high_ops, | ||
43 | s, PCH_PIC_NAME(.reg32_part2), 0xc60); | ||
44 | sysbus_init_mmio(sbd, &s->iomem32_low); | ||
45 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = { | ||
46 | .name = TYPE_LOONGARCH_PCH_PIC, | ||
47 | .parent = TYPE_SYS_BUS_DEVICE, | ||
48 | .instance_size = sizeof(LoongArchPCHPIC), | ||
49 | - .instance_init = loongarch_pch_pic_init, | ||
50 | .class_init = loongarch_pch_pic_class_init, | ||
51 | }; | ||
52 | |||
53 | -- | ||
54 | 2.43.5 | diff view generated by jsdifflib |
1 | Add new common file loongarch_extioi_common.c, and move vmstate | 1 | From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> |
---|---|---|---|
2 | and property structure to common file. | ||
3 | 2 | ||
3 | Refer to the link below for a description of the vldi instructions: | ||
4 | https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 | ||
5 | Fixed errors in vldi instruction implementation. | ||
6 | |||
7 | Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> | ||
8 | Tested-by: Xianglai Li <lixianglai@loongson.cn> | ||
9 | Signed-off-by: Xianglai Li <lixianglai@loongson.cn> | ||
10 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | 12 | --- |
7 | hw/intc/loongarch_extioi.c | 59 +---------------------------- | 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- |
8 | hw/intc/loongarch_extioi_common.c | 63 +++++++++++++++++++++++++++++++ | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
9 | 2 files changed, 65 insertions(+), 57 deletions(-) | ||
10 | create mode 100644 hw/intc/loongarch_extioi_common.c | ||
11 | 15 | ||
12 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
13 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
14 | --- a/hw/intc/loongarch_extioi.c | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
15 | +++ b/hw/intc/loongarch_extioi.c | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
16 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps extioi_virt_ops = { | 20 | @@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm) |
17 | .endianness = DEVICE_LITTLE_ENDIAN, | 21 | break; |
18 | }; | 22 | case 1: |
19 | 23 | /* data: {2{16'0, imm[7:0], 8'0}} */ | |
20 | -static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp) | 24 | - data = (t << 24) | (t << 8); |
21 | -{ | 25 | + data = (t << 40) | (t << 8); |
22 | - LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev; | 26 | break; |
23 | - | 27 | case 2: |
24 | - if (s->num_cpu == 0) { | 28 | /* data: {2{8'0, imm[7:0], 16'0}} */ |
25 | - error_setg(errp, "num-cpu must be at least 1"); | ||
26 | - return; | ||
27 | - } | ||
28 | -} | ||
29 | +static int vmstate_extioi_post_load(void *opaque, int version_id); | ||
30 | +#include "loongarch_extioi_common.c" | ||
31 | |||
32 | static void loongarch_extioi_realize(DeviceState *dev, Error **errp) | ||
33 | { | ||
34 | @@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id) | ||
35 | return 0; | ||
36 | } | ||
37 | |||
38 | -static int loongarch_extioi_common_post_load(void *opaque, int version_id) | ||
39 | -{ | ||
40 | - return vmstate_extioi_post_load(opaque, version_id); | ||
41 | -} | ||
42 | - | ||
43 | -static const VMStateDescription vmstate_extioi_core = { | ||
44 | - .name = "extioi-core", | ||
45 | - .version_id = 1, | ||
46 | - .minimum_version_id = 1, | ||
47 | - .fields = (const VMStateField[]) { | ||
48 | - VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT), | ||
49 | - VMSTATE_END_OF_LIST() | ||
50 | - } | ||
51 | -}; | ||
52 | - | ||
53 | -static const VMStateDescription vmstate_loongarch_extioi = { | ||
54 | - .name = "loongarch.extioi", | ||
55 | - .version_id = 3, | ||
56 | - .minimum_version_id = 3, | ||
57 | - .post_load = loongarch_extioi_common_post_load, | ||
58 | - .fields = (const VMStateField[]) { | ||
59 | - VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState, | ||
60 | - EXTIOI_IRQS_GROUP_COUNT), | ||
61 | - VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState, | ||
62 | - EXTIOI_IRQS_NODETYPE_COUNT / 2), | ||
63 | - VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState, | ||
64 | - EXTIOI_IRQS / 32), | ||
65 | - VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState, | ||
66 | - EXTIOI_IRQS / 32), | ||
67 | - VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState, | ||
68 | - EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
69 | - VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState, | ||
70 | - EXTIOI_IRQS / 4), | ||
71 | - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState, | ||
72 | - num_cpu, vmstate_extioi_core, ExtIOICore), | ||
73 | - VMSTATE_UINT32(features, LoongArchExtIOICommonState), | ||
74 | - VMSTATE_UINT32(status, LoongArchExtIOICommonState), | ||
75 | - VMSTATE_END_OF_LIST() | ||
76 | - } | ||
77 | -}; | ||
78 | - | ||
79 | -static const Property extioi_properties[] = { | ||
80 | - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), | ||
81 | - DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, | ||
82 | - features, EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
83 | - DEFINE_PROP_END_OF_LIST(), | ||
84 | -}; | ||
85 | - | ||
86 | static void loongarch_extioi_class_init(ObjectClass *klass, void *data) | ||
87 | { | ||
88 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
89 | diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c | ||
90 | new file mode 100644 | ||
91 | index XXXXXXX..XXXXXXX | ||
92 | --- /dev/null | ||
93 | +++ b/hw/intc/loongarch_extioi_common.c | ||
94 | @@ -XXX,XX +XXX,XX @@ | ||
95 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
96 | +/* | ||
97 | + * Loongson extioi interrupt controller emulation | ||
98 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
99 | + */ | ||
100 | + | ||
101 | +static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp) | ||
102 | +{ | ||
103 | + LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev; | ||
104 | + | ||
105 | + if (s->num_cpu == 0) { | ||
106 | + error_setg(errp, "num-cpu must be at least 1"); | ||
107 | + return; | ||
108 | + } | ||
109 | +} | ||
110 | + | ||
111 | +static int loongarch_extioi_common_post_load(void *opaque, int version_id) | ||
112 | +{ | ||
113 | + return vmstate_extioi_post_load(opaque, version_id); | ||
114 | +} | ||
115 | + | ||
116 | +static const VMStateDescription vmstate_extioi_core = { | ||
117 | + .name = "extioi-core", | ||
118 | + .version_id = 1, | ||
119 | + .minimum_version_id = 1, | ||
120 | + .fields = (const VMStateField[]) { | ||
121 | + VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT), | ||
122 | + VMSTATE_END_OF_LIST() | ||
123 | + } | ||
124 | +}; | ||
125 | + | ||
126 | +static const VMStateDescription vmstate_loongarch_extioi = { | ||
127 | + .name = "loongarch.extioi", | ||
128 | + .version_id = 3, | ||
129 | + .minimum_version_id = 3, | ||
130 | + .post_load = loongarch_extioi_common_post_load, | ||
131 | + .fields = (const VMStateField[]) { | ||
132 | + VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState, | ||
133 | + EXTIOI_IRQS_GROUP_COUNT), | ||
134 | + VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState, | ||
135 | + EXTIOI_IRQS_NODETYPE_COUNT / 2), | ||
136 | + VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState, | ||
137 | + EXTIOI_IRQS / 32), | ||
138 | + VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState, | ||
139 | + EXTIOI_IRQS / 32), | ||
140 | + VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState, | ||
141 | + EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
142 | + VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState, | ||
143 | + EXTIOI_IRQS / 4), | ||
144 | + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState, | ||
145 | + num_cpu, vmstate_extioi_core, ExtIOICore), | ||
146 | + VMSTATE_UINT32(features, LoongArchExtIOICommonState), | ||
147 | + VMSTATE_UINT32(status, LoongArchExtIOICommonState), | ||
148 | + VMSTATE_END_OF_LIST() | ||
149 | + } | ||
150 | +}; | ||
151 | + | ||
152 | +static const Property extioi_properties[] = { | ||
153 | + DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), | ||
154 | + DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, | ||
155 | + features, EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
156 | + DEFINE_PROP_END_OF_LIST(), | ||
157 | +}; | ||
158 | -- | 29 | -- |
159 | 2.43.5 | 30 | 2.43.5 | diff view generated by jsdifflib |
1 | Add common realize function, it is only to check validity of property. | 1 | Hardcoded 32 bytes is used for vbsrl emulation check, there is |
---|---|---|---|
2 | problem when options lsx=on,lasx=off is used for vbsrl.v instruction | ||
3 | in TCG mode. It injects LASX exception rather LSX exception. | ||
2 | 4 | ||
5 | Here actual operand size is used. | ||
6 | |||
7 | Cc: qemu-stable@nongnu.org | ||
8 | Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve") | ||
3 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
4 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
5 | --- | 12 | --- |
6 | hw/intc/loongarch_extioi.c | 16 ++++++++++++++-- | 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- |
7 | 1 file changed, 14 insertions(+), 2 deletions(-) | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
8 | 15 | ||
9 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
10 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
11 | --- a/hw/intc/loongarch_extioi.c | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
12 | +++ b/hw/intc/loongarch_extioi.c | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
13 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps extioi_virt_ops = { | 20 | @@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz) |
14 | .endianness = DEVICE_LITTLE_ENDIAN, | ||
15 | }; | ||
16 | |||
17 | +static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp) | ||
18 | +{ | ||
19 | + LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev; | ||
20 | + | ||
21 | + if (s->num_cpu == 0) { | ||
22 | + error_setg(errp, "num-cpu must be at least 1"); | ||
23 | + return; | ||
24 | + } | ||
25 | +} | ||
26 | + | ||
27 | static void loongarch_extioi_realize(DeviceState *dev, Error **errp) | ||
28 | { | 21 | { |
29 | LoongArchExtIOI *s = LOONGARCH_EXTIOI(dev); | 22 | int i, ofs; |
30 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | 23 | |
31 | + Error *local_err = NULL; | 24 | - if (!check_vec(ctx, 32)) { |
32 | int i, pin; | 25 | + if (!check_vec(ctx, oprsz)) { |
33 | 26 | return true; | |
34 | - if (s->num_cpu == 0) { | ||
35 | - error_setg(errp, "num-cpu must be at least 1"); | ||
36 | + loongarch_extioi_common_realize(dev, &local_err); | ||
37 | + if (local_err) { | ||
38 | + error_propagate(errp, local_err); | ||
39 | return; | ||
40 | } | 27 | } |
41 | 28 | ||
42 | -- | 29 | -- |
43 | 2.43.5 | 30 | 2.43.5 |
31 | |||
32 | diff view generated by jsdifflib |
1 | Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and | 1 | The same with ACPI table, fdt table is created on machine done |
---|---|---|---|
2 | replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON | 2 | notification. Some objects like CPU objects can be created with cold-plug |
3 | separately. Also remove unnecessary header files. | 3 | method with command such as -smp x, -device la464-loongarch-cpu, so all |
4 | objects finish to create when machine is done. | ||
4 | 5 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
7 | --- | 8 | --- |
8 | hw/intc/loongarch_pch_pic.c | 24 ++++++++++-------------- | 9 | hw/loongarch/virt.c | 103 ++++++++++++++++++++++++-------------------- |
9 | hw/loongarch/virt.c | 2 +- | 10 | 1 file changed, 57 insertions(+), 46 deletions(-) |
10 | include/hw/intc/loongarch_pch_pic.h | 4 ---- | ||
11 | 3 files changed, 11 insertions(+), 19 deletions(-) | ||
12 | 11 | ||
13 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/hw/intc/loongarch_pch_pic.c | ||
16 | +++ b/hw/intc/loongarch_pch_pic.c | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | |||
19 | #include "qemu/osdep.h" | ||
20 | #include "qemu/bitops.h" | ||
21 | -#include "hw/sysbus.h" | ||
22 | -#include "hw/loongarch/virt.h" | ||
23 | -#include "hw/pci-host/ls7a.h" | ||
24 | #include "hw/irq.h" | ||
25 | #include "hw/intc/loongarch_pch_pic.h" | ||
26 | -#include "hw/qdev-properties.h" | ||
27 | -#include "migration/vmstate.h" | ||
28 | #include "trace.h" | ||
29 | #include "qapi/error.h" | ||
30 | |||
31 | -static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
32 | +static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask, | ||
33 | + int level) | ||
34 | { | ||
35 | uint64_t val; | ||
36 | int irq; | ||
37 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) | ||
38 | |||
39 | static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
40 | { | ||
41 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
42 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
43 | uint64_t mask = 1ULL << irq; | ||
44 | |||
45 | assert(irq < s->irq_num); | ||
46 | @@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) | ||
47 | static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, | ||
48 | unsigned size) | ||
49 | { | ||
50 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
51 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
52 | uint64_t val = 0; | ||
53 | uint32_t offset = addr & 0xfff; | ||
54 | |||
55 | @@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi) | ||
56 | static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
57 | uint64_t value, unsigned size) | ||
58 | { | ||
59 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
60 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
61 | uint32_t offset, old_valid, data = (uint32_t)value; | ||
62 | uint64_t old, int_mask; | ||
63 | offset = addr & 0xfff; | ||
64 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr, | ||
65 | static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
66 | unsigned size) | ||
67 | { | ||
68 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
69 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
70 | uint64_t val = 0; | ||
71 | uint32_t offset = addr & 0xfff; | ||
72 | |||
73 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr, | ||
74 | static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
75 | uint64_t value, unsigned size) | ||
76 | { | ||
77 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
78 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
79 | uint32_t offset, data = (uint32_t)value; | ||
80 | offset = addr & 0xfff; | ||
81 | |||
82 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr, | ||
83 | static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
84 | unsigned size) | ||
85 | { | ||
86 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
87 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
88 | uint64_t val = 0; | ||
89 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
90 | int64_t offset_tmp; | ||
91 | @@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr, | ||
92 | static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr, | ||
93 | uint64_t data, unsigned size) | ||
94 | { | ||
95 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); | ||
96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque); | ||
97 | int32_t offset_tmp; | ||
98 | uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET; | ||
99 | |||
100 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = { | ||
101 | |||
102 | static void loongarch_pch_pic_reset(DeviceState *d) | ||
103 | { | ||
104 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d); | ||
105 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d); | ||
106 | int i; | ||
107 | |||
108 | s->int_mask = -1; | ||
109 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
110 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
111 | --- a/hw/loongarch/virt.c | 14 | --- a/hw/loongarch/virt.c |
112 | +++ b/hw/loongarch/virt.c | 15 | +++ b/hw/loongarch/virt.c |
113 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | 16 | @@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms) |
114 | /* Add Extend I/O Interrupt Controller node */ | 17 | } |
115 | fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | 18 | } |
116 | 19 | ||
117 | - pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); | 20 | +static void virt_fdt_setup(LoongArchVirtMachineState *lvms) |
118 | + pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | 21 | +{ |
22 | + MachineState *machine = MACHINE(lvms); | ||
23 | + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | ||
24 | + int i; | ||
25 | + | ||
26 | + create_fdt(lvms); | ||
27 | + fdt_add_cpu_nodes(lvms); | ||
28 | + fdt_add_memory_nodes(machine); | ||
29 | + fdt_add_fw_cfg_node(lvms); | ||
30 | + fdt_add_flash_node(lvms); | ||
31 | + | ||
32 | + /* Add cpu interrupt-controller */ | ||
33 | + fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
34 | + /* Add Extend I/O Interrupt Controller node */ | ||
35 | + fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
36 | + /* Add PCH PIC node */ | ||
37 | + fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
38 | + /* Add PCH MSI node */ | ||
39 | + fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
40 | + /* Add pcie node */ | ||
41 | + fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
42 | + | ||
43 | + /* | ||
44 | + * Create uart fdt node in reverse order so that they appear | ||
45 | + * in the finished device tree lowest address first | ||
46 | + */ | ||
47 | + for (i = VIRT_UART_COUNT; i-- > 0;) { | ||
48 | + hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; | ||
49 | + int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; | ||
50 | + fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0); | ||
51 | + } | ||
52 | + | ||
53 | + fdt_add_rtc_node(lvms, &pch_pic_phandle); | ||
54 | + fdt_add_ged_reset(lvms); | ||
55 | + platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
56 | + VIRT_PLATFORM_BUS_BASEADDRESS, | ||
57 | + VIRT_PLATFORM_BUS_SIZE, | ||
58 | + VIRT_PLATFORM_BUS_IRQ); | ||
59 | + | ||
60 | + /* | ||
61 | + * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
62 | + * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
63 | + * access. FDT size limit with 1 MiB. | ||
64 | + * Put the FDT into the memory map as a ROM image: this will ensure | ||
65 | + * the FDT is copied again upon reset, even if addr points into RAM. | ||
66 | + */ | ||
67 | + qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
68 | + rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
69 | + &address_space_memory); | ||
70 | + qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
71 | + rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
72 | +} | ||
73 | + | ||
74 | static void virt_done(Notifier *notifier, void *data) | ||
75 | { | ||
76 | LoongArchVirtMachineState *lvms = container_of(notifier, | ||
77 | LoongArchVirtMachineState, machine_done); | ||
78 | virt_build_smbios(lvms); | ||
79 | loongarch_acpi_setup(lvms); | ||
80 | + virt_fdt_setup(lvms); | ||
81 | } | ||
82 | |||
83 | static void virt_powerdown_req(Notifier *notifier, void *opaque) | ||
84 | @@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic) | ||
85 | } | ||
86 | |||
87 | static void virt_devices_init(DeviceState *pch_pic, | ||
88 | - LoongArchVirtMachineState *lvms, | ||
89 | - uint32_t *pch_pic_phandle, | ||
90 | - uint32_t *pch_msi_phandle) | ||
91 | + LoongArchVirtMachineState *lvms) | ||
92 | { | ||
93 | MachineClass *mc = MACHINE_GET_CLASS(lvms); | ||
94 | DeviceState *gpex_dev; | ||
95 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
96 | gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); | ||
97 | } | ||
98 | |||
99 | - /* Add pcie node */ | ||
100 | - fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle); | ||
101 | - | ||
102 | /* | ||
103 | * Create uart fdt node in reverse order so that they appear | ||
104 | * in the finished device tree lowest address first | ||
105 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
106 | serial_mm_init(get_system_memory(), base, 0, | ||
107 | qdev_get_gpio_in(pch_pic, irq), | ||
108 | 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); | ||
109 | - fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0); | ||
110 | } | ||
111 | |||
112 | /* Network init */ | ||
113 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
114 | sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, | ||
115 | qdev_get_gpio_in(pch_pic, | ||
116 | VIRT_RTC_IRQ - VIRT_GSI_BASE)); | ||
117 | - fdt_add_rtc_node(lvms, pch_pic_phandle); | ||
118 | - fdt_add_ged_reset(lvms); | ||
119 | |||
120 | /* acpi ged */ | ||
121 | lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); | ||
122 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
123 | CPULoongArchState *env; | ||
124 | CPUState *cpu_state; | ||
125 | int cpu, pin, i, start, num; | ||
126 | - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | ||
127 | |||
128 | /* | ||
129 | * Extended IRQ model. | ||
130 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
131 | memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, | ||
132 | sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); | ||
133 | |||
134 | - /* Add cpu interrupt-controller */ | ||
135 | - fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
136 | - | ||
137 | for (cpu = 0; cpu < ms->smp.cpus; cpu++) { | ||
138 | cpu_state = qemu_get_cpu(cpu); | ||
139 | cpudev = DEVICE(cpu_state); | ||
140 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
141 | } | ||
142 | } | ||
143 | |||
144 | - /* Add Extend I/O Interrupt Controller node */ | ||
145 | - fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
146 | - | ||
147 | pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | ||
119 | num = VIRT_PCH_PIC_IRQ_NUM; | 148 | num = VIRT_PCH_PIC_IRQ_NUM; |
120 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); | 149 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); |
121 | d = SYS_BUS_DEVICE(pch_pic); | 150 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
122 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | 151 | qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); |
123 | index XXXXXXX..XXXXXXX 100644 | 152 | } |
124 | --- a/include/hw/intc/loongarch_pch_pic.h | 153 | |
125 | +++ b/include/hw/intc/loongarch_pch_pic.h | 154 | - /* Add PCH PIC node */ |
126 | @@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass { | 155 | - fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); |
127 | DeviceRealize parent_realize; | 156 | - |
128 | }; | 157 | pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); |
129 | 158 | start = num; | |
130 | -#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC | 159 | num = EXTIOI_IRQS - start; |
131 | -typedef struct LoongArchPICCommonState LoongArchPCHPIC; | 160 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
132 | -#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) | 161 | qdev_get_gpio_in(extioi, i + start)); |
133 | - | 162 | } |
134 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | 163 | |
164 | - /* Add PCH MSI node */ | ||
165 | - fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
166 | - | ||
167 | - virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
168 | + virt_devices_init(pch_pic, lvms); | ||
169 | } | ||
170 | |||
171 | static void virt_firmware_init(LoongArchVirtMachineState *lvms) | ||
172 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
173 | cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); | ||
174 | } | ||
175 | |||
176 | - create_fdt(lvms); | ||
177 | - | ||
178 | /* Create IOCSR space */ | ||
179 | memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, | ||
180 | machine, "iocsr", UINT64_MAX); | ||
181 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
182 | lacpu = LOONGARCH_CPU(cpu); | ||
183 | lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; | ||
184 | } | ||
185 | - fdt_add_cpu_nodes(lvms); | ||
186 | - fdt_add_memory_nodes(machine); | ||
187 | fw_cfg_add_memory(machine); | ||
188 | |||
189 | /* Node0 memory */ | ||
190 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
191 | memmap_table, | ||
192 | sizeof(struct memmap_entry) * (memmap_entries)); | ||
193 | } | ||
194 | - fdt_add_fw_cfg_node(lvms); | ||
195 | - fdt_add_flash_node(lvms); | ||
196 | |||
197 | /* Initialize the IO interrupt subsystem */ | ||
198 | virt_irq_init(lvms); | ||
199 | - platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
200 | - VIRT_PLATFORM_BUS_BASEADDRESS, | ||
201 | - VIRT_PLATFORM_BUS_SIZE, | ||
202 | - VIRT_PLATFORM_BUS_IRQ); | ||
203 | lvms->machine_done.notify = virt_done; | ||
204 | qemu_add_machine_init_done_notifier(&lvms->machine_done); | ||
205 | /* connect powerdown request */ | ||
206 | lvms->powerdown_notifier.notify = virt_powerdown_req; | ||
207 | qemu_register_powerdown_notifier(&lvms->powerdown_notifier); | ||
208 | |||
209 | - /* | ||
210 | - * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
211 | - * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
212 | - * access. FDT size limit with 1 MiB. | ||
213 | - * Put the FDT into the memory map as a ROM image: this will ensure | ||
214 | - * the FDT is copied again upon reset, even if addr points into RAM. | ||
215 | - */ | ||
216 | - qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
217 | - rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
218 | - &address_space_memory); | ||
219 | - qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
220 | - rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
221 | - | ||
222 | lvms->bootinfo.ram_size = ram_size; | ||
223 | loongarch_load_kernel(machine, &lvms->bootinfo); | ||
224 | } | ||
135 | -- | 225 | -- |
136 | 2.43.5 | 226 | 2.43.5 | diff view generated by jsdifflib |
1 | For loongarch extioi emulation driver, add unrealize interface and | 1 | For CPU object, possible_cpu_arch_ids() function is used rather than |
---|---|---|---|
2 | remove instance_finalize interface and move the code to unrealize | 2 | smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus |
3 | interface. | 3 | is not accurate for all possible CPU objects, possible_cpu_arch_ids() |
4 | is used here. | ||
4 | 5 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
7 | --- | 8 | --- |
8 | hw/intc/loongarch_extioi.c | 6 +++--- | 9 | hw/loongarch/virt.c | 39 +++++++++++++++++++++++++-------------- |
9 | 1 file changed, 3 insertions(+), 3 deletions(-) | 10 | 1 file changed, 25 insertions(+), 14 deletions(-) |
10 | 11 | ||
11 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
12 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/hw/intc/loongarch_extioi.c | 14 | --- a/hw/loongarch/virt.c |
14 | +++ b/hw/intc/loongarch_extioi.c | 15 | +++ b/hw/loongarch/virt.c |
15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp) | 16 | @@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms) |
17 | static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
18 | { | ||
19 | int num; | ||
20 | - const MachineState *ms = MACHINE(lvms); | ||
21 | - int smp_cpus = ms->smp.cpus; | ||
22 | + MachineState *ms = MACHINE(lvms); | ||
23 | + MachineClass *mc = MACHINE_GET_CLASS(ms); | ||
24 | + const CPUArchIdList *possible_cpus; | ||
25 | + LoongArchCPU *cpu; | ||
26 | + CPUState *cs; | ||
27 | + char *nodename, *map_path; | ||
28 | |||
29 | qemu_fdt_add_subnode(ms->fdt, "/cpus"); | ||
30 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); | ||
31 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); | ||
32 | |||
33 | /* cpu nodes */ | ||
34 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
35 | - char *nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
36 | - LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num)); | ||
37 | - CPUState *cs = CPU(cpu); | ||
38 | + possible_cpus = mc->possible_cpu_arch_ids(ms); | ||
39 | + for (num = 0; num < possible_cpus->len; num++) { | ||
40 | + cs = possible_cpus->cpus[num].cpu; | ||
41 | + if (cs == NULL) { | ||
42 | + continue; | ||
43 | + } | ||
44 | + | ||
45 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
46 | + cpu = LOONGARCH_CPU(cs); | ||
47 | |||
48 | qemu_fdt_add_subnode(ms->fdt, nodename); | ||
49 | qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); | ||
50 | qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", | ||
51 | cpu->dtb_compatible); | ||
52 | - if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { | ||
53 | + if (possible_cpus->cpus[num].props.has_node_id) { | ||
54 | qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", | ||
55 | - ms->possible_cpus->cpus[cs->cpu_index].props.node_id); | ||
56 | + possible_cpus->cpus[num].props.node_id); | ||
57 | } | ||
58 | qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); | ||
59 | qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", | ||
60 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
61 | |||
62 | /*cpu map */ | ||
63 | qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); | ||
64 | + for (num = 0; num < possible_cpus->len; num++) { | ||
65 | + cs = possible_cpus->cpus[num].cpu; | ||
66 | + if (cs == NULL) { | ||
67 | + continue; | ||
68 | + } | ||
69 | |||
70 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
71 | - char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num); | ||
72 | - char *map_path; | ||
73 | - | ||
74 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
75 | if (ms->smp.threads > 1) { | ||
76 | map_path = g_strdup_printf( | ||
77 | "/cpus/cpu-map/socket%d/core%d/thread%d", | ||
78 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
79 | num % ms->smp.cores); | ||
80 | } | ||
81 | qemu_fdt_add_path(ms->fdt, map_path); | ||
82 | - qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); | ||
83 | + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename); | ||
84 | |||
85 | g_free(map_path); | ||
86 | - g_free(cpu_path); | ||
87 | + g_free(nodename); | ||
16 | } | 88 | } |
17 | } | 89 | } |
18 | 90 | ||
19 | -static void loongarch_extioi_finalize(Object *obj) | ||
20 | +static void loongarch_extioi_unrealize(DeviceState *dev) | ||
21 | { | ||
22 | - LoongArchExtIOI *s = LOONGARCH_EXTIOI(obj); | ||
23 | + LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI(dev); | ||
24 | |||
25 | g_free(s->cpu); | ||
26 | } | ||
27 | @@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_class_init(ObjectClass *klass, void *data) | ||
28 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
29 | |||
30 | dc->realize = loongarch_extioi_realize; | ||
31 | + dc->unrealize = loongarch_extioi_unrealize; | ||
32 | device_class_set_legacy_reset(dc, loongarch_extioi_reset); | ||
33 | device_class_set_props(dc, extioi_properties); | ||
34 | dc->vmsd = &vmstate_loongarch_extioi; | ||
35 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_extioi_info = { | ||
36 | .parent = TYPE_SYS_BUS_DEVICE, | ||
37 | .instance_size = sizeof(struct LoongArchExtIOI), | ||
38 | .class_init = loongarch_extioi_class_init, | ||
39 | - .instance_finalize = loongarch_extioi_finalize, | ||
40 | }; | ||
41 | |||
42 | static void loongarch_extioi_register_types(void) | ||
43 | -- | 91 | -- |
44 | 2.43.5 | 92 | 2.43.5 | diff view generated by jsdifflib |
1 | Add vmstate pre_save and post_load interfaces, which can be used | 1 | Like LBT feature, add type OnOffAuto for LSX feature setting. Also |
---|---|---|---|
2 | by pic kvm driver in future. | 2 | add LSX feature detection with new VM ioctl command, fallback to old |
3 | method if it is not supported. | ||
3 | 4 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
6 | --- | 7 | --- |
7 | hw/intc/loongarch_pic_common.c | 26 ++++++++++++++++++++++++++ | 8 | target/loongarch/cpu.c | 38 +++++++++++++++------------ |
8 | include/hw/intc/loongarch_pic_common.h | 2 ++ | 9 | target/loongarch/cpu.h | 2 ++ |
9 | 2 files changed, 28 insertions(+) | 10 | target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++ |
11 | 3 files changed, 77 insertions(+), 17 deletions(-) | ||
10 | 12 | ||
11 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | 13 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
12 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/hw/intc/loongarch_pic_common.c | 15 | --- a/target/loongarch/cpu.c |
14 | +++ b/hw/intc/loongarch_pic_common.c | 16 | +++ b/target/loongarch/cpu.c |
15 | @@ -XXX,XX +XXX,XX @@ | 17 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) |
16 | #include "hw/qdev-properties.h" | 18 | { |
17 | #include "migration/vmstate.h" | 19 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
18 | 20 | CPULoongArchState *env = &cpu->env; | |
19 | +static int loongarch_pic_pre_save(void *opaque) | 21 | + uint32_t data = 0; |
22 | int i; | ||
23 | |||
24 | for (i = 0; i < 21; i++) { | ||
25 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) | ||
26 | cpu->dtb_compatible = "loongarch,Loongson-3A5000"; | ||
27 | env->cpucfg[0] = 0x14c010; /* PRID */ | ||
28 | |||
29 | - uint32_t data = 0; | ||
30 | data = FIELD_DP32(data, CPUCFG1, ARCH, 2); | ||
31 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
32 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
33 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
34 | { | ||
35 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
36 | CPULoongArchState *env = &cpu->env; | ||
37 | - | ||
38 | + uint32_t data = 0; | ||
39 | int i; | ||
40 | |||
41 | for (i = 0; i < 21; i++) { | ||
42 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
43 | cpu->dtb_compatible = "loongarch,Loongson-1C103"; | ||
44 | env->cpucfg[0] = 0x148042; /* PRID */ | ||
45 | |||
46 | - uint32_t data = 0; | ||
47 | data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ | ||
48 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
49 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
50 | @@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) | ||
51 | |||
52 | static bool loongarch_get_lsx(Object *obj, Error **errp) | ||
53 | { | ||
54 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
55 | - bool ret; | ||
56 | - | ||
57 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
58 | - ret = true; | ||
59 | - } else { | ||
60 | - ret = false; | ||
61 | - } | ||
62 | - return ret; | ||
63 | + return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF; | ||
64 | } | ||
65 | |||
66 | static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
67 | { | ||
68 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
69 | + uint32_t val; | ||
70 | |||
71 | - if (value) { | ||
72 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
73 | - } else { | ||
74 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0); | ||
75 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
76 | + cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
77 | + if (kvm_enabled()) { | ||
78 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
79 | + return; | ||
80 | } | ||
81 | + | ||
82 | + /* LSX feature detection in TCG mode */ | ||
83 | + val = cpu->env.cpucfg[2]; | ||
84 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
85 | + if (FIELD_EX32(val, CPUCFG2, LSX) == 0) { | ||
86 | + error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
87 | + return; | ||
88 | + } | ||
89 | + } | ||
90 | + | ||
91 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
92 | } | ||
93 | |||
94 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
95 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
96 | { | ||
97 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
98 | |||
99 | + cpu->lsx = ON_OFF_AUTO_AUTO; | ||
100 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | ||
101 | loongarch_set_lsx); | ||
102 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | ||
103 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
104 | |||
105 | } else { | ||
106 | cpu->lbt = ON_OFF_AUTO_OFF; | ||
107 | + cpu->pmu = ON_OFF_AUTO_OFF; | ||
108 | } | ||
109 | } | ||
110 | |||
111 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | ||
112 | index XXXXXXX..XXXXXXX 100644 | ||
113 | --- a/target/loongarch/cpu.h | ||
114 | +++ b/target/loongarch/cpu.h | ||
115 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | ||
116 | #endif | ||
117 | |||
118 | enum loongarch_features { | ||
119 | + LOONGARCH_FEATURE_LSX, | ||
120 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | ||
121 | LOONGARCH_FEATURE_PMU, | ||
122 | }; | ||
123 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | ||
124 | uint32_t phy_id; | ||
125 | OnOffAuto lbt; | ||
126 | OnOffAuto pmu; | ||
127 | + OnOffAuto lsx; | ||
128 | |||
129 | /* 'compatible' string for this CPU for Linux device trees */ | ||
130 | const char *dtb_compatible; | ||
131 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
132 | index XXXXXXX..XXXXXXX 100644 | ||
133 | --- a/target/loongarch/kvm/kvm.c | ||
134 | +++ b/target/loongarch/kvm/kvm.c | ||
135 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
136 | { | ||
137 | int ret; | ||
138 | struct kvm_device_attr attr; | ||
139 | + uint64_t val; | ||
140 | |||
141 | switch (feature) { | ||
142 | + case LOONGARCH_FEATURE_LSX: | ||
143 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
144 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LSX; | ||
145 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
146 | + if (ret == 0) { | ||
147 | + return true; | ||
148 | + } | ||
149 | + | ||
150 | + /* Fallback to old kernel detect interface */ | ||
151 | + val = 0; | ||
152 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
153 | + /* Cpucfg2 */ | ||
154 | + attr.attr = 2; | ||
155 | + attr.addr = (uint64_t)&val; | ||
156 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
157 | + if (!ret) { | ||
158 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
159 | + if (ret) { | ||
160 | + return false; | ||
161 | + } | ||
162 | + | ||
163 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX); | ||
164 | + return (ret != 0); | ||
165 | + } | ||
166 | + return false; | ||
167 | + | ||
168 | case LOONGARCH_FEATURE_LBT: | ||
169 | /* | ||
170 | * Return all if all the LBT features are supported such as: | ||
171 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
172 | return false; | ||
173 | } | ||
174 | |||
175 | +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
20 | +{ | 176 | +{ |
21 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; | 177 | + CPULoongArchState *env = cpu_env(cs); |
22 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); | 178 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
23 | + | 179 | + bool kvm_supported; |
24 | + if (lpcc->pre_save) { | 180 | + |
25 | + return lpcc->pre_save(s); | 181 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); |
182 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); | ||
183 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
184 | + if (kvm_supported) { | ||
185 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | ||
186 | + } else { | ||
187 | + error_setg(errp, "'lsx' feature not supported by KVM on this host"); | ||
188 | + return -ENOTSUP; | ||
189 | + } | ||
190 | + } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) { | ||
191 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | ||
26 | + } | 192 | + } |
27 | + | 193 | + |
28 | + return 0; | 194 | + return 0; |
29 | +} | 195 | +} |
30 | + | 196 | + |
31 | +static int loongarch_pic_post_load(void *opaque, int version_id) | 197 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
32 | +{ | 198 | { |
33 | + LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque; | 199 | CPULoongArchState *env = cpu_env(cs); |
34 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s); | 200 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
35 | + | 201 | brk_insn = val; |
36 | + if (lpcc->post_load) { | 202 | } |
37 | + return lpcc->post_load(s, version_id); | 203 | |
204 | + ret = kvm_cpu_check_lsx(cs, &local_err); | ||
205 | + if (ret < 0) { | ||
206 | + error_report_err(local_err); | ||
38 | + } | 207 | + } |
39 | + | 208 | + |
40 | + return 0; | 209 | ret = kvm_cpu_check_lbt(cs, &local_err); |
41 | +} | 210 | if (ret < 0) { |
42 | + | 211 | error_report_err(local_err); |
43 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
44 | { | ||
45 | LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
46 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { | ||
47 | .name = "loongarch_pch_pic", | ||
48 | .version_id = 1, | ||
49 | .minimum_version_id = 1, | ||
50 | + .pre_save = loongarch_pic_pre_save, | ||
51 | + .post_load = loongarch_pic_post_load, | ||
52 | .fields = (const VMStateField[]) { | ||
53 | VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
54 | VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
55 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
56 | index XXXXXXX..XXXXXXX 100644 | ||
57 | --- a/include/hw/intc/loongarch_pic_common.h | ||
58 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
59 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass { | ||
60 | SysBusDeviceClass parent_class; | ||
61 | |||
62 | DeviceRealize parent_realize; | ||
63 | + int (*pre_save)(LoongArchPICCommonState *s); | ||
64 | + int (*post_load)(LoongArchPICCommonState *s, int version_id); | ||
65 | }; | ||
66 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
67 | -- | 212 | -- |
68 | 2.43.5 | 213 | 2.43.5 | diff view generated by jsdifflib |
1 | With pic vmstate, rename structure name vmstate_loongarch_pch_pic with | 1 | Like LSX feature, add type OnOffAuto for LASX feature setting. |
---|---|---|---|
2 | vmstate_loongarch_pic_common, and with pic property rename | ||
3 | loongarch_pch_pic_properties with loongarch_pic_common_properties. | ||
4 | 2 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 3 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 4 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
7 | --- | 5 | --- |
8 | hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++-------------- | 6 | target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------ |
9 | 1 file changed, 32 insertions(+), 20 deletions(-) | 7 | target/loongarch/cpu.h | 2 ++ |
8 | target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++ | ||
9 | 3 files changed, 89 insertions(+), 16 deletions(-) | ||
10 | 10 | ||
11 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | 11 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
12 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/hw/intc/loongarch_pch_pic.c | 13 | --- a/target/loongarch/cpu.c |
14 | +++ b/hw/intc/loongarch_pch_pic.c | 14 | +++ b/target/loongarch/cpu.c |
15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | 15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) |
16 | s->int_polarity = 0x0; | 16 | uint32_t val; |
17 | |||
18 | cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
19 | + if (cpu->lsx == ON_OFF_AUTO_OFF) { | ||
20 | + cpu->lasx = ON_OFF_AUTO_OFF; | ||
21 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
22 | + error_setg(errp, "Failed to disable LSX since LASX is enabled"); | ||
23 | + return; | ||
24 | + } | ||
25 | + } | ||
26 | + | ||
27 | if (kvm_enabled()) { | ||
28 | /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
29 | return; | ||
30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
31 | error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
32 | return; | ||
33 | } | ||
34 | + } else { | ||
35 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0); | ||
36 | + val = cpu->env.cpucfg[2]; | ||
37 | } | ||
38 | |||
39 | cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
40 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
41 | |||
42 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
43 | { | ||
44 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
45 | - bool ret; | ||
46 | - | ||
47 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { | ||
48 | - ret = true; | ||
49 | - } else { | ||
50 | - ret = false; | ||
51 | - } | ||
52 | - return ret; | ||
53 | + return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF; | ||
17 | } | 54 | } |
18 | 55 | ||
19 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | 56 | static void loongarch_set_lasx(Object *obj, bool value, Error **errp) |
20 | +{ | 57 | { |
21 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | 58 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
22 | + | 59 | + uint32_t val; |
23 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | 60 | |
24 | + error_setg(errp, "Invalid 'pic_irq_num'"); | 61 | - if (value) { |
62 | - if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
63 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
64 | - } | ||
65 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1); | ||
66 | - } else { | ||
67 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
68 | + cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
69 | + if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) { | ||
70 | + error_setg(errp, "Failed to enable LASX since lSX is disabled"); | ||
25 | + return; | 71 | + return; |
26 | + } | 72 | + } |
73 | + | ||
74 | + if (kvm_enabled()) { | ||
75 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
76 | + return; | ||
77 | } | ||
78 | + | ||
79 | + /* LASX feature detection in TCG mode */ | ||
80 | + val = cpu->env.cpucfg[2]; | ||
81 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
82 | + if (FIELD_EX32(val, CPUCFG2, LASX) == 0) { | ||
83 | + error_setg(errp, "Failed to enable LASX in TCG mode"); | ||
84 | + return; | ||
85 | + } | ||
86 | + } | ||
87 | + | ||
88 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value); | ||
89 | } | ||
90 | |||
91 | static bool loongarch_get_lbt(Object *obj, Error **errp) | ||
92 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
93 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
94 | |||
95 | cpu->lsx = ON_OFF_AUTO_AUTO; | ||
96 | + cpu->lasx = ON_OFF_AUTO_AUTO; | ||
97 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | ||
98 | loongarch_set_lsx); | ||
99 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | ||
100 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | ||
101 | index XXXXXXX..XXXXXXX 100644 | ||
102 | --- a/target/loongarch/cpu.h | ||
103 | +++ b/target/loongarch/cpu.h | ||
104 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | ||
105 | |||
106 | enum loongarch_features { | ||
107 | LOONGARCH_FEATURE_LSX, | ||
108 | + LOONGARCH_FEATURE_LASX, | ||
109 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | ||
110 | LOONGARCH_FEATURE_PMU, | ||
111 | }; | ||
112 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | ||
113 | OnOffAuto lbt; | ||
114 | OnOffAuto pmu; | ||
115 | OnOffAuto lsx; | ||
116 | + OnOffAuto lasx; | ||
117 | |||
118 | /* 'compatible' string for this CPU for Linux device trees */ | ||
119 | const char *dtb_compatible; | ||
120 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
121 | index XXXXXXX..XXXXXXX 100644 | ||
122 | --- a/target/loongarch/kvm/kvm.c | ||
123 | +++ b/target/loongarch/kvm/kvm.c | ||
124 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
125 | } | ||
126 | return false; | ||
127 | |||
128 | + case LOONGARCH_FEATURE_LASX: | ||
129 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LASX; | ||
131 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
132 | + if (ret == 0) { | ||
133 | + return true; | ||
134 | + } | ||
135 | + | ||
136 | + /* Fallback to old kernel detect interface */ | ||
137 | + val = 0; | ||
138 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
139 | + /* Cpucfg2 */ | ||
140 | + attr.attr = 2; | ||
141 | + attr.addr = (uint64_t)&val; | ||
142 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
143 | + if (!ret) { | ||
144 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
145 | + if (ret) { | ||
146 | + return false; | ||
147 | + } | ||
148 | + | ||
149 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX); | ||
150 | + return (ret != 0); | ||
151 | + } | ||
152 | + return false; | ||
153 | + | ||
154 | case LOONGARCH_FEATURE_LBT: | ||
155 | /* | ||
156 | * Return all if all the LBT features are supported such as: | ||
157 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
158 | return 0; | ||
159 | } | ||
160 | |||
161 | +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) | ||
162 | +{ | ||
163 | + CPULoongArchState *env = cpu_env(cs); | ||
164 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | ||
165 | + bool kvm_supported; | ||
166 | + | ||
167 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); | ||
168 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); | ||
169 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
170 | + if (kvm_supported) { | ||
171 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
172 | + } else { | ||
173 | + error_setg(errp, "'lasx' feature not supported by KVM on host"); | ||
174 | + return -ENOTSUP; | ||
175 | + } | ||
176 | + } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) { | ||
177 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
178 | + } | ||
179 | + | ||
180 | + return 0; | ||
27 | +} | 181 | +} |
28 | + | 182 | + |
29 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | 183 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
30 | { | 184 | { |
31 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | 185 | CPULoongArchState *env = cpu_env(cs); |
32 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | 186 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
33 | + Error *local_err = NULL; | 187 | error_report_err(local_err); |
34 | |||
35 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
36 | - error_setg(errp, "Invalid 'pic_irq_num'"); | ||
37 | + loongarch_pic_common_realize(dev, &local_err); | ||
38 | + if (local_err) { | ||
39 | + error_propagate(errp, local_err); | ||
40 | return; | ||
41 | } | 188 | } |
42 | 189 | ||
43 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | 190 | + ret = kvm_cpu_check_lasx(cs, &local_err); |
44 | 191 | + if (ret < 0) { | |
45 | } | 192 | + error_report_err(local_err); |
46 | 193 | + } | |
47 | -static const Property loongarch_pch_pic_properties[] = { | 194 | + |
48 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), | 195 | ret = kvm_cpu_check_lbt(cs, &local_err); |
49 | +static const Property loongarch_pic_common_properties[] = { | 196 | if (ret < 0) { |
50 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | 197 | error_report_err(local_err); |
51 | DEFINE_PROP_END_OF_LIST(), | ||
52 | }; | ||
53 | |||
54 | -static const VMStateDescription vmstate_loongarch_pch_pic = { | ||
55 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
56 | +static const VMStateDescription vmstate_loongarch_pic_common = { | ||
57 | + .name = "loongarch_pch_pic", | ||
58 | .version_id = 1, | ||
59 | .minimum_version_id = 1, | ||
60 | .fields = (const VMStateField[]) { | ||
61 | - VMSTATE_UINT64(int_mask, LoongArchPCHPIC), | ||
62 | - VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC), | ||
63 | - VMSTATE_UINT64(intedge, LoongArchPCHPIC), | ||
64 | - VMSTATE_UINT64(intclr, LoongArchPCHPIC), | ||
65 | - VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC), | ||
66 | - VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC), | ||
67 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64), | ||
68 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64), | ||
69 | - VMSTATE_UINT64(last_intirr, LoongArchPCHPIC), | ||
70 | - VMSTATE_UINT64(intirr, LoongArchPCHPIC), | ||
71 | - VMSTATE_UINT64(intisr, LoongArchPCHPIC), | ||
72 | - VMSTATE_UINT64(int_polarity, LoongArchPCHPIC), | ||
73 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
74 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
75 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
76 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
77 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
78 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
79 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
80 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
81 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
82 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
83 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
84 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
85 | VMSTATE_END_OF_LIST() | ||
86 | } | ||
87 | }; | ||
88 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
89 | |||
90 | dc->realize = loongarch_pch_pic_realize; | ||
91 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
92 | - dc->vmsd = &vmstate_loongarch_pch_pic; | ||
93 | - device_class_set_props(dc, loongarch_pch_pic_properties); | ||
94 | + dc->vmsd = &vmstate_loongarch_pic_common; | ||
95 | + device_class_set_props(dc, loongarch_pic_common_properties); | ||
96 | } | ||
97 | |||
98 | static const TypeInfo loongarch_pch_pic_info = { | ||
99 | -- | 198 | -- |
100 | 2.43.5 | 199 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Move some common functions to file loongarch_pic_common.c, the common | ||
2 | functions include loongarch_pic_common_realize(), property structure | ||
3 | loongarch_pic_common_properties and vmstate structure | ||
4 | vmstate_loongarch_pic_common. | ||
5 | 1 | ||
6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
7 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
8 | --- | ||
9 | hw/intc/loongarch_pch_pic.c | 37 +----------------------------- | ||
10 | hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++ | ||
11 | 2 files changed, 42 insertions(+), 36 deletions(-) | ||
12 | create mode 100644 hw/intc/loongarch_pic_common.c | ||
13 | |||
14 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/hw/intc/loongarch_pch_pic.c | ||
17 | +++ b/hw/intc/loongarch_pch_pic.c | ||
18 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
19 | s->int_polarity = 0x0; | ||
20 | } | ||
21 | |||
22 | -static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
23 | -{ | ||
24 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
25 | - | ||
26 | - if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
27 | - error_setg(errp, "Invalid 'pic_irq_num'"); | ||
28 | - return; | ||
29 | - } | ||
30 | -} | ||
31 | - | ||
32 | +#include "loongarch_pic_common.c" | ||
33 | static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
34 | { | ||
35 | LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
36 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
37 | |||
38 | } | ||
39 | |||
40 | -static const Property loongarch_pic_common_properties[] = { | ||
41 | - DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
42 | - DEFINE_PROP_END_OF_LIST(), | ||
43 | -}; | ||
44 | - | ||
45 | -static const VMStateDescription vmstate_loongarch_pic_common = { | ||
46 | - .name = "loongarch_pch_pic", | ||
47 | - .version_id = 1, | ||
48 | - .minimum_version_id = 1, | ||
49 | - .fields = (const VMStateField[]) { | ||
50 | - VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
51 | - VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
52 | - VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
53 | - VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
54 | - VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
55 | - VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
56 | - VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
57 | - VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
58 | - VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
59 | - VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
60 | - VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
61 | - VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
62 | - VMSTATE_END_OF_LIST() | ||
63 | - } | ||
64 | -}; | ||
65 | - | ||
66 | static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
67 | { | ||
68 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
69 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
70 | new file mode 100644 | ||
71 | index XXXXXXX..XXXXXXX | ||
72 | --- /dev/null | ||
73 | +++ b/hw/intc/loongarch_pic_common.c | ||
74 | @@ -XXX,XX +XXX,XX @@ | ||
75 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
76 | +/* | ||
77 | + * QEMU Loongson 7A1000 I/O interrupt controller. | ||
78 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
79 | + */ | ||
80 | + | ||
81 | +static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
82 | +{ | ||
83 | + LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
84 | + | ||
85 | + if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
86 | + error_setg(errp, "Invalid 'pic_irq_num'"); | ||
87 | + return; | ||
88 | + } | ||
89 | +} | ||
90 | + | ||
91 | +static const Property loongarch_pic_common_properties[] = { | ||
92 | + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), | ||
93 | + DEFINE_PROP_END_OF_LIST(), | ||
94 | +}; | ||
95 | + | ||
96 | +static const VMStateDescription vmstate_loongarch_pic_common = { | ||
97 | + .name = "loongarch_pch_pic", | ||
98 | + .version_id = 1, | ||
99 | + .minimum_version_id = 1, | ||
100 | + .fields = (const VMStateField[]) { | ||
101 | + VMSTATE_UINT64(int_mask, LoongArchPICCommonState), | ||
102 | + VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState), | ||
103 | + VMSTATE_UINT64(intedge, LoongArchPICCommonState), | ||
104 | + VMSTATE_UINT64(intclr, LoongArchPICCommonState), | ||
105 | + VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState), | ||
106 | + VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState), | ||
107 | + VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64), | ||
108 | + VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64), | ||
109 | + VMSTATE_UINT64(last_intirr, LoongArchPICCommonState), | ||
110 | + VMSTATE_UINT64(intirr, LoongArchPICCommonState), | ||
111 | + VMSTATE_UINT64(intisr, LoongArchPICCommonState), | ||
112 | + VMSTATE_UINT64(int_polarity, LoongArchPICCommonState), | ||
113 | + VMSTATE_END_OF_LIST() | ||
114 | + } | ||
115 | +}; | ||
116 | -- | ||
117 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object, | ||
2 | it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has | ||
3 | its own realize() function. | ||
4 | 1 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | hw/intc/loongarch_pch_pic.c | 38 ++++++++++++-------------- | ||
9 | hw/intc/loongarch_pic_common.c | 32 +++++++++++++++++++++- | ||
10 | hw/intc/meson.build | 2 +- | ||
11 | include/hw/intc/loongarch_pch_pic.h | 21 +++++++++++--- | ||
12 | include/hw/intc/loongarch_pic_common.h | 10 +++++++ | ||
13 | 5 files changed, 77 insertions(+), 26 deletions(-) | ||
14 | |||
15 | diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/hw/intc/loongarch_pch_pic.c | ||
18 | +++ b/hw/intc/loongarch_pch_pic.c | ||
19 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d) | ||
20 | s->int_polarity = 0x0; | ||
21 | } | ||
22 | |||
23 | -#include "loongarch_pic_common.c" | ||
24 | -static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
25 | +static void loongarch_pic_realize(DeviceState *dev, Error **errp) | ||
26 | { | ||
27 | - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); | ||
28 | - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
29 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
30 | + LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev); | ||
31 | + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); | ||
32 | Error *local_err = NULL; | ||
33 | |||
34 | - loongarch_pic_common_realize(dev, &local_err); | ||
35 | + lpc->parent_realize(dev, &local_err); | ||
36 | if (local_err) { | ||
37 | error_propagate(errp, local_err); | ||
38 | return; | ||
39 | @@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) | ||
40 | |||
41 | } | ||
42 | |||
43 | -static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) | ||
44 | +static void loongarch_pic_class_init(ObjectClass *klass, void *data) | ||
45 | { | ||
46 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
47 | + LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass); | ||
48 | |||
49 | - dc->realize = loongarch_pch_pic_realize; | ||
50 | device_class_set_legacy_reset(dc, loongarch_pch_pic_reset); | ||
51 | - dc->vmsd = &vmstate_loongarch_pic_common; | ||
52 | - device_class_set_props(dc, loongarch_pic_common_properties); | ||
53 | + device_class_set_parent_realize(dc, loongarch_pic_realize, | ||
54 | + &lpc->parent_realize); | ||
55 | } | ||
56 | |||
57 | -static const TypeInfo loongarch_pch_pic_info = { | ||
58 | - .name = TYPE_LOONGARCH_PCH_PIC, | ||
59 | - .parent = TYPE_SYS_BUS_DEVICE, | ||
60 | - .instance_size = sizeof(LoongArchPCHPIC), | ||
61 | - .class_init = loongarch_pch_pic_class_init, | ||
62 | +static const TypeInfo loongarch_pic_types[] = { | ||
63 | + { | ||
64 | + .name = TYPE_LOONGARCH_PIC, | ||
65 | + .parent = TYPE_LOONGARCH_PIC_COMMON, | ||
66 | + .instance_size = sizeof(LoongarchPICState), | ||
67 | + .class_size = sizeof(LoongarchPICClass), | ||
68 | + .class_init = loongarch_pic_class_init, | ||
69 | + } | ||
70 | }; | ||
71 | |||
72 | -static void loongarch_pch_pic_register_types(void) | ||
73 | -{ | ||
74 | - type_register_static(&loongarch_pch_pic_info); | ||
75 | -} | ||
76 | - | ||
77 | -type_init(loongarch_pch_pic_register_types) | ||
78 | +DEFINE_TYPES(loongarch_pic_types) | ||
79 | diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c | ||
80 | index XXXXXXX..XXXXXXX 100644 | ||
81 | --- a/hw/intc/loongarch_pic_common.c | ||
82 | +++ b/hw/intc/loongarch_pic_common.c | ||
83 | @@ -XXX,XX +XXX,XX @@ | ||
84 | * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
85 | */ | ||
86 | |||
87 | +#include "qemu/osdep.h" | ||
88 | +#include "qapi/error.h" | ||
89 | +#include "hw/intc/loongarch_pic_common.h" | ||
90 | +#include "hw/qdev-properties.h" | ||
91 | +#include "migration/vmstate.h" | ||
92 | + | ||
93 | static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) | ||
94 | { | ||
95 | - LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev); | ||
96 | + LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev); | ||
97 | |||
98 | if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { | ||
99 | error_setg(errp, "Invalid 'pic_irq_num'"); | ||
100 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = { | ||
101 | VMSTATE_END_OF_LIST() | ||
102 | } | ||
103 | }; | ||
104 | + | ||
105 | +static void loongarch_pic_common_class_init(ObjectClass *klass, void *data) | ||
106 | +{ | ||
107 | + DeviceClass *dc = DEVICE_CLASS(klass); | ||
108 | + LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass); | ||
109 | + | ||
110 | + device_class_set_parent_realize(dc, loongarch_pic_common_realize, | ||
111 | + &lpcc->parent_realize); | ||
112 | + device_class_set_props(dc, loongarch_pic_common_properties); | ||
113 | + dc->vmsd = &vmstate_loongarch_pic_common; | ||
114 | +} | ||
115 | + | ||
116 | +static const TypeInfo loongarch_pic_common_types[] = { | ||
117 | + { | ||
118 | + .name = TYPE_LOONGARCH_PIC_COMMON, | ||
119 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
120 | + .instance_size = sizeof(LoongArchPICCommonState), | ||
121 | + .class_size = sizeof(LoongArchPICCommonClass), | ||
122 | + .class_init = loongarch_pic_common_class_init, | ||
123 | + .abstract = true, | ||
124 | + } | ||
125 | +}; | ||
126 | + | ||
127 | +DEFINE_TYPES(loongarch_pic_common_types) | ||
128 | diff --git a/hw/intc/meson.build b/hw/intc/meson.build | ||
129 | index XXXXXXX..XXXXXXX 100644 | ||
130 | --- a/hw/intc/meson.build | ||
131 | +++ b/hw/intc/meson.build | ||
132 | @@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) | ||
133 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) | ||
134 | specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) | ||
135 | specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) | ||
136 | -specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) | ||
137 | +specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c')) | ||
138 | specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) | ||
139 | specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c')) | ||
140 | diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h | ||
141 | index XXXXXXX..XXXXXXX 100644 | ||
142 | --- a/include/hw/intc/loongarch_pch_pic.h | ||
143 | +++ b/include/hw/intc/loongarch_pch_pic.h | ||
144 | @@ -XXX,XX +XXX,XX @@ | ||
145 | |||
146 | #include "hw/intc/loongarch_pic_common.h" | ||
147 | |||
148 | -#define LoongArchPCHPIC LoongArchPICCommonState | ||
149 | -#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" | ||
150 | -#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name | ||
151 | -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) | ||
152 | +#define TYPE_LOONGARCH_PIC "loongarch_pic" | ||
153 | +#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name | ||
154 | +OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC) | ||
155 | + | ||
156 | +struct LoongarchPICState { | ||
157 | + LoongArchPICCommonState parent_obj; | ||
158 | +}; | ||
159 | + | ||
160 | +struct LoongarchPICClass { | ||
161 | + LoongArchPICCommonClass parent_class; | ||
162 | + | ||
163 | + DeviceRealize parent_realize; | ||
164 | +}; | ||
165 | + | ||
166 | +#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC | ||
167 | +typedef struct LoongArchPICCommonState LoongArchPCHPIC; | ||
168 | +#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj)) | ||
169 | |||
170 | #endif /* HW_LOONGARCH_PCH_PIC_H */ | ||
171 | diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h | ||
172 | index XXXXXXX..XXXXXXX 100644 | ||
173 | --- a/include/hw/intc/loongarch_pic_common.h | ||
174 | +++ b/include/hw/intc/loongarch_pic_common.h | ||
175 | @@ -XXX,XX +XXX,XX @@ | ||
176 | #define POL_LO_START 0x40 | ||
177 | #define POL_HI_START 0x44 | ||
178 | |||
179 | +#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common" | ||
180 | +OBJECT_DECLARE_TYPE(LoongArchPICCommonState, | ||
181 | + LoongArchPICCommonClass, LOONGARCH_PIC_COMMON) | ||
182 | + | ||
183 | struct LoongArchPICCommonState { | ||
184 | SysBusDevice parent_obj; | ||
185 | |||
186 | @@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState { | ||
187 | MemoryRegion iomem8; | ||
188 | unsigned int irq_num; | ||
189 | }; | ||
190 | + | ||
191 | +struct LoongArchPICCommonClass { | ||
192 | + SysBusDeviceClass parent_class; | ||
193 | + | ||
194 | + DeviceRealize parent_realize; | ||
195 | +}; | ||
196 | #endif /* HW_LOONGARCH_PIC_COMMON_H */ | ||
197 | -- | ||
198 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Add common header file include/hw/intc/loongarch_extioi_common.h, and | ||
2 | move some macro definition from include/hw/intc/loongarch_extioi.h to | ||
3 | the common header file. | ||
4 | 1 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | include/hw/intc/loongarch_extioi.h | 50 +------------------ | ||
9 | include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++ | ||
10 | 2 files changed, 59 insertions(+), 49 deletions(-) | ||
11 | create mode 100644 include/hw/intc/loongarch_extioi_common.h | ||
12 | |||
13 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/include/hw/intc/loongarch_extioi.h | ||
16 | +++ b/include/hw/intc/loongarch_extioi.h | ||
17 | @@ -XXX,XX +XXX,XX @@ | ||
18 | * Copyright (C) 2021 Loongson Technology Corporation Limited | ||
19 | */ | ||
20 | |||
21 | -#include "hw/sysbus.h" | ||
22 | -#include "hw/loongarch/virt.h" | ||
23 | - | ||
24 | #ifndef LOONGARCH_EXTIOI_H | ||
25 | #define LOONGARCH_EXTIOI_H | ||
26 | |||
27 | -#define LS3A_INTC_IP 8 | ||
28 | -#define EXTIOI_IRQS (256) | ||
29 | -#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) | ||
30 | -/* irq from EXTIOI is routed to no more than 4 cpus */ | ||
31 | -#define EXTIOI_CPUS (4) | ||
32 | -/* map to ipnum per 32 irqs */ | ||
33 | -#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
34 | -#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
35 | -#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
36 | -#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
37 | - | ||
38 | -#define APIC_OFFSET 0x400 | ||
39 | -#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
40 | - | ||
41 | -#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
42 | -#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
43 | -#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
44 | -#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
45 | -#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
46 | -#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
47 | -#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
48 | -#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
49 | -#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
50 | -#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
51 | -#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
52 | -#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
53 | -#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
54 | -#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
55 | -#define EXTIOI_SIZE 0x800 | ||
56 | - | ||
57 | -#define EXTIOI_VIRT_BASE (0x40000000) | ||
58 | -#define EXTIOI_VIRT_SIZE (0x1000) | ||
59 | -#define EXTIOI_VIRT_FEATURES (0x0) | ||
60 | -#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
61 | -#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
62 | -#define EXTIOI_HAS_INT_ENCODE (2) | ||
63 | -#define EXTIOI_HAS_CPU_ENCODE (3) | ||
64 | -#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
65 | - | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
66 | - | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
67 | -#define EXTIOI_VIRT_CONFIG (0x4) | ||
68 | -#define EXTIOI_ENABLE (1) | ||
69 | -#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
70 | -#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
71 | -#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
72 | -#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
73 | +#include "hw/intc/loongarch_extioi_common.h" | ||
74 | |||
75 | typedef struct ExtIOICore { | ||
76 | uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
77 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
78 | new file mode 100644 | ||
79 | index XXXXXXX..XXXXXXX | ||
80 | --- /dev/null | ||
81 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
82 | @@ -XXX,XX +XXX,XX @@ | ||
83 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
84 | +/* | ||
85 | + * LoongArch 3A5000 ext interrupt controller definitions | ||
86 | + * Copyright (C) 2024 Loongson Technology Corporation Limited | ||
87 | + */ | ||
88 | + | ||
89 | +#ifndef LOONGARCH_EXTIOI_COMMON_H | ||
90 | +#define LOONGARCH_EXTIOI_COMMON_H | ||
91 | + | ||
92 | +#include "hw/sysbus.h" | ||
93 | +#include "hw/loongarch/virt.h" | ||
94 | + | ||
95 | +#define LS3A_INTC_IP 8 | ||
96 | +#define EXTIOI_IRQS (256) | ||
97 | +#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8) | ||
98 | +/* irq from EXTIOI is routed to no more than 4 cpus */ | ||
99 | +#define EXTIOI_CPUS (4) | ||
100 | +/* map to ipnum per 32 irqs */ | ||
101 | +#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32) | ||
102 | +#define EXTIOI_IRQS_COREMAP_SIZE 256 | ||
103 | +#define EXTIOI_IRQS_NODETYPE_COUNT 16 | ||
104 | +#define EXTIOI_IRQS_GROUP_COUNT 8 | ||
105 | + | ||
106 | +#define APIC_OFFSET 0x400 | ||
107 | +#define APIC_BASE (0x1000ULL + APIC_OFFSET) | ||
108 | +#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET) | ||
109 | +#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET) | ||
110 | +#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET) | ||
111 | +#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET) | ||
112 | +#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET) | ||
113 | +#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET) | ||
114 | +#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET) | ||
115 | +#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET) | ||
116 | +#define EXTIOI_ISR_START (0x700 - APIC_OFFSET) | ||
117 | +#define EXTIOI_ISR_END (0x720 - APIC_OFFSET) | ||
118 | +#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET) | ||
119 | +#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) | ||
120 | +#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) | ||
121 | +#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
122 | +#define EXTIOI_SIZE 0x800 | ||
123 | + | ||
124 | +#define EXTIOI_VIRT_BASE (0x40000000) | ||
125 | +#define EXTIOI_VIRT_SIZE (0x1000) | ||
126 | +#define EXTIOI_VIRT_FEATURES (0x0) | ||
127 | +#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
128 | +#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
129 | +#define EXTIOI_HAS_INT_ENCODE (2) | ||
130 | +#define EXTIOI_HAS_CPU_ENCODE (3) | ||
131 | +#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
132 | + | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
133 | + | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
134 | +#define EXTIOI_VIRT_CONFIG (0x4) | ||
135 | +#define EXTIOI_ENABLE (1) | ||
136 | +#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
137 | +#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
138 | +#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
139 | +#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
140 | +#endif /* LOONGARCH_EXTIOI_H */ | ||
141 | -- | ||
142 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h | ||
2 | to file loongarch_extioi_common.h. | ||
3 | 1 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | include/hw/intc/loongarch_extioi.h | 26 ---------------------- | ||
8 | include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++ | ||
9 | 2 files changed, 27 insertions(+), 26 deletions(-) | ||
10 | |||
11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/include/hw/intc/loongarch_extioi.h | ||
14 | +++ b/include/hw/intc/loongarch_extioi.h | ||
15 | @@ -XXX,XX +XXX,XX @@ | ||
16 | |||
17 | #include "hw/intc/loongarch_extioi_common.h" | ||
18 | |||
19 | -typedef struct ExtIOICore { | ||
20 | - uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
21 | - DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); | ||
22 | - qemu_irq parent_irq[LS3A_INTC_IP]; | ||
23 | -} ExtIOICore; | ||
24 | - | ||
25 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" | ||
26 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) | ||
27 | -struct LoongArchExtIOI { | ||
28 | - SysBusDevice parent_obj; | ||
29 | - uint32_t num_cpu; | ||
30 | - uint32_t features; | ||
31 | - uint32_t status; | ||
32 | - /* hardware state */ | ||
33 | - uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
34 | - uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
35 | - uint32_t isr[EXTIOI_IRQS / 32]; | ||
36 | - uint32_t enable[EXTIOI_IRQS / 32]; | ||
37 | - uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; | ||
38 | - uint32_t coremap[EXTIOI_IRQS / 4]; | ||
39 | - uint32_t sw_pending[EXTIOI_IRQS / 32]; | ||
40 | - uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; | ||
41 | - uint8_t sw_coremap[EXTIOI_IRQS]; | ||
42 | - qemu_irq irq[EXTIOI_IRQS]; | ||
43 | - ExtIOICore *cpu; | ||
44 | - MemoryRegion extioi_system_mem; | ||
45 | - MemoryRegion virt_extend; | ||
46 | -}; | ||
47 | #endif /* LOONGARCH_EXTIOI_H */ | ||
48 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
49 | index XXXXXXX..XXXXXXX 100644 | ||
50 | --- a/include/hw/intc/loongarch_extioi_common.h | ||
51 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
52 | @@ -XXX,XX +XXX,XX @@ | ||
53 | #define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
54 | #define EXTIOI_VIRT_COREMAP_START (0x40) | ||
55 | #define EXTIOI_VIRT_COREMAP_END (0x240) | ||
56 | + | ||
57 | +typedef struct ExtIOICore { | ||
58 | + uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
59 | + DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); | ||
60 | + qemu_irq parent_irq[LS3A_INTC_IP]; | ||
61 | +} ExtIOICore; | ||
62 | + | ||
63 | +struct LoongArchExtIOI { | ||
64 | + SysBusDevice parent_obj; | ||
65 | + uint32_t num_cpu; | ||
66 | + uint32_t features; | ||
67 | + uint32_t status; | ||
68 | + /* hardware state */ | ||
69 | + uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
70 | + uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
71 | + uint32_t isr[EXTIOI_IRQS / 32]; | ||
72 | + uint32_t enable[EXTIOI_IRQS / 32]; | ||
73 | + uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4]; | ||
74 | + uint32_t coremap[EXTIOI_IRQS / 4]; | ||
75 | + uint32_t sw_pending[EXTIOI_IRQS / 32]; | ||
76 | + uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE]; | ||
77 | + uint8_t sw_coremap[EXTIOI_IRQS]; | ||
78 | + qemu_irq irq[EXTIOI_IRQS]; | ||
79 | + ExtIOICore *cpu; | ||
80 | + MemoryRegion extioi_system_mem; | ||
81 | + MemoryRegion virt_extend; | ||
82 | +}; | ||
83 | #endif /* LOONGARCH_EXTIOI_H */ | ||
84 | -- | ||
85 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Rename structure LoongArchExtIOI with LoongArchExtIOICommonState, | ||
2 | since it is defined in file loongarch_extioi_common.h | ||
3 | 1 | ||
4 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
5 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
6 | --- | ||
7 | include/hw/intc/loongarch_extioi.h | 1 + | ||
8 | include/hw/intc/loongarch_extioi_common.h | 2 +- | ||
9 | 2 files changed, 2 insertions(+), 1 deletion(-) | ||
10 | |||
11 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/include/hw/intc/loongarch_extioi.h | ||
14 | +++ b/include/hw/intc/loongarch_extioi.h | ||
15 | @@ -XXX,XX +XXX,XX @@ | ||
16 | |||
17 | #include "hw/intc/loongarch_extioi_common.h" | ||
18 | |||
19 | +#define LoongArchExtIOI LoongArchExtIOICommonState | ||
20 | #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi" | ||
21 | OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) | ||
22 | #endif /* LOONGARCH_EXTIOI_H */ | ||
23 | diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h | ||
24 | index XXXXXXX..XXXXXXX 100644 | ||
25 | --- a/include/hw/intc/loongarch_extioi_common.h | ||
26 | +++ b/include/hw/intc/loongarch_extioi_common.h | ||
27 | @@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore { | ||
28 | qemu_irq parent_irq[LS3A_INTC_IP]; | ||
29 | } ExtIOICore; | ||
30 | |||
31 | -struct LoongArchExtIOI { | ||
32 | +struct LoongArchExtIOICommonState { | ||
33 | SysBusDevice parent_obj; | ||
34 | uint32_t num_cpu; | ||
35 | uint32_t features; | ||
36 | -- | ||
37 | 2.43.5 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | With some structure such as vmstate and property, rename LoongArchExtIOI | ||
2 | with LoongArchExtIOICommonState, these common structure will be moved | ||
3 | to common file. | ||
4 | 1 | ||
5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
6 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
7 | --- | ||
8 | hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++--------------- | ||
9 | 1 file changed, 25 insertions(+), 16 deletions(-) | ||
10 | |||
11 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/hw/intc/loongarch_extioi.c | ||
14 | +++ b/hw/intc/loongarch_extioi.c | ||
15 | @@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id) | ||
16 | return 0; | ||
17 | } | ||
18 | |||
19 | +static int loongarch_extioi_common_post_load(void *opaque, int version_id) | ||
20 | +{ | ||
21 | + return vmstate_extioi_post_load(opaque, version_id); | ||
22 | +} | ||
23 | + | ||
24 | static const VMStateDescription vmstate_extioi_core = { | ||
25 | .name = "extioi-core", | ||
26 | .version_id = 1, | ||
27 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = { | ||
28 | }; | ||
29 | |||
30 | static const VMStateDescription vmstate_loongarch_extioi = { | ||
31 | - .name = TYPE_LOONGARCH_EXTIOI, | ||
32 | + .name = "loongarch.extioi", | ||
33 | .version_id = 3, | ||
34 | .minimum_version_id = 3, | ||
35 | - .post_load = vmstate_extioi_post_load, | ||
36 | + .post_load = loongarch_extioi_common_post_load, | ||
37 | .fields = (const VMStateField[]) { | ||
38 | - VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT), | ||
39 | - VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI, | ||
40 | + VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState, | ||
41 | + EXTIOI_IRQS_GROUP_COUNT), | ||
42 | + VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState, | ||
43 | EXTIOI_IRQS_NODETYPE_COUNT / 2), | ||
44 | - VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
45 | - VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32), | ||
46 | - VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
47 | - VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4), | ||
48 | - | ||
49 | - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu, | ||
50 | - vmstate_extioi_core, ExtIOICore), | ||
51 | - VMSTATE_UINT32(features, LoongArchExtIOI), | ||
52 | - VMSTATE_UINT32(status, LoongArchExtIOI), | ||
53 | + VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState, | ||
54 | + EXTIOI_IRQS / 32), | ||
55 | + VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState, | ||
56 | + EXTIOI_IRQS / 32), | ||
57 | + VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState, | ||
58 | + EXTIOI_IRQS_IPMAP_SIZE / 4), | ||
59 | + VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState, | ||
60 | + EXTIOI_IRQS / 4), | ||
61 | + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState, | ||
62 | + num_cpu, vmstate_extioi_core, ExtIOICore), | ||
63 | + VMSTATE_UINT32(features, LoongArchExtIOICommonState), | ||
64 | + VMSTATE_UINT32(status, LoongArchExtIOICommonState), | ||
65 | VMSTATE_END_OF_LIST() | ||
66 | } | ||
67 | }; | ||
68 | |||
69 | static const Property extioi_properties[] = { | ||
70 | - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1), | ||
71 | - DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features, | ||
72 | - EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
73 | + DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), | ||
74 | + DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, | ||
75 | + features, EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
76 | DEFINE_PROP_END_OF_LIST(), | ||
77 | }; | ||
78 | |||
79 | -- | ||
80 | 2.43.5 | diff view generated by jsdifflib |