1
The following changes since commit ca80a5d026a280762e0772615f1988db542b3ade:
1
The following changes since commit b69801dd6b1eb4d107f7c2f643adf0a4e3ec9124:
2
2
3
Merge tag 'hw-misc-20241214' of https://github.com/philmd/qemu into staging (2024-12-14 08:42:53 -0500)
3
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging (2025-02-22 05:06:39 +0800)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241216
7
https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250225
8
8
9
for you to fetch changes up to efada537c6c49e414ae87ce66803d6d8543ad140:
9
for you to fetch changes up to db369c11c90b35f3a6ab59ad78564aea5b30c3da:
10
10
11
hw/intc/loongarch_extioi: Code cleanup about loongarch_extioi (2024-12-16 09:05:14 +0800)
11
target/loongarch: Enable virtual extioi feature (2025-02-25 16:05:31 +0800)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
pull-loongarch-20241216
14
pull-loongarch-20250225 queue
15
v1 .. v2: Push patch again since forgot to push to upstream
16
15
17
----------------------------------------------------------------
16
----------------------------------------------------------------
18
Bibo Mao (18):
17
Bibo Mao (10):
19
include: Add loongarch_pic_common header file
18
target/loongarch/gdbstub: Fix gdbstub incorrectly handling some registers
20
include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
19
target/loongarch: Correct maximum physical address in KVM mode
21
hw/intc/loongarch_pch: Merge instance_init() into realize()
20
target/loongarch: Add post init function for kvm mode
22
hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
21
target/loongarch: Move kvm specified vCPU property to kvm directory
23
hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
22
target/loongarch: Add vCPU property for paravirt ipi feature
24
hw/intc/loongarch_pch: Inherit from loongarch_pic_common
23
target/loongarch: Add paravirt ipi feature detection
25
hw/intc/loongarch_pch: Add pre_save and post_load interfaces
24
target/loongarch: Enable paravirt ipi feature
26
hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic
25
target/loongarch: Add vCPU property for kvm steal time feature
27
include: Add loongarch_extioi_common header file
26
target/loongarch: Add kvm steal time feature detection
28
include: Move struct LoongArchExtIOI to header file loongarch_extioi_common
27
target/loongarch: Enable virtual extioi feature
29
include: Rename LoongArchExtIOI with LoongArchExtIOICommonState
30
hw/intc/loongarch_extioi: Rename LoongArchExtIOI with LoongArchExtIOICommonState
31
hw/intc/loongarch_extioi: Add common realize interface
32
hw/intc/loongarch_extioi: Add unrealize interface
33
hw/intc/loongarch_extioi: Add common file loongarch_extioi_common
34
hw/intc/loongarch_extioi: Inherit from loongarch_extioi_common
35
hw/intc/loongarch_extioi: Add pre_save interface
36
hw/intc/loongarch_extioi: Code cleanup about loongarch_extioi
37
28
38
hw/intc/loongarch_extioi.c | 110 +++++++++--------------------
29
Xianglai Li (1):
39
hw/intc/loongarch_extioi_common.c | 113 ++++++++++++++++++++++++++++++
30
target/loongarch: fix vcpu reset command word issue
40
hw/intc/loongarch_pch_pic.c | 106 +++++++++-------------------
31
41
hw/intc/loongarch_pic_common.c | 97 +++++++++++++++++++++++++
32
hw/loongarch/virt.c | 8 --
42
hw/intc/meson.build | 4 +-
33
include/hw/loongarch/virt.h | 9 ++
43
hw/loongarch/virt.c | 2 +-
34
target/loongarch/cpu.c | 52 ++--------
44
include/hw/intc/loongarch_extioi.h | 84 +++-------------------
35
target/loongarch/cpu.h | 13 +++
45
include/hw/intc/loongarch_extioi_common.h | 98 ++++++++++++++++++++++++++
36
target/loongarch/gdbstub.c | 11 +-
46
include/hw/intc/loongarch_pch_pic.h | 70 ++++--------------
37
target/loongarch/kvm/kvm.c | 186 +++++++++++++++++++++++++++++++++-
47
include/hw/intc/loongarch_pic_common.h | 82 ++++++++++++++++++++++
38
target/loongarch/loongarch-qmp-cmds.c | 2 +-
48
10 files changed, 488 insertions(+), 278 deletions(-)
39
7 files changed, 224 insertions(+), 57 deletions(-)
49
create mode 100644 hw/intc/loongarch_extioi_common.c
50
create mode 100644 hw/intc/loongarch_pic_common.c
51
create mode 100644 include/hw/intc/loongarch_extioi_common.h
52
create mode 100644 include/hw/intc/loongarch_pic_common.h
diff view generated by jsdifflib
Deleted patch
1
Add common header file hw/intc/loongarch_pic_common.h, and move
2
some macro definition from hw/intc/loongarch_pch_pic.h to the common
3
header file.
4
1
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
---
8
include/hw/intc/loongarch_pch_pic.h | 36 +++-------------------
9
include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++
10
2 files changed, 47 insertions(+), 31 deletions(-)
11
create mode 100644 include/hw/intc/loongarch_pic_common.h
12
13
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/intc/loongarch_pch_pic.h
16
+++ b/include/hw/intc/loongarch_pch_pic.h
17
@@ -XXX,XX +XXX,XX @@
18
* Copyright (c) 2021 Loongson Technology Corporation Limited
19
*/
20
21
-#include "hw/sysbus.h"
22
+#ifndef HW_LOONGARCH_PCH_PIC_H
23
+#define HW_LOONGARCH_PCH_PIC_H
24
+
25
+#include "hw/intc/loongarch_pic_common.h"
26
27
#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
28
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
29
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
30
31
-#define PCH_PIC_INT_ID_VAL 0x7000000UL
32
-#define PCH_PIC_INT_ID_VER 0x1UL
33
-
34
-#define PCH_PIC_INT_ID_LO 0x00
35
-#define PCH_PIC_INT_ID_HI 0x04
36
-#define PCH_PIC_INT_MASK_LO 0x20
37
-#define PCH_PIC_INT_MASK_HI 0x24
38
-#define PCH_PIC_HTMSI_EN_LO 0x40
39
-#define PCH_PIC_HTMSI_EN_HI 0x44
40
-#define PCH_PIC_INT_EDGE_LO 0x60
41
-#define PCH_PIC_INT_EDGE_HI 0x64
42
-#define PCH_PIC_INT_CLEAR_LO 0x80
43
-#define PCH_PIC_INT_CLEAR_HI 0x84
44
-#define PCH_PIC_AUTO_CTRL0_LO 0xc0
45
-#define PCH_PIC_AUTO_CTRL0_HI 0xc4
46
-#define PCH_PIC_AUTO_CTRL1_LO 0xe0
47
-#define PCH_PIC_AUTO_CTRL1_HI 0xe4
48
-#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100
49
-#define PCH_PIC_ROUTE_ENTRY_END 0x13f
50
-#define PCH_PIC_HTMSI_VEC_OFFSET 0x200
51
-#define PCH_PIC_HTMSI_VEC_END 0x23f
52
-#define PCH_PIC_INT_STATUS_LO 0x3a0
53
-#define PCH_PIC_INT_STATUS_HI 0x3a4
54
-#define PCH_PIC_INT_POL_LO 0x3e0
55
-#define PCH_PIC_INT_POL_HI 0x3e4
56
-
57
-#define STATUS_LO_START 0
58
-#define STATUS_HI_START 0x4
59
-#define POL_LO_START 0x40
60
-#define POL_HI_START 0x44
61
struct LoongArchPCHPIC {
62
SysBusDevice parent_obj;
63
qemu_irq parent_irq[64];
64
@@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC {
65
MemoryRegion iomem8;
66
unsigned int irq_num;
67
};
68
+#endif /* HW_LOONGARCH_PCH_PIC_H */
69
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
70
new file mode 100644
71
index XXXXXXX..XXXXXXX
72
--- /dev/null
73
+++ b/include/hw/intc/loongarch_pic_common.h
74
@@ -XXX,XX +XXX,XX @@
75
+/* SPDX-License-Identifier: GPL-2.0-or-later */
76
+/*
77
+ * LoongArch 7A1000 I/O interrupt controller definitions
78
+ * Copyright (c) 2024 Loongson Technology Corporation Limited
79
+ */
80
+
81
+#ifndef HW_LOONGARCH_PIC_COMMON_H
82
+#define HW_LOONGARCH_PIC_COMMON_H
83
+
84
+#include "hw/pci-host/ls7a.h"
85
+#include "hw/sysbus.h"
86
+
87
+#define PCH_PIC_INT_ID_VAL 0x7000000UL
88
+#define PCH_PIC_INT_ID_VER 0x1UL
89
+#define PCH_PIC_INT_ID_LO 0x00
90
+#define PCH_PIC_INT_ID_HI 0x04
91
+#define PCH_PIC_INT_MASK_LO 0x20
92
+#define PCH_PIC_INT_MASK_HI 0x24
93
+#define PCH_PIC_HTMSI_EN_LO 0x40
94
+#define PCH_PIC_HTMSI_EN_HI 0x44
95
+#define PCH_PIC_INT_EDGE_LO 0x60
96
+#define PCH_PIC_INT_EDGE_HI 0x64
97
+#define PCH_PIC_INT_CLEAR_LO 0x80
98
+#define PCH_PIC_INT_CLEAR_HI 0x84
99
+#define PCH_PIC_AUTO_CTRL0_LO 0xc0
100
+#define PCH_PIC_AUTO_CTRL0_HI 0xc4
101
+#define PCH_PIC_AUTO_CTRL1_LO 0xe0
102
+#define PCH_PIC_AUTO_CTRL1_HI 0xe4
103
+#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100
104
+#define PCH_PIC_ROUTE_ENTRY_END 0x13f
105
+#define PCH_PIC_HTMSI_VEC_OFFSET 0x200
106
+#define PCH_PIC_HTMSI_VEC_END 0x23f
107
+#define PCH_PIC_INT_STATUS_LO 0x3a0
108
+#define PCH_PIC_INT_STATUS_HI 0x3a4
109
+#define PCH_PIC_INT_POL_LO 0x3e0
110
+#define PCH_PIC_INT_POL_HI 0x3e4
111
+
112
+#define STATUS_LO_START 0
113
+#define STATUS_HI_START 0x4
114
+#define POL_LO_START 0x40
115
+#define POL_HI_START 0x44
116
+#endif /* HW_LOONGARCH_PIC_COMMON_H */
117
--
118
2.43.5
diff view generated by jsdifflib
Deleted patch
1
Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h
2
to file loongarch_pic_common.h, and rename structure name with
3
LoongArchPICCommonState.
4
1
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
---
8
include/hw/intc/loongarch_pch_pic.h | 27 +------------------------
9
include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++
10
2 files changed, 29 insertions(+), 26 deletions(-)
11
12
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/hw/intc/loongarch_pch_pic.h
15
+++ b/include/hw/intc/loongarch_pch_pic.h
16
@@ -XXX,XX +XXX,XX @@
17
18
#include "hw/intc/loongarch_pic_common.h"
19
20
+#define LoongArchPCHPIC LoongArchPICCommonState
21
#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
22
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
23
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
24
25
-struct LoongArchPCHPIC {
26
- SysBusDevice parent_obj;
27
- qemu_irq parent_irq[64];
28
- uint64_t int_mask; /*0x020 interrupt mask register*/
29
- uint64_t htmsi_en; /*0x040 1=msi*/
30
- uint64_t intedge; /*0x060 edge=1 level =0*/
31
- uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
32
- uint64_t auto_crtl0; /*0x0c0*/
33
- uint64_t auto_crtl1; /*0x0e0*/
34
- uint64_t last_intirr; /* edge detection */
35
- uint64_t intirr; /* 0x380 interrupt request register */
36
- uint64_t intisr; /* 0x3a0 interrupt service register */
37
- /*
38
- * 0x3e0 interrupt level polarity selection
39
- * register 0 for high level trigger
40
- */
41
- uint64_t int_polarity;
42
-
43
- uint8_t route_entry[64]; /*0x100 - 0x138*/
44
- uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
45
-
46
- MemoryRegion iomem32_low;
47
- MemoryRegion iomem32_high;
48
- MemoryRegion iomem8;
49
- unsigned int irq_num;
50
-};
51
#endif /* HW_LOONGARCH_PCH_PIC_H */
52
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
53
index XXXXXXX..XXXXXXX 100644
54
--- a/include/hw/intc/loongarch_pic_common.h
55
+++ b/include/hw/intc/loongarch_pic_common.h
56
@@ -XXX,XX +XXX,XX @@
57
#define STATUS_HI_START 0x4
58
#define POL_LO_START 0x40
59
#define POL_HI_START 0x44
60
+
61
+struct LoongArchPICCommonState {
62
+ SysBusDevice parent_obj;
63
+
64
+ qemu_irq parent_irq[64];
65
+ uint64_t int_mask; /* 0x020 interrupt mask register */
66
+ uint64_t htmsi_en; /* 0x040 1=msi */
67
+ uint64_t intedge; /* 0x060 edge=1 level=0 */
68
+ uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */
69
+ uint64_t auto_crtl0; /* 0x0c0 */
70
+ uint64_t auto_crtl1; /* 0x0e0 */
71
+ uint64_t last_intirr; /* edge detection */
72
+ uint64_t intirr; /* 0x380 interrupt request register */
73
+ uint64_t intisr; /* 0x3a0 interrupt service register */
74
+ /*
75
+ * 0x3e0 interrupt level polarity selection
76
+ * register 0 for high level trigger
77
+ */
78
+ uint64_t int_polarity;
79
+
80
+ uint8_t route_entry[64]; /* 0x100 - 0x138 */
81
+ uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
82
+
83
+ MemoryRegion iomem32_low;
84
+ MemoryRegion iomem32_high;
85
+ MemoryRegion iomem8;
86
+ unsigned int irq_num;
87
+};
88
#endif /* HW_LOONGARCH_PIC_COMMON_H */
89
--
90
2.43.5
diff view generated by jsdifflib
Deleted patch
1
Memory region is created in instance_init(), merge it into function
2
realize(). There is no special class_init() for loongarch_pch object.
3
1
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Reviewed-by: Song Gao <gaosong@loongson.cn>
6
---
7
hw/intc/loongarch_pch_pic.c | 15 ++++-----------
8
1 file changed, 4 insertions(+), 11 deletions(-)
9
10
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/hw/intc/loongarch_pch_pic.c
13
+++ b/hw/intc/loongarch_pch_pic.c
14
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
15
static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
16
{
17
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
18
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
19
20
if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
21
error_setg(errp, "Invalid 'pic_irq_num'");
22
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
23
24
qdev_init_gpio_out(dev, s->parent_irq, s->irq_num);
25
qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);
26
-}
27
-
28
-static void loongarch_pch_pic_init(Object *obj)
29
-{
30
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj);
31
- SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
32
-
33
- memory_region_init_io(&s->iomem32_low, obj,
34
+ memory_region_init_io(&s->iomem32_low, OBJECT(dev),
35
&loongarch_pch_pic_reg32_low_ops,
36
s, PCH_PIC_NAME(.reg32_part1), 0x100);
37
- memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops,
38
+ memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops,
39
s, PCH_PIC_NAME(.reg8), 0x2a0);
40
- memory_region_init_io(&s->iomem32_high, obj,
41
+ memory_region_init_io(&s->iomem32_high, OBJECT(dev),
42
&loongarch_pch_pic_reg32_high_ops,
43
s, PCH_PIC_NAME(.reg32_part2), 0xc60);
44
sysbus_init_mmio(sbd, &s->iomem32_low);
45
@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = {
46
.name = TYPE_LOONGARCH_PCH_PIC,
47
.parent = TYPE_SYS_BUS_DEVICE,
48
.instance_size = sizeof(LoongArchPCHPIC),
49
- .instance_init = loongarch_pch_pic_init,
50
.class_init = loongarch_pch_pic_class_init,
51
};
52
53
--
54
2.43.5
diff view generated by jsdifflib
1
Rename structure LoongArchExtIOI with LoongArchExtIOICommonState,
1
From: Xianglai Li <lixianglai@loongson.cn>
2
since it is defined in file loongarch_extioi_common.h
3
2
3
When the KVM_REG_LOONGARCH_VCPU_RESET command word
4
is sent to the kernel through the kvm_set_one_reg interface,
5
the parameter source needs to be a legal address,
6
otherwise the kernel will return an error and the command word
7
will fail to be sent.
8
9
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
10
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
11
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Reviewed-by: Song Gao <gaosong@loongson.cn>
6
---
12
---
7
include/hw/intc/loongarch_extioi.h | 1 +
13
target/loongarch/kvm/kvm.c | 9 ++++++++-
8
include/hw/intc/loongarch_extioi_common.h | 2 +-
14
1 file changed, 8 insertions(+), 1 deletion(-)
9
2 files changed, 2 insertions(+), 1 deletion(-)
10
15
11
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
16
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
12
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
13
--- a/include/hw/intc/loongarch_extioi.h
18
--- a/target/loongarch/kvm/kvm.c
14
+++ b/include/hw/intc/loongarch_extioi.h
19
+++ b/target/loongarch/kvm/kvm.c
15
@@ -XXX,XX +XXX,XX @@
20
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_get_lbt(CPUState *cs)
16
21
void kvm_arch_reset_vcpu(CPUState *cs)
17
#include "hw/intc/loongarch_extioi_common.h"
22
{
18
23
CPULoongArchState *env = cpu_env(cs);
19
+#define LoongArchExtIOI LoongArchExtIOICommonState
24
+ int ret = 0;
20
#define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
25
+ uint64_t unused = 0;
21
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
26
22
#endif /* LOONGARCH_EXTIOI_H */
27
env->mp_state = KVM_MP_STATE_RUNNABLE;
23
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
28
- kvm_set_one_reg(cs, KVM_REG_LOONGARCH_VCPU_RESET, 0);
24
index XXXXXXX..XXXXXXX 100644
29
+ ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_VCPU_RESET, &unused);
25
--- a/include/hw/intc/loongarch_extioi_common.h
30
+ if (ret) {
26
+++ b/include/hw/intc/loongarch_extioi_common.h
31
+ error_report("Failed to set KVM_REG_LOONGARCH_VCPU_RESET: %s",
27
@@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore {
32
+ strerror(errno));
28
qemu_irq parent_irq[LS3A_INTC_IP];
33
+ exit(EXIT_FAILURE);
29
} ExtIOICore;
34
+ }
30
35
}
31
-struct LoongArchExtIOI {
36
32
+struct LoongArchExtIOICommonState {
37
static int kvm_loongarch_get_mpstate(CPUState *cs)
33
SysBusDevice parent_obj;
34
uint32_t num_cpu;
35
uint32_t features;
36
--
38
--
37
2.43.5
39
2.43.5
40
41
diff view generated by jsdifflib
1
Add common realize function, it is only to check validity of property.
1
Write operation with R32 (orig_a0) and R34 (CSR_BADV) is discarded on
2
gdbstub implementation for LoongArch system. And return value should
3
be register size rather than 0, since it is used to calculate offset of
4
next register such as R33 (PC) in function handle_write_all_regs().
2
5
6
Cc: qemu-stable@nongnu.org
7
Fixes: ca61e75071c6 ("target/loongarch: Add gdb support.")
3
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
8
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Reviewed-by: Song Gao <gaosong@loongson.cn>
9
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
5
---
10
---
6
hw/intc/loongarch_extioi.c | 16 ++++++++++++++--
11
target/loongarch/gdbstub.c | 11 ++++++-----
7
1 file changed, 14 insertions(+), 2 deletions(-)
12
1 file changed, 6 insertions(+), 5 deletions(-)
8
13
9
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
14
diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c
10
index XXXXXXX..XXXXXXX 100644
15
index XXXXXXX..XXXXXXX 100644
11
--- a/hw/intc/loongarch_extioi.c
16
--- a/target/loongarch/gdbstub.c
12
+++ b/hw/intc/loongarch_extioi.c
17
+++ b/target/loongarch/gdbstub.c
13
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps extioi_virt_ops = {
18
@@ -XXX,XX +XXX,XX @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
14
.endianness = DEVICE_LITTLE_ENDIAN,
19
{
15
};
20
CPULoongArchState *env = cpu_env(cs);
16
21
target_ulong tmp;
17
+static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
22
- int read_length;
18
+{
23
int length = 0;
19
+ LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
24
25
+ if (n < 0 || n > 34) {
26
+ return 0;
27
+ }
20
+
28
+
21
+ if (s->num_cpu == 0) {
29
if (is_la64(env)) {
22
+ error_setg(errp, "num-cpu must be at least 1");
30
tmp = ldq_le_p(mem_buf);
23
+ return;
31
- read_length = 8;
24
+ }
32
+ length = 8;
25
+}
33
} else {
26
+
34
tmp = ldl_le_p(mem_buf);
27
static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
35
- read_length = 4;
28
{
36
+ length = 4;
29
LoongArchExtIOI *s = LOONGARCH_EXTIOI(dev);
30
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
31
+ Error *local_err = NULL;
32
int i, pin;
33
34
- if (s->num_cpu == 0) {
35
- error_setg(errp, "num-cpu must be at least 1");
36
+ loongarch_extioi_common_realize(dev, &local_err);
37
+ if (local_err) {
38
+ error_propagate(errp, local_err);
39
return;
40
}
37
}
41
38
39
if (0 <= n && n < 32) {
40
env->gpr[n] = tmp;
41
- length = read_length;
42
} else if (n == 33) {
43
set_pc(env, tmp);
44
- length = read_length;
45
}
46
return length;
47
}
42
--
48
--
43
2.43.5
49
2.43.5
diff view generated by jsdifflib
1
Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h
1
On 3A5000 system, the physical address space width for host is 48,
2
to file loongarch_extioi_common.h.
2
however 47 bit for KVM VM. For KVM VM, size of physical address space is
3
the same with that of virtual user space address.
4
5
Here modify physical address space width with 47 bit in KVM mode.
3
6
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
7
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Reviewed-by: Song Gao <gaosong@loongson.cn>
8
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
6
---
9
---
7
include/hw/intc/loongarch_extioi.h | 26 ----------------------
10
target/loongarch/cpu.c | 10 ++++++++--
8
include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++
11
1 file changed, 8 insertions(+), 2 deletions(-)
9
2 files changed, 27 insertions(+), 26 deletions(-)
10
12
11
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
13
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
12
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
13
--- a/include/hw/intc/loongarch_extioi.h
15
--- a/target/loongarch/cpu.c
14
+++ b/include/hw/intc/loongarch_extioi.h
16
+++ b/target/loongarch/cpu.c
15
@@ -XXX,XX +XXX,XX @@
17
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
16
18
{
17
#include "hw/intc/loongarch_extioi_common.h"
19
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
18
20
CPULoongArchState *env = &cpu->env;
19
-typedef struct ExtIOICore {
21
- uint32_t data = 0;
20
- uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
22
+ uint32_t data = 0, field;
21
- DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
23
int i;
22
- qemu_irq parent_irq[LS3A_INTC_IP];
24
23
-} ExtIOICore;
25
for (i = 0; i < 21; i++) {
24
-
26
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
25
#define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
27
data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
26
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
28
data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
27
-struct LoongArchExtIOI {
29
data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
28
- SysBusDevice parent_obj;
30
- data = FIELD_DP32(data, CPUCFG1, PALEN, 0x2f);
29
- uint32_t num_cpu;
31
+ if (kvm_enabled()) {
30
- uint32_t features;
32
+ /* GPA address width of VM is 47, field value is 47 - 1 */
31
- uint32_t status;
33
+ field = 0x2e;
32
- /* hardware state */
34
+ } else {
33
- uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
35
+ field = 0x2f; /* 48 bit - 1 */
34
- uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
36
+ }
35
- uint32_t isr[EXTIOI_IRQS / 32];
37
+ data = FIELD_DP32(data, CPUCFG1, PALEN, field);
36
- uint32_t enable[EXTIOI_IRQS / 32];
38
data = FIELD_DP32(data, CPUCFG1, VALEN, 0x2f);
37
- uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
39
data = FIELD_DP32(data, CPUCFG1, UAL, 1);
38
- uint32_t coremap[EXTIOI_IRQS / 4];
40
data = FIELD_DP32(data, CPUCFG1, RI, 1);
39
- uint32_t sw_pending[EXTIOI_IRQS / 32];
40
- uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
41
- uint8_t sw_coremap[EXTIOI_IRQS];
42
- qemu_irq irq[EXTIOI_IRQS];
43
- ExtIOICore *cpu;
44
- MemoryRegion extioi_system_mem;
45
- MemoryRegion virt_extend;
46
-};
47
#endif /* LOONGARCH_EXTIOI_H */
48
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
49
index XXXXXXX..XXXXXXX 100644
50
--- a/include/hw/intc/loongarch_extioi_common.h
51
+++ b/include/hw/intc/loongarch_extioi_common.h
52
@@ -XXX,XX +XXX,XX @@
53
#define EXTIOI_ENABLE_CPU_ENCODE (3)
54
#define EXTIOI_VIRT_COREMAP_START (0x40)
55
#define EXTIOI_VIRT_COREMAP_END (0x240)
56
+
57
+typedef struct ExtIOICore {
58
+ uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
59
+ DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
60
+ qemu_irq parent_irq[LS3A_INTC_IP];
61
+} ExtIOICore;
62
+
63
+struct LoongArchExtIOI {
64
+ SysBusDevice parent_obj;
65
+ uint32_t num_cpu;
66
+ uint32_t features;
67
+ uint32_t status;
68
+ /* hardware state */
69
+ uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
70
+ uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
71
+ uint32_t isr[EXTIOI_IRQS / 32];
72
+ uint32_t enable[EXTIOI_IRQS / 32];
73
+ uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
74
+ uint32_t coremap[EXTIOI_IRQS / 4];
75
+ uint32_t sw_pending[EXTIOI_IRQS / 32];
76
+ uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
77
+ uint8_t sw_coremap[EXTIOI_IRQS];
78
+ qemu_irq irq[EXTIOI_IRQS];
79
+ ExtIOICore *cpu;
80
+ MemoryRegion extioi_system_mem;
81
+ MemoryRegion virt_extend;
82
+};
83
#endif /* LOONGARCH_EXTIOI_H */
84
--
41
--
85
2.43.5
42
2.43.5
diff view generated by jsdifflib
1
Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object,
1
Some features such as LBT and PMU are implemented in kvm mode,
2
it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has
2
With paravirt features in future, post init function is added
3
its own realize() function.
3
for kvm mode, so that property for these features will be created
4
in kvm post init function.
4
5
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
8
---
8
hw/intc/loongarch_pch_pic.c | 38 ++++++++++++--------------
9
target/loongarch/cpu.c | 2 +-
9
hw/intc/loongarch_pic_common.c | 32 +++++++++++++++++++++-
10
target/loongarch/cpu.h | 8 ++++++++
10
hw/intc/meson.build | 2 +-
11
target/loongarch/kvm/kvm.c | 4 ++++
11
include/hw/intc/loongarch_pch_pic.h | 21 +++++++++++---
12
3 files changed, 13 insertions(+), 1 deletion(-)
12
include/hw/intc/loongarch_pic_common.h | 10 +++++++
13
5 files changed, 77 insertions(+), 26 deletions(-)
14
13
15
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
14
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
16
index XXXXXXX..XXXXXXX 100644
15
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/intc/loongarch_pch_pic.c
16
--- a/target/loongarch/cpu.c
18
+++ b/hw/intc/loongarch_pch_pic.c
17
+++ b/target/loongarch/cpu.c
19
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
18
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
20
s->int_polarity = 0x0;
19
loongarch_set_pmu);
20
object_property_set_description(obj, "pmu",
21
"Set off to performance monitor unit.");
22
-
23
+ kvm_loongarch_cpu_post_init(cpu);
24
} else {
25
cpu->lbt = ON_OFF_AUTO_OFF;
26
cpu->pmu = ON_OFF_AUTO_OFF;
27
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
28
index XXXXXXX..XXXXXXX 100644
29
--- a/target/loongarch/cpu.h
30
+++ b/target/loongarch/cpu.h
31
@@ -XXX,XX +XXX,XX @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
32
33
void loongarch_cpu_post_init(Object *obj);
34
35
+#ifdef CONFIG_KVM
36
+void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu);
37
+#else
38
+static inline void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
39
+{
40
+}
41
+#endif
42
+
43
#endif /* LOONGARCH_CPU_H */
44
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
45
index XXXXXXX..XXXXXXX 100644
46
--- a/target/loongarch/kvm/kvm.c
47
+++ b/target/loongarch/kvm/kvm.c
48
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
49
return ret;
21
}
50
}
22
51
23
-#include "loongarch_pic_common.c"
52
+void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
24
-static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
25
+static void loongarch_pic_realize(DeviceState *dev, Error **errp)
26
{
27
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
28
- SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
29
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
30
+ LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
31
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
32
Error *local_err = NULL;
33
34
- loongarch_pic_common_realize(dev, &local_err);
35
+ lpc->parent_realize(dev, &local_err);
36
if (local_err) {
37
error_propagate(errp, local_err);
38
return;
39
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
40
41
}
42
43
-static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
44
+static void loongarch_pic_class_init(ObjectClass *klass, void *data)
45
{
46
DeviceClass *dc = DEVICE_CLASS(klass);
47
+ LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
48
49
- dc->realize = loongarch_pch_pic_realize;
50
device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
51
- dc->vmsd = &vmstate_loongarch_pic_common;
52
- device_class_set_props(dc, loongarch_pic_common_properties);
53
+ device_class_set_parent_realize(dc, loongarch_pic_realize,
54
+ &lpc->parent_realize);
55
}
56
57
-static const TypeInfo loongarch_pch_pic_info = {
58
- .name = TYPE_LOONGARCH_PCH_PIC,
59
- .parent = TYPE_SYS_BUS_DEVICE,
60
- .instance_size = sizeof(LoongArchPCHPIC),
61
- .class_init = loongarch_pch_pic_class_init,
62
+static const TypeInfo loongarch_pic_types[] = {
63
+ {
64
+ .name = TYPE_LOONGARCH_PIC,
65
+ .parent = TYPE_LOONGARCH_PIC_COMMON,
66
+ .instance_size = sizeof(LoongarchPICState),
67
+ .class_size = sizeof(LoongarchPICClass),
68
+ .class_init = loongarch_pic_class_init,
69
+ }
70
};
71
72
-static void loongarch_pch_pic_register_types(void)
73
-{
74
- type_register_static(&loongarch_pch_pic_info);
75
-}
76
-
77
-type_init(loongarch_pch_pic_register_types)
78
+DEFINE_TYPES(loongarch_pic_types)
79
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
80
index XXXXXXX..XXXXXXX 100644
81
--- a/hw/intc/loongarch_pic_common.c
82
+++ b/hw/intc/loongarch_pic_common.c
83
@@ -XXX,XX +XXX,XX @@
84
* Copyright (C) 2024 Loongson Technology Corporation Limited
85
*/
86
87
+#include "qemu/osdep.h"
88
+#include "qapi/error.h"
89
+#include "hw/intc/loongarch_pic_common.h"
90
+#include "hw/qdev-properties.h"
91
+#include "migration/vmstate.h"
92
+
93
static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
94
{
95
- LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
96
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
97
98
if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
99
error_setg(errp, "Invalid 'pic_irq_num'");
100
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
101
VMSTATE_END_OF_LIST()
102
}
103
};
104
+
105
+static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
106
+{
53
+{
107
+ DeviceClass *dc = DEVICE_CLASS(klass);
108
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
109
+
110
+ device_class_set_parent_realize(dc, loongarch_pic_common_realize,
111
+ &lpcc->parent_realize);
112
+ device_class_set_props(dc, loongarch_pic_common_properties);
113
+ dc->vmsd = &vmstate_loongarch_pic_common;
114
+}
54
+}
115
+
55
+
116
+static const TypeInfo loongarch_pic_common_types[] = {
56
int kvm_arch_destroy_vcpu(CPUState *cs)
117
+ {
57
{
118
+ .name = TYPE_LOONGARCH_PIC_COMMON,
58
return 0;
119
+ .parent = TYPE_SYS_BUS_DEVICE,
120
+ .instance_size = sizeof(LoongArchPICCommonState),
121
+ .class_size = sizeof(LoongArchPICCommonClass),
122
+ .class_init = loongarch_pic_common_class_init,
123
+ .abstract = true,
124
+ }
125
+};
126
+
127
+DEFINE_TYPES(loongarch_pic_common_types)
128
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
129
index XXXXXXX..XXXXXXX 100644
130
--- a/hw/intc/meson.build
131
+++ b/hw/intc/meson.build
132
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
133
specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
134
specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
135
specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
136
-specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
137
+specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
138
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
139
specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
140
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
141
index XXXXXXX..XXXXXXX 100644
142
--- a/include/hw/intc/loongarch_pch_pic.h
143
+++ b/include/hw/intc/loongarch_pch_pic.h
144
@@ -XXX,XX +XXX,XX @@
145
146
#include "hw/intc/loongarch_pic_common.h"
147
148
-#define LoongArchPCHPIC LoongArchPICCommonState
149
-#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
150
-#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
151
-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
152
+#define TYPE_LOONGARCH_PIC "loongarch_pic"
153
+#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name
154
+OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
155
+
156
+struct LoongarchPICState {
157
+ LoongArchPICCommonState parent_obj;
158
+};
159
+
160
+struct LoongarchPICClass {
161
+ LoongArchPICCommonClass parent_class;
162
+
163
+ DeviceRealize parent_realize;
164
+};
165
+
166
+#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
167
+typedef struct LoongArchPICCommonState LoongArchPCHPIC;
168
+#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj))
169
170
#endif /* HW_LOONGARCH_PCH_PIC_H */
171
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
172
index XXXXXXX..XXXXXXX 100644
173
--- a/include/hw/intc/loongarch_pic_common.h
174
+++ b/include/hw/intc/loongarch_pic_common.h
175
@@ -XXX,XX +XXX,XX @@
176
#define POL_LO_START 0x40
177
#define POL_HI_START 0x44
178
179
+#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
180
+OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
181
+ LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
182
+
183
struct LoongArchPICCommonState {
184
SysBusDevice parent_obj;
185
186
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState {
187
MemoryRegion iomem8;
188
unsigned int irq_num;
189
};
190
+
191
+struct LoongArchPICCommonClass {
192
+ SysBusDeviceClass parent_class;
193
+
194
+ DeviceRealize parent_realize;
195
+};
196
#endif /* HW_LOONGARCH_PIC_COMMON_H */
197
--
59
--
198
2.43.5
60
2.43.5
diff view generated by jsdifflib
1
Move some common functions to file loongarch_pic_common.c, the common
1
LBT and PMU feature is supported only in kvm mode, move property
2
functions include loongarch_pic_common_realize(), property structure
2
about these two features to function kvm_loongarch_cpu_post_init().
3
loongarch_pic_common_properties and vmstate structure
4
vmstate_loongarch_pic_common.
5
3
6
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
7
Reviewed-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
8
---
6
---
9
hw/intc/loongarch_pch_pic.c | 37 +-----------------------------
7
target/loongarch/cpu.c | 40 ++------------------------------------
10
hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++
8
target/loongarch/kvm/kvm.c | 35 +++++++++++++++++++++++++++++++++
11
2 files changed, 42 insertions(+), 36 deletions(-)
9
2 files changed, 37 insertions(+), 38 deletions(-)
12
create mode 100644 hw/intc/loongarch_pic_common.c
13
10
14
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
11
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
15
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
16
--- a/hw/intc/loongarch_pch_pic.c
13
--- a/target/loongarch/cpu.c
17
+++ b/hw/intc/loongarch_pch_pic.c
14
+++ b/target/loongarch/cpu.c
18
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
15
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
19
s->int_polarity = 0x0;
16
cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
20
}
17
}
21
18
22
-static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
19
-static bool loongarch_get_lbt(Object *obj, Error **errp)
23
-{
20
-{
24
- LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
21
- return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
25
-
26
- if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
27
- error_setg(errp, "Invalid 'pic_irq_num'");
28
- return;
29
- }
30
-}
22
-}
31
-
23
-
32
+#include "loongarch_pic_common.c"
24
-static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
33
static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
25
-{
26
- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
27
-
28
- cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
29
-}
30
-
31
-static bool loongarch_get_pmu(Object *obj, Error **errp)
32
-{
33
- return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF;
34
-}
35
-
36
-static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
37
-{
38
- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
39
-
40
- cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
41
-}
42
-
43
void loongarch_cpu_post_init(Object *obj)
34
{
44
{
35
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
45
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
36
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
46
37
47
+ cpu->lbt = ON_OFF_AUTO_OFF;
48
+ cpu->pmu = ON_OFF_AUTO_OFF;
49
cpu->lsx = ON_OFF_AUTO_AUTO;
50
cpu->lasx = ON_OFF_AUTO_AUTO;
51
object_property_add_bool(obj, "lsx", loongarch_get_lsx,
52
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
53
loongarch_set_lasx);
54
/* lbt is enabled only in kvm mode, not supported in tcg mode */
55
if (kvm_enabled()) {
56
- cpu->lbt = ON_OFF_AUTO_AUTO;
57
- object_property_add_bool(obj, "lbt", loongarch_get_lbt,
58
- loongarch_set_lbt);
59
- object_property_set_description(obj, "lbt",
60
- "Set off to disable Binary Tranlation.");
61
-
62
- cpu->pmu = ON_OFF_AUTO_AUTO;
63
- object_property_add_bool(obj, "pmu", loongarch_get_pmu,
64
- loongarch_set_pmu);
65
- object_property_set_description(obj, "pmu",
66
- "Set off to performance monitor unit.");
67
kvm_loongarch_cpu_post_init(cpu);
68
- } else {
69
- cpu->lbt = ON_OFF_AUTO_OFF;
70
- cpu->pmu = ON_OFF_AUTO_OFF;
71
}
38
}
72
}
39
73
40
-static Property loongarch_pic_common_properties[] = {
74
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
41
- DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
75
index XXXXXXX..XXXXXXX 100644
42
- DEFINE_PROP_END_OF_LIST(),
76
--- a/target/loongarch/kvm/kvm.c
43
-};
77
+++ b/target/loongarch/kvm/kvm.c
44
-
78
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
45
-static const VMStateDescription vmstate_loongarch_pic_common = {
79
return ret;
46
- .name = "loongarch_pch_pic",
80
}
47
- .version_id = 1,
81
48
- .minimum_version_id = 1,
82
+static bool loongarch_get_lbt(Object *obj, Error **errp)
49
- .fields = (const VMStateField[]) {
50
- VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
51
- VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
52
- VMSTATE_UINT64(intedge, LoongArchPICCommonState),
53
- VMSTATE_UINT64(intclr, LoongArchPICCommonState),
54
- VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
55
- VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
56
- VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
57
- VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
58
- VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
59
- VMSTATE_UINT64(intirr, LoongArchPICCommonState),
60
- VMSTATE_UINT64(intisr, LoongArchPICCommonState),
61
- VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
62
- VMSTATE_END_OF_LIST()
63
- }
64
-};
65
-
66
static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
67
{
68
DeviceClass *dc = DEVICE_CLASS(klass);
69
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
70
new file mode 100644
71
index XXXXXXX..XXXXXXX
72
--- /dev/null
73
+++ b/hw/intc/loongarch_pic_common.c
74
@@ -XXX,XX +XXX,XX @@
75
+/* SPDX-License-Identifier: GPL-2.0-or-later */
76
+/*
77
+ * QEMU Loongson 7A1000 I/O interrupt controller.
78
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
79
+ */
80
+
81
+static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
82
+{
83
+{
83
+ LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
84
+ return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
84
+
85
+ if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
86
+ error_setg(errp, "Invalid 'pic_irq_num'");
87
+ return;
88
+ }
89
+}
85
+}
90
+
86
+
91
+static Property loongarch_pic_common_properties[] = {
87
+static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
92
+ DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
88
+{
93
+ DEFINE_PROP_END_OF_LIST(),
89
+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
94
+};
95
+
90
+
96
+static const VMStateDescription vmstate_loongarch_pic_common = {
91
+ cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
97
+ .name = "loongarch_pch_pic",
92
+}
98
+ .version_id = 1,
93
+
99
+ .minimum_version_id = 1,
94
+static bool loongarch_get_pmu(Object *obj, Error **errp)
100
+ .fields = (const VMStateField[]) {
95
+{
101
+ VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
96
+ return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF;
102
+ VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
97
+}
103
+ VMSTATE_UINT64(intedge, LoongArchPICCommonState),
98
+
104
+ VMSTATE_UINT64(intclr, LoongArchPICCommonState),
99
+static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
105
+ VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
100
+{
106
+ VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
101
+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
107
+ VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
102
+
108
+ VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
103
+ cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
109
+ VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
104
+}
110
+ VMSTATE_UINT64(intirr, LoongArchPICCommonState),
105
+
111
+ VMSTATE_UINT64(intisr, LoongArchPICCommonState),
106
void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
112
+ VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
107
{
113
+ VMSTATE_END_OF_LIST()
108
+ cpu->lbt = ON_OFF_AUTO_AUTO;
114
+ }
109
+ object_property_add_bool(OBJECT(cpu), "lbt", loongarch_get_lbt,
115
+};
110
+ loongarch_set_lbt);
111
+ object_property_set_description(OBJECT(cpu), "lbt",
112
+ "Set off to disable Binary Tranlation.");
113
+
114
+ cpu->pmu = ON_OFF_AUTO_AUTO;
115
+ object_property_add_bool(OBJECT(cpu), "pmu", loongarch_get_pmu,
116
+ loongarch_set_pmu);
117
+ object_property_set_description(OBJECT(cpu), "pmu",
118
+ "Set off to disable performance monitor unit.");
119
}
120
121
int kvm_arch_destroy_vcpu(CPUState *cs)
116
--
122
--
117
2.43.5
123
2.43.5
diff view generated by jsdifflib
1
For loongarch extioi emulation driver, add unrealize interface and
1
Property kvm-pv-ipi is added to paravirt ipi feature, it is specially
2
remove instance_finalize interface and move the code to unrealize
2
for kvm mode.
3
interface.
4
3
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
6
---
8
hw/intc/loongarch_extioi.c | 6 +++---
7
target/loongarch/cpu.h | 1 +
9
1 file changed, 3 insertions(+), 3 deletions(-)
8
target/loongarch/kvm/kvm.c | 18 ++++++++++++++++++
9
target/loongarch/loongarch-qmp-cmds.c | 2 +-
10
3 files changed, 20 insertions(+), 1 deletion(-)
10
11
11
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
12
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
12
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/intc/loongarch_extioi.c
14
--- a/target/loongarch/cpu.h
14
+++ b/hw/intc/loongarch_extioi.c
15
+++ b/target/loongarch/cpu.h
15
@@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
16
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
16
}
17
OnOffAuto pmu;
18
OnOffAuto lsx;
19
OnOffAuto lasx;
20
+ OnOffAuto kvm_pv_ipi;
21
22
/* 'compatible' string for this CPU for Linux device trees */
23
const char *dtb_compatible;
24
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
25
index XXXXXXX..XXXXXXX 100644
26
--- a/target/loongarch/kvm/kvm.c
27
+++ b/target/loongarch/kvm/kvm.c
28
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
29
cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
17
}
30
}
18
31
19
-static void loongarch_extioi_finalize(Object *obj)
32
+static bool kvm_pv_ipi_get(Object *obj, Error **errp)
20
+static void loongarch_extioi_unrealize(DeviceState *dev)
33
+{
34
+ return LOONGARCH_CPU(obj)->kvm_pv_ipi != ON_OFF_AUTO_OFF;
35
+}
36
+
37
+static void kvm_pv_ipi_set(Object *obj, bool value, Error **errp)
38
+{
39
+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
40
+
41
+ cpu->kvm_pv_ipi = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
42
+}
43
+
44
void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
21
{
45
{
22
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(obj);
46
cpu->lbt = ON_OFF_AUTO_AUTO;
23
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI(dev);
47
@@ -XXX,XX +XXX,XX @@ void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
24
48
loongarch_set_pmu);
25
g_free(s->cpu);
49
object_property_set_description(OBJECT(cpu), "pmu",
50
"Set off to disable performance monitor unit.");
51
+
52
+ cpu->kvm_pv_ipi = ON_OFF_AUTO_AUTO;
53
+ object_property_add_bool(OBJECT(cpu), "kvm-pv-ipi", kvm_pv_ipi_get,
54
+ kvm_pv_ipi_set);
55
+ object_property_set_description(OBJECT(cpu), "kvm-pv-ipi",
56
+ "Set off to disable KVM paravirt IPI.");
26
}
57
}
27
@@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
58
28
DeviceClass *dc = DEVICE_CLASS(klass);
59
int kvm_arch_destroy_vcpu(CPUState *cs)
29
60
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
30
dc->realize = loongarch_extioi_realize;
61
index XXXXXXX..XXXXXXX 100644
31
+ dc->unrealize = loongarch_extioi_unrealize;
62
--- a/target/loongarch/loongarch-qmp-cmds.c
32
device_class_set_legacy_reset(dc, loongarch_extioi_reset);
63
+++ b/target/loongarch/loongarch-qmp-cmds.c
33
device_class_set_props(dc, extioi_properties);
64
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
34
dc->vmsd = &vmstate_loongarch_extioi;
65
}
35
@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_extioi_info = {
66
36
.parent = TYPE_SYS_BUS_DEVICE,
67
static const char *cpu_model_advertised_features[] = {
37
.instance_size = sizeof(struct LoongArchExtIOI),
68
- "lsx", "lasx", "lbt", "pmu", NULL
38
.class_init = loongarch_extioi_class_init,
69
+ "lsx", "lasx", "lbt", "pmu", "kvm-pv-ipi", NULL
39
- .instance_finalize = loongarch_extioi_finalize,
40
};
70
};
41
71
42
static void loongarch_extioi_register_types(void)
72
CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
43
--
73
--
44
2.43.5
74
2.43.5
diff view generated by jsdifflib
1
With some structure such as vmstate and property, rename LoongArchExtIOI
1
Paravirt ipi feature is OnOffAuto type, feature detection is added
2
with LoongArchExtIOICommonState, these common structure will be moved
2
to check whether it is supported by KVM host.
3
to common file.
4
3
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
6
---
8
hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++---------------
7
target/loongarch/cpu.h | 2 ++
9
1 file changed, 25 insertions(+), 16 deletions(-)
8
target/loongarch/kvm/kvm.c | 36 +++++++++++++++++++++++++++++++++++-
9
2 files changed, 37 insertions(+), 1 deletion(-)
10
10
11
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
11
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
12
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/intc/loongarch_extioi.c
13
--- a/target/loongarch/cpu.h
14
+++ b/hw/intc/loongarch_extioi.c
14
+++ b/target/loongarch/cpu.h
15
@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
15
@@ -XXX,XX +XXX,XX @@ enum loongarch_features {
16
LOONGARCH_FEATURE_LASX,
17
LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
18
LOONGARCH_FEATURE_PMU,
19
+ LOONGARCH_FEATURE_PV_IPI,
20
};
21
22
typedef struct LoongArchBT {
23
@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
24
lbt_t lbt;
25
26
uint32_t cpucfg[21];
27
+ uint32_t pv_features;
28
29
/* LoongArch CSRs */
30
uint64_t CSR_CRMD;
31
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/target/loongarch/kvm/kvm.c
34
+++ b/target/loongarch/kvm/kvm.c
35
@@ -XXX,XX +XXX,XX @@
36
#include "qemu/osdep.h"
37
#include <sys/ioctl.h>
38
#include <linux/kvm.h>
39
-
40
+#include "asm-loongarch/kvm_para.h"
41
#include "qapi/error.h"
42
#include "qemu/timer.h"
43
#include "qemu/error-report.h"
44
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
45
ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
46
return (ret == 0);
47
48
+ case LOONGARCH_FEATURE_PV_IPI:
49
+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
50
+ attr.attr = KVM_LOONGARCH_VM_FEAT_PV_IPI;
51
+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
52
+ return (ret == 0);
53
+
54
default:
55
return false;
56
}
57
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_pmu(CPUState *cs, Error **errp)
16
return 0;
58
return 0;
17
}
59
}
18
60
19
+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
61
+static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp)
20
+{
62
+{
21
+ return vmstate_extioi_post_load(opaque, version_id);
63
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
64
+ CPULoongArchState *env = cpu_env(cs);
65
+ bool kvm_supported;
66
+
67
+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PV_IPI);
68
+ if (cpu->kvm_pv_ipi == ON_OFF_AUTO_ON) {
69
+ if (!kvm_supported) {
70
+ error_setg(errp, "'pv_ipi' feature not supported by KVM host");
71
+ return -ENOTSUP;
72
+ }
73
+ } else if (cpu->kvm_pv_ipi != ON_OFF_AUTO_AUTO) {
74
+ kvm_supported = false;
75
+ }
76
+
77
+ if (kvm_supported) {
78
+ env->pv_features |= BIT(KVM_FEATURE_IPI);
79
+ }
80
+
81
+ return 0;
22
+}
82
+}
23
+
83
+
24
static const VMStateDescription vmstate_extioi_core = {
84
int kvm_arch_init_vcpu(CPUState *cs)
25
.name = "extioi-core",
85
{
26
.version_id = 1,
86
uint64_t val;
27
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = {
87
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
28
};
88
error_report_err(local_err);
29
30
static const VMStateDescription vmstate_loongarch_extioi = {
31
- .name = TYPE_LOONGARCH_EXTIOI,
32
+ .name = "loongarch.extioi",
33
.version_id = 3,
34
.minimum_version_id = 3,
35
- .post_load = vmstate_extioi_post_load,
36
+ .post_load = loongarch_extioi_common_post_load,
37
.fields = (const VMStateField[]) {
38
- VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
39
- VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
40
+ VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
41
+ EXTIOI_IRQS_GROUP_COUNT),
42
+ VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
43
EXTIOI_IRQS_NODETYPE_COUNT / 2),
44
- VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
45
- VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
46
- VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
47
- VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
48
-
49
- VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
50
- vmstate_extioi_core, ExtIOICore),
51
- VMSTATE_UINT32(features, LoongArchExtIOI),
52
- VMSTATE_UINT32(status, LoongArchExtIOI),
53
+ VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
54
+ EXTIOI_IRQS / 32),
55
+ VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
56
+ EXTIOI_IRQS / 32),
57
+ VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
58
+ EXTIOI_IRQS_IPMAP_SIZE / 4),
59
+ VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
60
+ EXTIOI_IRQS / 4),
61
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
62
+ num_cpu, vmstate_extioi_core, ExtIOICore),
63
+ VMSTATE_UINT32(features, LoongArchExtIOICommonState),
64
+ VMSTATE_UINT32(status, LoongArchExtIOICommonState),
65
VMSTATE_END_OF_LIST()
66
}
89
}
67
};
90
68
91
+ ret = kvm_cpu_check_pv_features(cs, &local_err);
69
static Property extioi_properties[] = {
92
+ if (ret < 0) {
70
- DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
93
+ error_report_err(local_err);
71
- DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
94
+ }
72
- EXTIOI_HAS_VIRT_EXTENSION, 0),
95
+
73
+ DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
96
return ret;
74
+ DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
97
}
75
+ features, EXTIOI_HAS_VIRT_EXTENSION, 0),
76
DEFINE_PROP_END_OF_LIST(),
77
};
78
98
79
--
99
--
80
2.43.5
100
2.43.5
diff view generated by jsdifflib
1
Add vmstate pre_save and post_load interfaces, which can be used
1
The similiar with cpucfg register, paravirt ipi feature is set in
2
by pic kvm driver in future.
2
function kvm_arch_put_registers(). Instead the paravirt feature can
3
be enabled only once, it cannot be changed dynamically.
3
4
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Reviewed-by: Song Gao <gaosong@loongson.cn>
6
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
6
---
7
---
7
hw/intc/loongarch_pic_common.c | 26 ++++++++++++++++++++++++++
8
target/loongarch/kvm/kvm.c | 36 ++++++++++++++++++++++++++++++++++++
8
include/hw/intc/loongarch_pic_common.h | 2 ++
9
1 file changed, 36 insertions(+)
9
2 files changed, 28 insertions(+)
10
10
11
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
11
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
12
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/intc/loongarch_pic_common.c
13
--- a/target/loongarch/kvm/kvm.c
14
+++ b/hw/intc/loongarch_pic_common.c
14
+++ b/target/loongarch/kvm/kvm.c
15
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@ static int kvm_set_stealtime(CPUState *cs)
16
#include "hw/qdev-properties.h"
16
return 0;
17
#include "migration/vmstate.h"
17
}
18
18
19
+static int loongarch_pic_pre_save(void *opaque)
19
+static int kvm_set_pv_features(CPUState *cs)
20
+{
20
+{
21
+ LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
21
+ CPULoongArchState *env = cpu_env(cs);
22
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
22
+ int err;
23
+ uint64_t val;
24
+ struct kvm_device_attr attr = {
25
+ .group = KVM_LOONGARCH_VCPU_CPUCFG,
26
+ .attr = CPUCFG_KVM_FEATURE,
27
+ .addr = (uint64_t)&val,
28
+ };
23
+
29
+
24
+ if (lpcc->pre_save) {
30
+ err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
25
+ return lpcc->pre_save(s);
31
+ if (err) {
32
+ return 0;
33
+ }
34
+
35
+ val = env->pv_features;
36
+ err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr);
37
+ if (err) {
38
+ error_report("Fail to set pv feature "TARGET_FMT_lx " with error %s",
39
+ val, strerror(errno));
40
+ return err;
26
+ }
41
+ }
27
+
42
+
28
+ return 0;
43
+ return 0;
29
+}
44
+}
30
+
45
+
31
+static int loongarch_pic_post_load(void *opaque, int version_id)
46
static int kvm_loongarch_get_regs_core(CPUState *cs)
32
+{
47
{
33
+ LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
48
int ret = 0;
34
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
49
@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
35
+
50
int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
36
+ if (lpcc->post_load) {
51
{
37
+ return lpcc->post_load(s, version_id);
52
int ret;
53
+ static int once;
54
55
ret = kvm_loongarch_put_regs_core(cs);
56
if (ret) {
57
@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
58
return ret;
59
}
60
61
+ if (!once) {
62
+ ret = kvm_set_pv_features(cs);
63
+ if (ret) {
64
+ return ret;
65
+ }
66
+ once = 1;
38
+ }
67
+ }
39
+
68
+
40
+ return 0;
69
if (level >= KVM_PUT_FULL_STATE) {
41
+}
70
/*
42
+
71
* only KVM_PUT_FULL_STATE is required, kvm kernel will clear
43
static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
44
{
45
LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
46
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
47
.name = "loongarch_pch_pic",
48
.version_id = 1,
49
.minimum_version_id = 1,
50
+ .pre_save = loongarch_pic_pre_save,
51
+ .post_load = loongarch_pic_post_load,
52
.fields = (const VMStateField[]) {
53
VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
54
VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
55
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
56
index XXXXXXX..XXXXXXX 100644
57
--- a/include/hw/intc/loongarch_pic_common.h
58
+++ b/include/hw/intc/loongarch_pic_common.h
59
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass {
60
SysBusDeviceClass parent_class;
61
62
DeviceRealize parent_realize;
63
+ int (*pre_save)(LoongArchPICCommonState *s);
64
+ int (*post_load)(LoongArchPICCommonState *s, int version_id);
65
};
66
#endif /* HW_LOONGARCH_PIC_COMMON_H */
67
--
72
--
68
2.43.5
73
2.43.5
diff view generated by jsdifflib
1
With pic vmstate, rename structure name vmstate_loongarch_pch_pic with
1
Property kvm-steal-time is added for kvm steal time feature, it is
2
vmstate_loongarch_pic_common, and with pic property rename
2
specially for kvm mode.
3
loongarch_pch_pic_properties with loongarch_pic_common_properties.
4
3
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
6
---
8
hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++--------------
7
target/loongarch/cpu.h | 1 +
9
1 file changed, 32 insertions(+), 20 deletions(-)
8
target/loongarch/kvm/kvm.c | 18 ++++++++++++++++++
9
target/loongarch/loongarch-qmp-cmds.c | 2 +-
10
3 files changed, 20 insertions(+), 1 deletion(-)
10
11
11
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
12
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
12
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/intc/loongarch_pch_pic.c
14
--- a/target/loongarch/cpu.h
14
+++ b/hw/intc/loongarch_pch_pic.c
15
+++ b/target/loongarch/cpu.h
15
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
16
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
16
s->int_polarity = 0x0;
17
OnOffAuto lsx;
18
OnOffAuto lasx;
19
OnOffAuto kvm_pv_ipi;
20
+ OnOffAuto kvm_steal_time;
21
22
/* 'compatible' string for this CPU for Linux device trees */
23
const char *dtb_compatible;
24
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
25
index XXXXXXX..XXXXXXX 100644
26
--- a/target/loongarch/kvm/kvm.c
27
+++ b/target/loongarch/kvm/kvm.c
28
@@ -XXX,XX +XXX,XX @@ static void kvm_pv_ipi_set(Object *obj, bool value, Error **errp)
29
cpu->kvm_pv_ipi = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
17
}
30
}
18
31
19
+static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
32
+static bool kvm_steal_time_get(Object *obj, Error **errp)
20
+{
33
+{
21
+ LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
34
+ return LOONGARCH_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
22
+
23
+ if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
24
+ error_setg(errp, "Invalid 'pic_irq_num'");
25
+ return;
26
+ }
27
+}
35
+}
28
+
36
+
29
static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
37
+static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
38
+{
39
+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
40
+
41
+ cpu->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
42
+}
43
+
44
void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
30
{
45
{
31
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
46
cpu->lbt = ON_OFF_AUTO_AUTO;
32
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
47
@@ -XXX,XX +XXX,XX @@ void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu)
33
+ Error *local_err = NULL;
48
kvm_pv_ipi_set);
34
49
object_property_set_description(OBJECT(cpu), "kvm-pv-ipi",
35
- if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
50
"Set off to disable KVM paravirt IPI.");
36
- error_setg(errp, "Invalid 'pic_irq_num'");
51
+
37
+ loongarch_pic_common_realize(dev, &local_err);
52
+ cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
38
+ if (local_err) {
53
+ object_property_add_bool(OBJECT(cpu), "kvm-steal-time", kvm_steal_time_get,
39
+ error_propagate(errp, local_err);
54
+ kvm_steal_time_set);
40
return;
55
+ object_property_set_description(OBJECT(cpu), "kvm-steal-time",
41
}
56
+ "Set off to disable KVM steal time.");
42
43
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
44
45
}
57
}
46
58
47
-static Property loongarch_pch_pic_properties[] = {
59
int kvm_arch_destroy_vcpu(CPUState *cs)
48
- DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0),
60
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
49
+static Property loongarch_pic_common_properties[] = {
61
index XXXXXXX..XXXXXXX 100644
50
+ DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
62
--- a/target/loongarch/loongarch-qmp-cmds.c
51
DEFINE_PROP_END_OF_LIST(),
63
+++ b/target/loongarch/loongarch-qmp-cmds.c
64
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
65
}
66
67
static const char *cpu_model_advertised_features[] = {
68
- "lsx", "lasx", "lbt", "pmu", "kvm-pv-ipi", NULL
69
+ "lsx", "lasx", "lbt", "pmu", "kvm-pv-ipi", "kvm-steal-time", NULL
52
};
70
};
53
71
54
-static const VMStateDescription vmstate_loongarch_pch_pic = {
72
CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
55
- .name = TYPE_LOONGARCH_PCH_PIC,
56
+static const VMStateDescription vmstate_loongarch_pic_common = {
57
+ .name = "loongarch_pch_pic",
58
.version_id = 1,
59
.minimum_version_id = 1,
60
.fields = (const VMStateField[]) {
61
- VMSTATE_UINT64(int_mask, LoongArchPCHPIC),
62
- VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC),
63
- VMSTATE_UINT64(intedge, LoongArchPCHPIC),
64
- VMSTATE_UINT64(intclr, LoongArchPCHPIC),
65
- VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC),
66
- VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC),
67
- VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64),
68
- VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64),
69
- VMSTATE_UINT64(last_intirr, LoongArchPCHPIC),
70
- VMSTATE_UINT64(intirr, LoongArchPCHPIC),
71
- VMSTATE_UINT64(intisr, LoongArchPCHPIC),
72
- VMSTATE_UINT64(int_polarity, LoongArchPCHPIC),
73
+ VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
74
+ VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
75
+ VMSTATE_UINT64(intedge, LoongArchPICCommonState),
76
+ VMSTATE_UINT64(intclr, LoongArchPICCommonState),
77
+ VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
78
+ VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
79
+ VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
80
+ VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
81
+ VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
82
+ VMSTATE_UINT64(intirr, LoongArchPICCommonState),
83
+ VMSTATE_UINT64(intisr, LoongArchPICCommonState),
84
+ VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
85
VMSTATE_END_OF_LIST()
86
}
87
};
88
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
89
90
dc->realize = loongarch_pch_pic_realize;
91
device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
92
- dc->vmsd = &vmstate_loongarch_pch_pic;
93
- device_class_set_props(dc, loongarch_pch_pic_properties);
94
+ dc->vmsd = &vmstate_loongarch_pic_common;
95
+ device_class_set_props(dc, loongarch_pic_common_properties);
96
}
97
98
static const TypeInfo loongarch_pch_pic_info = {
99
--
73
--
100
2.43.5
74
2.43.5
diff view generated by jsdifflib
1
Add new common file loongarch_extioi_common.c, and move vmstate
1
Paravirt steal time feature is OnOffAuto type, feature detection is added
2
and property structure to common file.
2
to check whether it is supported on KVM host.
3
3
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
5
Reviewed-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
6
---
6
---
7
hw/intc/loongarch_extioi.c | 59 +----------------------------
7
target/loongarch/cpu.h | 1 +
8
hw/intc/loongarch_extioi_common.c | 63 +++++++++++++++++++++++++++++++
8
target/loongarch/kvm/kvm.c | 20 ++++++++++++++++++++
9
2 files changed, 65 insertions(+), 57 deletions(-)
9
2 files changed, 21 insertions(+)
10
create mode 100644 hw/intc/loongarch_extioi_common.c
11
10
12
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
11
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
13
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
14
--- a/hw/intc/loongarch_extioi.c
13
--- a/target/loongarch/cpu.h
15
+++ b/hw/intc/loongarch_extioi.c
14
+++ b/target/loongarch/cpu.h
16
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps extioi_virt_ops = {
15
@@ -XXX,XX +XXX,XX @@ enum loongarch_features {
17
.endianness = DEVICE_LITTLE_ENDIAN,
16
LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
17
LOONGARCH_FEATURE_PMU,
18
LOONGARCH_FEATURE_PV_IPI,
19
+ LOONGARCH_FEATURE_STEALTIME,
18
};
20
};
19
21
20
-static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
22
typedef struct LoongArchBT {
21
-{
23
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
22
- LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
24
index XXXXXXX..XXXXXXX 100644
23
-
25
--- a/target/loongarch/kvm/kvm.c
24
- if (s->num_cpu == 0) {
26
+++ b/target/loongarch/kvm/kvm.c
25
- error_setg(errp, "num-cpu must be at least 1");
27
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
26
- return;
28
ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
27
- }
29
return (ret == 0);
28
-}
30
29
+static int vmstate_extioi_post_load(void *opaque, int version_id);
31
+ case LOONGARCH_FEATURE_STEALTIME:
30
+#include "loongarch_extioi_common.c"
32
+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
31
33
+ attr.attr = KVM_LOONGARCH_VM_FEAT_PV_STEALTIME;
32
static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
34
+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
33
{
35
+ return (ret == 0);
34
@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
36
+
37
default:
38
return false;
39
}
40
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp)
41
env->pv_features |= BIT(KVM_FEATURE_IPI);
42
}
43
44
+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_STEALTIME);
45
+ if (cpu->kvm_steal_time == ON_OFF_AUTO_ON) {
46
+ if (!kvm_supported) {
47
+ error_setg(errp, "'kvm stealtime' feature not supported by KVM host");
48
+ return -ENOTSUP;
49
+ }
50
+ } else if (cpu->kvm_steal_time != ON_OFF_AUTO_AUTO) {
51
+ kvm_supported = false;
52
+ }
53
+
54
+ if (kvm_supported) {
55
+ env->pv_features |= BIT(KVM_FEATURE_STEAL_TIME);
56
+ }
57
+
35
return 0;
58
return 0;
36
}
59
}
37
60
38
-static int loongarch_extioi_common_post_load(void *opaque, int version_id)
39
-{
40
- return vmstate_extioi_post_load(opaque, version_id);
41
-}
42
-
43
-static const VMStateDescription vmstate_extioi_core = {
44
- .name = "extioi-core",
45
- .version_id = 1,
46
- .minimum_version_id = 1,
47
- .fields = (const VMStateField[]) {
48
- VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT),
49
- VMSTATE_END_OF_LIST()
50
- }
51
-};
52
-
53
-static const VMStateDescription vmstate_loongarch_extioi = {
54
- .name = "loongarch.extioi",
55
- .version_id = 3,
56
- .minimum_version_id = 3,
57
- .post_load = loongarch_extioi_common_post_load,
58
- .fields = (const VMStateField[]) {
59
- VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
60
- EXTIOI_IRQS_GROUP_COUNT),
61
- VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
62
- EXTIOI_IRQS_NODETYPE_COUNT / 2),
63
- VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
64
- EXTIOI_IRQS / 32),
65
- VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
66
- EXTIOI_IRQS / 32),
67
- VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
68
- EXTIOI_IRQS_IPMAP_SIZE / 4),
69
- VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
70
- EXTIOI_IRQS / 4),
71
- VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
72
- num_cpu, vmstate_extioi_core, ExtIOICore),
73
- VMSTATE_UINT32(features, LoongArchExtIOICommonState),
74
- VMSTATE_UINT32(status, LoongArchExtIOICommonState),
75
- VMSTATE_END_OF_LIST()
76
- }
77
-};
78
-
79
-static Property extioi_properties[] = {
80
- DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
81
- DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
82
- features, EXTIOI_HAS_VIRT_EXTENSION, 0),
83
- DEFINE_PROP_END_OF_LIST(),
84
-};
85
-
86
static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
87
{
88
DeviceClass *dc = DEVICE_CLASS(klass);
89
diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c
90
new file mode 100644
91
index XXXXXXX..XXXXXXX
92
--- /dev/null
93
+++ b/hw/intc/loongarch_extioi_common.c
94
@@ -XXX,XX +XXX,XX @@
95
+/* SPDX-License-Identifier: GPL-2.0-or-later */
96
+/*
97
+ * Loongson extioi interrupt controller emulation
98
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
99
+ */
100
+
101
+static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
102
+{
103
+ LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
104
+
105
+ if (s->num_cpu == 0) {
106
+ error_setg(errp, "num-cpu must be at least 1");
107
+ return;
108
+ }
109
+}
110
+
111
+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
112
+{
113
+ return vmstate_extioi_post_load(opaque, version_id);
114
+}
115
+
116
+static const VMStateDescription vmstate_extioi_core = {
117
+ .name = "extioi-core",
118
+ .version_id = 1,
119
+ .minimum_version_id = 1,
120
+ .fields = (const VMStateField[]) {
121
+ VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT),
122
+ VMSTATE_END_OF_LIST()
123
+ }
124
+};
125
+
126
+static const VMStateDescription vmstate_loongarch_extioi = {
127
+ .name = "loongarch.extioi",
128
+ .version_id = 3,
129
+ .minimum_version_id = 3,
130
+ .post_load = loongarch_extioi_common_post_load,
131
+ .fields = (const VMStateField[]) {
132
+ VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
133
+ EXTIOI_IRQS_GROUP_COUNT),
134
+ VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
135
+ EXTIOI_IRQS_NODETYPE_COUNT / 2),
136
+ VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
137
+ EXTIOI_IRQS / 32),
138
+ VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
139
+ EXTIOI_IRQS / 32),
140
+ VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
141
+ EXTIOI_IRQS_IPMAP_SIZE / 4),
142
+ VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
143
+ EXTIOI_IRQS / 4),
144
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
145
+ num_cpu, vmstate_extioi_core, ExtIOICore),
146
+ VMSTATE_UINT32(features, LoongArchExtIOICommonState),
147
+ VMSTATE_UINT32(status, LoongArchExtIOICommonState),
148
+ VMSTATE_END_OF_LIST()
149
+ }
150
+};
151
+
152
+static Property extioi_properties[] = {
153
+ DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
154
+ DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
155
+ features, EXTIOI_HAS_VIRT_EXTENSION, 0),
156
+ DEFINE_PROP_END_OF_LIST(),
157
+};
158
--
61
--
159
2.43.5
62
2.43.5
diff view generated by jsdifflib
1
Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and
1
Feature virtual extioi is loongArch virt machine property rather than
2
replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON
2
vCPU property in qemu side. However it is vCPU property in KVM kernel
3
separately. Also remove unnecessary header files.
3
side, here add loongArch virt machine property checking and enable virt
4
extioi feature when vCPU is created.
4
5
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
8
---
8
hw/intc/loongarch_pch_pic.c | 24 ++++++++++--------------
9
hw/loongarch/virt.c | 8 --------
9
hw/loongarch/virt.c | 2 +-
10
include/hw/loongarch/virt.h | 9 +++++++++
10
include/hw/intc/loongarch_pch_pic.h | 4 ----
11
target/loongarch/kvm/kvm.c | 10 ++++++++++
11
3 files changed, 11 insertions(+), 19 deletions(-)
12
3 files changed, 19 insertions(+), 8 deletions(-)
12
13
13
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
14
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/intc/loongarch_pch_pic.c
16
+++ b/hw/intc/loongarch_pch_pic.c
17
@@ -XXX,XX +XXX,XX @@
18
19
#include "qemu/osdep.h"
20
#include "qemu/bitops.h"
21
-#include "hw/sysbus.h"
22
-#include "hw/loongarch/virt.h"
23
-#include "hw/pci-host/ls7a.h"
24
#include "hw/irq.h"
25
#include "hw/intc/loongarch_pch_pic.h"
26
-#include "hw/qdev-properties.h"
27
-#include "migration/vmstate.h"
28
#include "trace.h"
29
#include "qapi/error.h"
30
31
-static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
32
+static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
33
+ int level)
34
{
35
uint64_t val;
36
int irq;
37
@@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
38
39
static void pch_pic_irq_handler(void *opaque, int irq, int level)
40
{
41
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
42
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
43
uint64_t mask = 1ULL << irq;
44
45
assert(irq < s->irq_num);
46
@@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
47
static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
48
unsigned size)
49
{
50
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
51
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
52
uint64_t val = 0;
53
uint32_t offset = addr & 0xfff;
54
55
@@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)
56
static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
57
uint64_t value, unsigned size)
58
{
59
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
60
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
61
uint32_t offset, old_valid, data = (uint32_t)value;
62
uint64_t old, int_mask;
63
offset = addr & 0xfff;
64
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
65
static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
66
unsigned size)
67
{
68
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
69
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
70
uint64_t val = 0;
71
uint32_t offset = addr & 0xfff;
72
73
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
74
static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
75
uint64_t value, unsigned size)
76
{
77
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
78
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
79
uint32_t offset, data = (uint32_t)value;
80
offset = addr & 0xfff;
81
82
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
83
static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
84
unsigned size)
85
{
86
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
87
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
88
uint64_t val = 0;
89
uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
90
int64_t offset_tmp;
91
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
92
static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
93
uint64_t data, unsigned size)
94
{
95
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
96
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
97
int32_t offset_tmp;
98
uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
99
100
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {
101
102
static void loongarch_pch_pic_reset(DeviceState *d)
103
{
104
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
105
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
106
int i;
107
108
s->int_mask = -1;
109
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
14
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
110
index XXXXXXX..XXXXXXX 100644
15
index XXXXXXX..XXXXXXX 100644
111
--- a/hw/loongarch/virt.c
16
--- a/hw/loongarch/virt.c
112
+++ b/hw/loongarch/virt.c
17
+++ b/hw/loongarch/virt.c
113
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
18
@@ -XXX,XX +XXX,XX @@
114
/* Add Extend I/O Interrupt Controller node */
19
#include "hw/virtio/virtio-iommu.h"
115
fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
20
#include "qemu/error-report.h"
116
21
117
- pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
22
-static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
118
+ pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
23
-{
119
num = VIRT_PCH_PIC_IRQ_NUM;
24
- if (lvms->veiointc == ON_OFF_AUTO_OFF) {
120
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
25
- return false;
121
d = SYS_BUS_DEVICE(pch_pic);
26
- }
122
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
27
- return true;
28
-}
29
-
30
static void virt_get_veiointc(Object *obj, Visitor *v, const char *name,
31
void *opaque, Error **errp)
32
{
33
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
123
index XXXXXXX..XXXXXXX 100644
34
index XXXXXXX..XXXXXXX 100644
124
--- a/include/hw/intc/loongarch_pch_pic.h
35
--- a/include/hw/loongarch/virt.h
125
+++ b/include/hw/intc/loongarch_pch_pic.h
36
+++ b/include/hw/loongarch/virt.h
126
@@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass {
37
@@ -XXX,XX +XXX,XX @@ struct LoongArchVirtMachineState {
127
DeviceRealize parent_realize;
38
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchVirtMachineState, LOONGARCH_VIRT_MACHINE)
128
};
39
void virt_acpi_setup(LoongArchVirtMachineState *lvms);
129
40
void virt_fdt_setup(LoongArchVirtMachineState *lvms);
130
-#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
41
+
131
-typedef struct LoongArchPICCommonState LoongArchPCHPIC;
42
+static inline bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
132
-#define LOONGARCH_PCH_PIC(obj) ((struct LoongArchPICCommonState *)(obj))
43
+{
133
-
44
+ if (lvms->veiointc == ON_OFF_AUTO_OFF) {
134
#endif /* HW_LOONGARCH_PCH_PIC_H */
45
+ return false;
46
+ }
47
+ return true;
48
+}
49
+
50
#endif
51
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
52
index XXXXXXX..XXXXXXX 100644
53
--- a/target/loongarch/kvm/kvm.c
54
+++ b/target/loongarch/kvm/kvm.c
55
@@ -XXX,XX +XXX,XX @@
56
#include "exec/address-spaces.h"
57
#include "hw/boards.h"
58
#include "hw/irq.h"
59
+#include "hw/loongarch/virt.h"
60
#include "qemu/log.h"
61
#include "hw/loader.h"
62
#include "system/runstate.h"
63
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_pmu(CPUState *cs, Error **errp)
64
65
static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp)
66
{
67
+ MachineState *ms = MACHINE(qdev_get_machine());
68
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
69
CPULoongArchState *env = cpu_env(cs);
70
bool kvm_supported;
71
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp)
72
env->pv_features |= BIT(KVM_FEATURE_STEAL_TIME);
73
}
74
75
+ if (object_dynamic_cast(OBJECT(ms), TYPE_LOONGARCH_VIRT_MACHINE)) {
76
+ LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms);
77
+
78
+ if (virt_is_veiointc_enabled(lvms)) {
79
+ env->pv_features |= BIT(KVM_FEATURE_VIRT_EXTIOI);
80
+ }
81
+ }
82
+
83
return 0;
84
}
85
135
--
86
--
136
2.43.5
87
2.43.5
diff view generated by jsdifflib
Deleted patch
1
Add common header file include/hw/intc/loongarch_extioi_common.h, and
2
move some macro definition from include/hw/intc/loongarch_extioi.h to
3
the common header file.
4
1
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
---
8
include/hw/intc/loongarch_extioi.h | 50 +------------------
9
include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++
10
2 files changed, 59 insertions(+), 49 deletions(-)
11
create mode 100644 include/hw/intc/loongarch_extioi_common.h
12
13
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/intc/loongarch_extioi.h
16
+++ b/include/hw/intc/loongarch_extioi.h
17
@@ -XXX,XX +XXX,XX @@
18
* Copyright (C) 2021 Loongson Technology Corporation Limited
19
*/
20
21
-#include "hw/sysbus.h"
22
-#include "hw/loongarch/virt.h"
23
-
24
#ifndef LOONGARCH_EXTIOI_H
25
#define LOONGARCH_EXTIOI_H
26
27
-#define LS3A_INTC_IP 8
28
-#define EXTIOI_IRQS (256)
29
-#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
30
-/* irq from EXTIOI is routed to no more than 4 cpus */
31
-#define EXTIOI_CPUS (4)
32
-/* map to ipnum per 32 irqs */
33
-#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
34
-#define EXTIOI_IRQS_COREMAP_SIZE 256
35
-#define EXTIOI_IRQS_NODETYPE_COUNT 16
36
-#define EXTIOI_IRQS_GROUP_COUNT 8
37
-
38
-#define APIC_OFFSET 0x400
39
-#define APIC_BASE (0x1000ULL + APIC_OFFSET)
40
-
41
-#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET)
42
-#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET)
43
-#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET)
44
-#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET)
45
-#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET)
46
-#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET)
47
-#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET)
48
-#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET)
49
-#define EXTIOI_ISR_START (0x700 - APIC_OFFSET)
50
-#define EXTIOI_ISR_END (0x720 - APIC_OFFSET)
51
-#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET)
52
-#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
53
-#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
54
-#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
55
-#define EXTIOI_SIZE 0x800
56
-
57
-#define EXTIOI_VIRT_BASE (0x40000000)
58
-#define EXTIOI_VIRT_SIZE (0x1000)
59
-#define EXTIOI_VIRT_FEATURES (0x0)
60
-#define EXTIOI_HAS_VIRT_EXTENSION (0)
61
-#define EXTIOI_HAS_ENABLE_OPTION (1)
62
-#define EXTIOI_HAS_INT_ENCODE (2)
63
-#define EXTIOI_HAS_CPU_ENCODE (3)
64
-#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \
65
- | BIT(EXTIOI_HAS_ENABLE_OPTION) \
66
- | BIT(EXTIOI_HAS_CPU_ENCODE))
67
-#define EXTIOI_VIRT_CONFIG (0x4)
68
-#define EXTIOI_ENABLE (1)
69
-#define EXTIOI_ENABLE_INT_ENCODE (2)
70
-#define EXTIOI_ENABLE_CPU_ENCODE (3)
71
-#define EXTIOI_VIRT_COREMAP_START (0x40)
72
-#define EXTIOI_VIRT_COREMAP_END (0x240)
73
+#include "hw/intc/loongarch_extioi_common.h"
74
75
typedef struct ExtIOICore {
76
uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
77
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
78
new file mode 100644
79
index XXXXXXX..XXXXXXX
80
--- /dev/null
81
+++ b/include/hw/intc/loongarch_extioi_common.h
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@@ -XXX,XX +XXX,XX @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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+/*
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+ * LoongArch 3A5000 ext interrupt controller definitions
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+ * Copyright (C) 2024 Loongson Technology Corporation Limited
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+ */
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+
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+#ifndef LOONGARCH_EXTIOI_COMMON_H
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+#define LOONGARCH_EXTIOI_COMMON_H
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+
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+#include "hw/sysbus.h"
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+#include "hw/loongarch/virt.h"
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+
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+#define LS3A_INTC_IP 8
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+#define EXTIOI_IRQS (256)
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+#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
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+/* irq from EXTIOI is routed to no more than 4 cpus */
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+#define EXTIOI_CPUS (4)
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+/* map to ipnum per 32 irqs */
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+#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
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+#define EXTIOI_IRQS_COREMAP_SIZE 256
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+#define EXTIOI_IRQS_NODETYPE_COUNT 16
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+#define EXTIOI_IRQS_GROUP_COUNT 8
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+
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+#define APIC_OFFSET 0x400
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+#define APIC_BASE (0x1000ULL + APIC_OFFSET)
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+#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET)
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+#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET)
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+#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET)
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+#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET)
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+#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET)
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+#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET)
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+#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET)
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+#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET)
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+#define EXTIOI_ISR_START (0x700 - APIC_OFFSET)
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+#define EXTIOI_ISR_END (0x720 - APIC_OFFSET)
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+#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET)
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+#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
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+#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
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+#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
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+#define EXTIOI_SIZE 0x800
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+
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+#define EXTIOI_VIRT_BASE (0x40000000)
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+#define EXTIOI_VIRT_SIZE (0x1000)
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+#define EXTIOI_VIRT_FEATURES (0x0)
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+#define EXTIOI_HAS_VIRT_EXTENSION (0)
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+#define EXTIOI_HAS_ENABLE_OPTION (1)
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+#define EXTIOI_HAS_INT_ENCODE (2)
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+#define EXTIOI_HAS_CPU_ENCODE (3)
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+#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \
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+ | BIT(EXTIOI_HAS_ENABLE_OPTION) \
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+ | BIT(EXTIOI_HAS_CPU_ENCODE))
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+#define EXTIOI_VIRT_CONFIG (0x4)
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+#define EXTIOI_ENABLE (1)
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+#define EXTIOI_ENABLE_INT_ENCODE (2)
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+#define EXTIOI_ENABLE_CPU_ENCODE (3)
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+#define EXTIOI_VIRT_COREMAP_START (0x40)
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+#define EXTIOI_VIRT_COREMAP_END (0x240)
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+#endif /* LOONGARCH_EXTIOI_H */
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--
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2.43.5
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