Series comparison

-[PULL 00/18] loongarch-to-apply queue
+[PULL v2 00/17] loongarch-to-apply queue
-The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
+The following changes since commit fd87be1dada5672f877e03c2ca8504458292c479:
-  Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
+  Merge tag 'accel-20240426' of https://github.com/philmd/qemu into staging (2024-04-26 15:28:13 -0700)
 are available in the Git repository at:
-  https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213
+  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240429
-for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b:
+for you to fetch changes up to 841ef2c9df5317e32de590424b0c5c36fbb4de78:
-  hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800)
+  hw/loongarch: Add cells missing from rtc node (2024-04-29 10:25:56 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20241213
+Add boot LoongArch elf kernel with FDT
 v2: Fix 'make check-tcg' failed.
 ----------------------------------------------------------------
-Bibo Mao (8):
+Song Gao (17):
-      include: Add loongarch_pic_common header file
+      hw/loongarch: Move boot functions to boot.c
-      include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
+      hw/loongarch: Add load initrd
-      hw/intc/loongarch_pch: Merge instance_init() into realize()
+      hw/loongarch: Add slave cpu boot_code
-      hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
+      hw/loongarch: Add init_cmdline
-      hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
+      hw/loongarch: Init efi_system_table
-      hw/intc/loongarch_pch: Inherit from loongarch_pic_common
+      hw/loongarch: Init efi_boot_memmap table
-      hw/intc/loongarch_pch: Add pre_save and post_load interfaces
+      hw/loongarch: Init efi_initrd table
-      hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic
+      hw/loongarch: Init efi_fdt table
       hw/loongarch: Fix fdt memory node wrong 'reg'
       hw/loongarch: fdt adds cpu interrupt controller node
       hw/loongarch: fdt adds Extend I/O Interrupt Controller
       hw/loongarch: fdt adds pch_pic Controller
       hw/loongarch: fdt adds pch_msi Controller
       hw/loongarch: fdt adds pcie irq_map node
       hw/loongarch: fdt remove unused irqchip node
       hw/loongarch: Add cells missing from uart node
       hw/loongarch: Add cells missing from rtc node
- hw/intc/loongarch_pch_pic.c            | 106 +++++++++++----------------------
+ hw/loongarch/boot.c                | 336 ++++++++++++++++++++++++++++++++++
- hw/intc/loongarch_pic_common.c         |  97 ++++++++++++++++++++++++++++++
+ hw/loongarch/meson.build           |   1 +
- hw/intc/meson.build                    |   2 +-
+ hw/loongarch/virt.c                | 365 +++++++++++++++++++++----------------
- hw/loongarch/virt.c                    |   2 +-
+ include/hw/intc/loongarch_extioi.h |   1 +
- include/hw/intc/loongarch_pch_pic.h    |  70 +++++-----------------
+ include/hw/loongarch/boot.h        | 109 +++++++++++
- include/hw/intc/loongarch_pic_common.h |  82 +++++++++++++++++++++++++
+ include/hw/loongarch/virt.h        |  16 ++
-files changed, 230 insertions(+), 129 deletions(-)
+ include/hw/pci-host/ls7a.h         |   2 +
- create mode 100644 hw/intc/loongarch_pic_common.c
+ target/loongarch/cpu.h             |   2 +
- create mode 100644 include/hw/intc/loongarch_pic_common.h
+files changed, 670 insertions(+), 162 deletions(-)
  create mode 100644 hw/loongarch/boot.c
  create mode 100644 include/hw/loongarch/boot.h

-[PULL 01/18] include: Add loongarch_pic_common header file
+[PULL v2 01/17] hw/loongarch: Move boot functions to boot.c
-Add common header file hw/intc/loongarch_pic_common.h, and move
+Move some boot functions to boot.c and struct
-some macro definition from hw/intc/loongarch_pch_pic.h to the common
+loongarch_boot_info into struct LoongArchMachineState.
 header file.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 Message-Id: <20240426091551.2397867-2-gaosong@loongson.cn>
 ---
- include/hw/intc/loongarch_pch_pic.h    | 36 +++-------------------
+ hw/loongarch/boot.c         | 128 ++++++++++++++++++++++++++++++++++++
- include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++
+ hw/loongarch/meson.build    |   1 +
-files changed, 47 insertions(+), 31 deletions(-)
+ hw/loongarch/virt.c         | 121 +++-------------------------------
- create mode 100644 include/hw/intc/loongarch_pic_common.h
+ include/hw/loongarch/boot.h |  21 ++++++
  include/hw/loongarch/virt.h |   2 +
 files changed, 160 insertions(+), 113 deletions(-)
  create mode 100644 hw/loongarch/boot.c
  create mode 100644 include/hw/loongarch/boot.h
-diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_pch_pic.h
 +++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
   * Copyright (c) 2021 Loongson Technology Corporation Limited
   */
 -#include "hw/sysbus.h"
 +#ifndef HW_LOONGARCH_PCH_PIC_H
 +#define HW_LOONGARCH_PCH_PIC_H
 +
 +#include "hw/intc/loongarch_pic_common.h"
  #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
  #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
  OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 -#define PCH_PIC_INT_ID_VAL              0x7000000UL
 -#define PCH_PIC_INT_ID_VER              0x1UL
 -
 -#define PCH_PIC_INT_ID_LO               0x00
 -#define PCH_PIC_INT_ID_HI               0x04
 -#define PCH_PIC_INT_MASK_LO             0x20
 -#define PCH_PIC_INT_MASK_HI             0x24
 -#define PCH_PIC_HTMSI_EN_LO             0x40
 -#define PCH_PIC_HTMSI_EN_HI             0x44
 -#define PCH_PIC_INT_EDGE_LO             0x60
 -#define PCH_PIC_INT_EDGE_HI             0x64
 -#define PCH_PIC_INT_CLEAR_LO            0x80
 -#define PCH_PIC_INT_CLEAR_HI            0x84
 -#define PCH_PIC_AUTO_CTRL0_LO           0xc0
 -#define PCH_PIC_AUTO_CTRL0_HI           0xc4
 -#define PCH_PIC_AUTO_CTRL1_LO           0xe0
 -#define PCH_PIC_AUTO_CTRL1_HI           0xe4
 -#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
 -#define PCH_PIC_ROUTE_ENTRY_END         0x13f
 -#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
 -#define PCH_PIC_HTMSI_VEC_END           0x23f
 -#define PCH_PIC_INT_STATUS_LO           0x3a0
 -#define PCH_PIC_INT_STATUS_HI           0x3a4
 -#define PCH_PIC_INT_POL_LO              0x3e0
 -#define PCH_PIC_INT_POL_HI              0x3e4
 -
 -#define STATUS_LO_START                 0
 -#define STATUS_HI_START                 0x4
 -#define POL_LO_START                    0x40
 -#define POL_HI_START                    0x44
  struct LoongArchPCHPIC {
      SysBusDevice parent_obj;
      qemu_irq parent_irq[64];
@@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC {
      MemoryRegion iomem8;
      unsigned int irq_num;
  };
 +#endif /* HW_LOONGARCH_PCH_PIC_H */
 diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
 new file mode 100644
 index XXXXXXX..XXXXXXX
 --- /dev/null
-+++ b/include/hw/intc/loongarch_pic_common.h
++++ b/hw/loongarch/boot.c
 @@ -XXX,XX +XXX,XX @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +/*
-+ * LoongArch 7A1000 I/O interrupt controller definitions
++ * LoongArch boot helper functions.
-+ * Copyright (c) 2024 Loongson Technology Corporation Limited
++ *
 + * Copyright (c) 2023 Loongson Technology Corporation Limited
 + */
 +
-+#ifndef HW_LOONGARCH_PIC_COMMON_H
++#include "qemu/osdep.h"
-+#define HW_LOONGARCH_PIC_COMMON_H
++#include "qemu/units.h"
-+
++#include "target/loongarch/cpu.h"
-+#include "hw/pci-host/ls7a.h"
++#include "hw/loongarch/virt.h"
-+#include "hw/sysbus.h"
++#include "hw/loader.h"
-+
++#include "elf.h"
-+#define PCH_PIC_INT_ID_VAL              0x7000000UL
++#include "qemu/error-report.h"
-+#define PCH_PIC_INT_ID_VER              0x1UL
++#include "sysemu/reset.h"
-+#define PCH_PIC_INT_ID_LO               0x00
++#include "sysemu/qtest.h"
-+#define PCH_PIC_INT_ID_HI               0x04
++
-+#define PCH_PIC_INT_MASK_LO             0x20
++static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
-+#define PCH_PIC_INT_MASK_HI             0x24
++{
-+#define PCH_PIC_HTMSI_EN_LO             0x40
++    return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
-+#define PCH_PIC_HTMSI_EN_HI             0x44
++}
-+#define PCH_PIC_INT_EDGE_LO             0x60
++
-+#define PCH_PIC_INT_EDGE_HI             0x64
++static int64_t load_kernel_info(struct loongarch_boot_info *info)
-+#define PCH_PIC_INT_CLEAR_LO            0x80
++{
-+#define PCH_PIC_INT_CLEAR_HI            0x84
++    uint64_t kernel_entry, kernel_low, kernel_high;
-+#define PCH_PIC_AUTO_CTRL0_LO           0xc0
++    ssize_t kernel_size;
-+#define PCH_PIC_AUTO_CTRL0_HI           0xc4
++
-+#define PCH_PIC_AUTO_CTRL1_LO           0xe0
++    kernel_size = load_elf(info->kernel_filename, NULL,
-+#define PCH_PIC_AUTO_CTRL1_HI           0xe4
++                           cpu_loongarch_virt_to_phys, NULL,
-+#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
++                           &kernel_entry, &kernel_low,
-+#define PCH_PIC_ROUTE_ENTRY_END         0x13f
++                           &kernel_high, NULL, 0,
-+#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
++                           EM_LOONGARCH, 1, 0);
-+#define PCH_PIC_HTMSI_VEC_END           0x23f
++
-+#define PCH_PIC_INT_STATUS_LO           0x3a0
++    if (kernel_size < 0) {
-+#define PCH_PIC_INT_STATUS_HI           0x3a4
++        error_report("could not load kernel '%s': %s",
-+#define PCH_PIC_INT_POL_LO              0x3e0
++                     info->kernel_filename,
-+#define PCH_PIC_INT_POL_HI              0x3e4
++                     load_elf_strerror(kernel_size));
-+
++        exit(1);
-+#define STATUS_LO_START                 0
++    }
-+#define STATUS_HI_START                 0x4
++    return kernel_entry;
-+#define POL_LO_START                    0x40
++}
-+#define POL_HI_START                    0x44
++
-+#endif  /* HW_LOONGARCH_PIC_COMMON_H */
++static void reset_load_elf(void *opaque)
 +{
 +    LoongArchCPU *cpu = opaque;
 +    CPULoongArchState *env = &cpu->env;
 +
 +    cpu_reset(CPU(cpu));
 +    if (env->load_elf) {
 +        cpu_set_pc(CPU(cpu), env->elf_address);
 +    }
 +}
 +
 +static void fw_cfg_add_kernel_info(struct loongarch_boot_info *info,
 +                                   FWCfgState *fw_cfg)
 +{
 +    /*
 +     * Expose the kernel, the command line, and the initrd in fw_cfg.
 +     * We don't process them here at all, it's all left to the
 +     * firmware.
 +     */
 +    load_image_to_fw_cfg(fw_cfg,
 +                         FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
 +                         info->kernel_filename,
 +                         false);
 +
 +    if (info->initrd_filename) {
 +        load_image_to_fw_cfg(fw_cfg,
 +                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
 +                             info->initrd_filename, false);
 +    }
 +
 +    if (info->kernel_cmdline) {
 +        fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
 +                       strlen(info->kernel_cmdline) + 1);
 +        fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
 +                          info->kernel_cmdline);
 +    }
 +}
 +
 +static void loongarch_firmware_boot(LoongArchMachineState *lams,
 +                                    struct loongarch_boot_info *info)
 +{
 +    fw_cfg_add_kernel_info(info, lams->fw_cfg);
 +}
 +
 +static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
 +{
 +    int64_t kernel_addr = 0;
 +    LoongArchCPU *lacpu;
 +    CPUState *cs;
 +
 +    if (info->kernel_filename) {
 +        kernel_addr = load_kernel_info(info);
 +    } else {
 +        if(!qtest_enabled()) {
 +            error_report("Need kernel filename\n");
 +            exit(1);
 +        }
 +    }
 +
 +    CPU_FOREACH(cs) {
 +        lacpu = LOONGARCH_CPU(cs);
 +        lacpu->env.load_elf = true;
 +        lacpu->env.elf_address = kernel_addr;
 +    }
 +}
 +
 +void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
 +{
 +    LoongArchMachineState *lams = LOONGARCH_MACHINE(ms);
 +    int i;
 +
 +    /* register reset function */
 +    for (i = 0; i < ms->smp.cpus; i++) {
 +        qemu_register_reset(reset_load_elf, LOONGARCH_CPU(qemu_get_cpu(i)));
 +    }
 +
 +    info->kernel_filename = ms->kernel_filename;
 +    info->kernel_cmdline = ms->kernel_cmdline;
 +    info->initrd_filename = ms->initrd_filename;
 +
 +    if (lams->bios_loaded) {
 +        loongarch_firmware_boot(lams, info);
 +    } else {
 +        loongarch_direct_kernel_boot(info);
 +    }
 +}
 diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/meson.build
 +++ b/hw/loongarch/meson.build
@@ -XXX,XX +XXX,XX @@
  loongarch_ss = ss.source_set()
  loongarch_ss.add(files(
      'fw_cfg.c',
 +    'boot.c',
  ))
  loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: [files('virt.c'), fdt])
  loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@
  #include "hw/block/flash.h"
  #include "qemu/error-report.h"
 -
 -struct loaderparams {
 -    uint64_t ram_size;
 -    const char *kernel_filename;
 -    const char *kernel_cmdline;
 -    const char *initrd_filename;
 -};
 -
  static PFlashCFI01 *virt_flash_create1(LoongArchMachineState *lams,
                                         const char *name,
                                         const char *alias_prop_name)
@@ -XXX,XX +XXX,XX @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
      memmap_entries++;
  }
 -static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 -{
 -    return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
 -}
 -
 -static int64_t load_kernel_info(const struct loaderparams *loaderparams)
 -{
 -    uint64_t kernel_entry, kernel_low, kernel_high;
 -    ssize_t kernel_size;
 -
 -    kernel_size = load_elf(loaderparams->kernel_filename, NULL,
 -                           cpu_loongarch_virt_to_phys, NULL,
 -                           &kernel_entry, &kernel_low,
 -                           &kernel_high, NULL, 0,
 -                           EM_LOONGARCH, 1, 0);
 -
 -    if (kernel_size < 0) {
 -        error_report("could not load kernel '%s': %s",
 -                     loaderparams->kernel_filename,
 -                     load_elf_strerror(kernel_size));
 -        exit(1);
 -    }
 -    return kernel_entry;
 -}
 -
  static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState *lams)
  {
      DeviceState *dev;
@@ -XXX,XX +XXX,XX @@ static void loongarch_firmware_init(LoongArchMachineState *lams)
      }
  }
 -static void reset_load_elf(void *opaque)
 -{
 -    LoongArchCPU *cpu = opaque;
 -    CPULoongArchState *env = &cpu->env;
 -
 -    cpu_reset(CPU(cpu));
 -    if (env->load_elf) {
 -        cpu_set_pc(CPU(cpu), env->elf_address);
 -    }
 -}
 -
 -static void fw_cfg_add_kernel_info(const struct loaderparams *loaderparams,
 -                                   FWCfgState *fw_cfg)
 -{
 -    /*
 -     * Expose the kernel, the command line, and the initrd in fw_cfg.
 -     * We don't process them here at all, it's all left to the
 -     * firmware.
 -     */
 -    load_image_to_fw_cfg(fw_cfg,
 -                         FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
 -                         loaderparams->kernel_filename,
 -                         false);
 -
 -    if (loaderparams->initrd_filename) {
 -        load_image_to_fw_cfg(fw_cfg,
 -                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
 -                             loaderparams->initrd_filename, false);
 -    }
 -
 -    if (loaderparams->kernel_cmdline) {
 -        fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
 -                       strlen(loaderparams->kernel_cmdline) + 1);
 -        fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
 -                          loaderparams->kernel_cmdline);
 -    }
 -}
 -
 -static void loongarch_firmware_boot(LoongArchMachineState *lams,
 -                                    const struct loaderparams *loaderparams)
 -{
 -    fw_cfg_add_kernel_info(loaderparams, lams->fw_cfg);
 -}
 -
 -static void loongarch_direct_kernel_boot(LoongArchMachineState *lams,
 -                                         const struct loaderparams *loaderparams)
 -{
 -    MachineState *machine = MACHINE(lams);
 -    int64_t kernel_addr = 0;
 -    LoongArchCPU *lacpu;
 -    int i;
 -
 -    kernel_addr = load_kernel_info(loaderparams);
 -    if (!machine->firmware) {
 -        for (i = 0; i < machine->smp.cpus; i++) {
 -            lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
 -            lacpu->env.load_elf = true;
 -            lacpu->env.elf_address = kernel_addr;
 -        }
 -    }
 -}
  static void loongarch_qemu_write(void *opaque, hwaddr addr,
                                   uint64_t val, unsigned size)
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
      MachineClass *mc = MACHINE_GET_CLASS(machine);
      CPUState *cpu;
      char *ramName = NULL;
 -    struct loaderparams loaderparams = { };
      if (!cpu_model) {
          cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
                          sizeof(struct memmap_entry) * (memmap_entries));
      }
      fdt_add_fw_cfg_node(lams);
 -    loaderparams.ram_size = ram_size;
 -    loaderparams.kernel_filename = machine->kernel_filename;
 -    loaderparams.kernel_cmdline = machine->kernel_cmdline;
 -    loaderparams.initrd_filename = machine->initrd_filename;
 -    /* load the kernel. */
 -    if (loaderparams.kernel_filename) {
 -        if (lams->bios_loaded) {
 -            loongarch_firmware_boot(lams, &loaderparams);
 -        } else {
 -            loongarch_direct_kernel_boot(lams, &loaderparams);
 -        }
 -    }
      fdt_add_flash_node(lams);
 -    /* register reset function */
 -    for (i = 0; i < machine->smp.cpus; i++) {
 -        lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
 -        qemu_register_reset(reset_load_elf, lacpu);
 -    }
 +
      /* Initialize the IO interrupt subsystem */
      loongarch_irq_init(lams);
      fdt_add_irqchip_node(lams);
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
       */
      fdt_base = 1 * MiB;
      qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
 -    rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, fdt_base,
 +                          &address_space_memory);
 +    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 +            rom_ptr_for_as(&address_space_memory, fdt_base, lams->fdt_size));
 +
 +    lams->bootinfo.ram_size = ram_size;
 +    loongarch_load_kernel(machine, &lams->bootinfo);
  }
  bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
 diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
 new file mode 100644
 index XXXXXXX..XXXXXXX
 --- /dev/null
 +++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +/*
 + * Definitions for LoongArch boot.
 + *
 + * Copyright (C) 2023 Loongson Technology Corporation Limited
 + */
 +
 +#ifndef HW_LOONGARCH_BOOT_H
 +#define HW_LOONGARCH_BOOT_H
 +
 +struct loongarch_boot_info {
 +    uint64_t ram_size;
 +    const char *kernel_filename;
 +    const char *kernel_cmdline;
 +    const char *initrd_filename;
 +    uint64_t a0, a1, a2;
 +};
 +
 +void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info);
 +
 +#endif /* HW_LOONGARCH_BOOT_H */
 diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/virt.h
 +++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@
  #include "qemu/queue.h"
  #include "hw/intc/loongarch_ipi.h"
  #include "hw/block/flash.h"
 +#include "hw/loongarch/boot.h"
  #define LOONGARCH_MAX_CPUS      256
@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
      MemoryRegion system_iocsr;
      MemoryRegion iocsr_mem;
      AddressSpace as_iocsr;
 +    struct loongarch_boot_info bootinfo;
  };
  #define TYPE_LOONGARCH_MACHINE  MACHINE_TYPE_NAME("virt")
 --
-.43.5
+.25.1

-New patch
+[PULL v2 02/17] hw/loongarch: Add load initrd
+we load initrd ramdisk after kernel_high address
+Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Message-Id: <20240426091551.2397867-3-gaosong@loongson.cn>
+---
+ hw/loongarch/boot.c | 28 +++++++++++++++++++++++++++-
+file changed, 27 insertions(+), 1 deletion(-)
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/boot.c
++++ b/hw/loongarch/boot.c
+@@ -XXX,XX +XXX,XX @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
+ static int64_t load_kernel_info(struct loongarch_boot_info *info)
+ {
+-    uint64_t kernel_entry, kernel_low, kernel_high;
++    uint64_t kernel_entry, kernel_low, kernel_high, initrd_size;
++    ram_addr_t initrd_offset;
+     ssize_t kernel_size;
+     kernel_size = load_elf(info->kernel_filename, NULL,
+@@ -XXX,XX +XXX,XX @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
+                      load_elf_strerror(kernel_size));
+         exit(1);
+     }
++
++    if (info->initrd_filename) {
++        initrd_size = get_image_size(info->initrd_filename);
++        if (initrd_size > 0) {
++            initrd_offset = ROUND_UP(kernel_high + 4 * kernel_size, 64 * KiB);
++
++            if (initrd_offset + initrd_size > info->ram_size) {
++                error_report("memory too small for initial ram disk '%s'",
++                             info->initrd_filename);
++                exit(1);
++            }
++
++            initrd_size = load_image_targphys(info->initrd_filename, initrd_offset,
++                                              info->ram_size - initrd_offset);
++        }
++
++        if (initrd_size == (target_ulong)-1) {
++            error_report("could not load initial ram disk '%s'",
++                         info->initrd_filename);
++            exit(1);
++        }
++    } else {
++        initrd_size = 0;
++    }
++
+     return kernel_entry;
+ }
+--
+.25.1

-New patch
+[PULL v2 03/17] hw/loongarch: Add slave cpu boot_code
+Load the slave CPU boot code at pflash0 and set
+the slave CPU elf_address to VIRT_FLASH0_BASE.
+Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Message-Id: <20240426091551.2397867-4-gaosong@loongson.cn>
+---
+ hw/loongarch/boot.c | 62 ++++++++++++++++++++++++++++++++++++++++++++-
+file changed, 61 insertions(+), 1 deletion(-)
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/boot.c
++++ b/hw/loongarch/boot.c
+@@ -XXX,XX +XXX,XX @@
+ #include "sysemu/reset.h"
+ #include "sysemu/qtest.h"
++static const unsigned int slave_boot_code[] = {
++                  /* Configure reset ebase.                    */
++    0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
++
++                  /* Disable interrupt.                        */
++    0x0380100c,   /* ori        $t0, $zero,0x4                 */
++    0x04000180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_CRMD */
++
++                  /* Clear mailbox.                            */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20  */
++    0x06481da0,   /* iocsrwr.d  $zero, $t1                     */
++
++                  /* Enable IPI interrupt.                     */
++    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
++    0x0400118c,   /* csrxchg    $t0, $t0, LOONGARCH_CSR_ECFG   */
++    0x02fffc0c,   /* addi.d     $t0, $r0,-1(0xfff)             */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x038011ad,   /* ori        $t1, $t1, CORE_EN_OFF          */
++    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
++
++                  /* Wait for wakeup  <.L11>:                  */
++    0x06488000,   /* idle       0x0                            */
++    0x03400000,   /* andi       $zero, $zero, 0x0              */
++    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
++    0x43fff59f,   /* beqz       $t0, -12(0x7ffff4) # 48 <.L11> */
++
++                  /* Read and clear IPI interrupt.             */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x038031ad,   /* ori        $t1, $t1, CORE_CLEAR_OFF       */
++    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
++
++                  /* Disable  IPI interrupt.                   */
++    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
++    0x04001180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_ECFG */
++
++                  /* Read mail buf and jump to specified entry */
++    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
++    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
++    0x06480dac,   /* iocsrrd.d  $t0, $t1                       */
++    0x00150181,   /* move       $ra, $t0                       */
++    0x4c000020,   /* jirl       $zero, $ra,0                   */
++};
++
+ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
+ {
+     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+         }
+     }
++    /* Load slave boot code at pflash0 . */
++    void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
++    memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
++    rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
++
+     CPU_FOREACH(cs) {
+         lacpu = LOONGARCH_CPU(cs);
+         lacpu->env.load_elf = true;
+-        lacpu->env.elf_address = kernel_addr;
++        if (cs == first_cpu) {
++            lacpu->env.elf_address = kernel_addr;
++        } else {
++            lacpu->env.elf_address = VIRT_FLASH0_BASE;
++        }
++        lacpu->env.boot_info = info;
+     }
++
++    g_free(boot_code);
+ }
+ void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
+--
+.25.1

-New patch
+[PULL v2 04/17] hw/loongarch: Add init_cmdline
+Add init_cmline and set boot_info->a0, a1
+Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Message-Id: <20240426091551.2397867-5-gaosong@loongson.cn>
+---
+ hw/loongarch/boot.c         | 30 ++++++++++++++++++++++++++++++
+ include/hw/loongarch/virt.h |  2 ++
+ target/loongarch/cpu.h      |  2 ++
+files changed, 34 insertions(+)
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/boot.c
++++ b/hw/loongarch/boot.c
+@@ -XXX,XX +XXX,XX @@ static const unsigned int slave_boot_code[] = {
+x4c000020,   /* jirl       $zero, $ra,0                   */
+ };
++static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
++{
++    hwaddr cmdline_addr = p - start;
++
++    info->a0 = 1;
++    info->a1 = cmdline_addr;
++
++    memcpy(p, info->kernel_cmdline, COMMAND_LINE_SIZE);
++}
++
+ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
+ {
+     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
+@@ -XXX,XX +XXX,XX @@ static void reset_load_elf(void *opaque)
+     cpu_reset(CPU(cpu));
+     if (env->load_elf) {
++    if (cpu == LOONGARCH_CPU(first_cpu)) {
++            env->gpr[4] = env->boot_info->a0;
++            env->gpr[5] = env->boot_info->a1;
++        }
+         cpu_set_pc(CPU(cpu), env->elf_address);
+     }
+ }
+@@ -XXX,XX +XXX,XX @@ static void loongarch_firmware_boot(LoongArchMachineState *lams,
+     fw_cfg_add_kernel_info(info, lams->fw_cfg);
+ }
++static void init_boot_rom(struct loongarch_boot_info *info, void *p)
++{
++    void *start = p;
++
++    init_cmdline(info, p, start);
++    p += COMMAND_LINE_SIZE;
++}
++
+ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+ {
++    void *p, *bp;
+     int64_t kernel_addr = 0;
+     LoongArchCPU *lacpu;
+     CPUState *cs;
+@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+         }
+     }
++    /* Load cmdline and system tables at [0 - 1 MiB] */
++    p = g_malloc0(1 * MiB);
++    bp = p;
++    init_boot_rom(info, p);
++    rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory);
++
+     /* Load slave boot code at pflash0 . */
+     void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
+     memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
+@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+     }
+     g_free(boot_code);
++    g_free(bp);
+ }
+ void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
+diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/loongarch/virt.h
++++ b/include/hw/loongarch/virt.h
+@@ -XXX,XX +XXX,XX @@
+ #define VIRT_GED_MEM_ADDR       (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
+ #define VIRT_GED_REG_ADDR       (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
++#define COMMAND_LINE_SIZE       512
++
+ struct LoongArchMachineState {
+     /*< private >*/
+     MachineState parent_obj;
+diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
+index XXXXXXX..XXXXXXX 100644
+--- a/target/loongarch/cpu.h
++++ b/target/loongarch/cpu.h
+@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
+     uint32_t mp_state;
+     /* Store ipistate to access from this struct */
+     DeviceState *ipistate;
++
++    struct loongarch_boot_info *boot_info;
+ #endif
+ } CPULoongArchState;
+--
+.25.1

-[PULL 06/18] hw/intc/loongarch_pch: Inherit from loongarch_pic_common
+[PULL v2 05/17] hw/loongarch: Init efi_system_table
-Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object,
+Add init_systab and set boot_info->a2
 it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has
 its own realize() function.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-6-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pch_pic.c            | 38 ++++++++++++--------------
+ hw/loongarch/boot.c         | 22 +++++++++++++++++
- hw/intc/loongarch_pic_common.c         | 32 +++++++++++++++++++++-
+ include/hw/loongarch/boot.h | 48 +++++++++++++++++++++++++++++++++++++
- hw/intc/meson.build                    |  2 +-
+files changed, 70 insertions(+)
  include/hw/intc/loongarch_pch_pic.h    | 21 +++++++++++---
  include/hw/intc/loongarch_pic_common.h | 10 +++++++
 files changed, 77 insertions(+), 26 deletions(-)
-diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pch_pic.c
+--- a/hw/loongarch/boot.c
-+++ b/hw/intc/loongarch_pch_pic.c
++++ b/hw/loongarch/boot.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+@@ -XXX,XX +XXX,XX @@ static const unsigned int slave_boot_code[] = {
-     s->int_polarity = 0x0;
+x4c000020,   /* jirl       $zero, $ra,0                   */
  }
 -#include "loongarch_pic_common.c"
 -static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
 +static void loongarch_pic_realize(DeviceState *dev, Error **errp)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
 -    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
 +    LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
 +    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
      Error *local_err = NULL;
 -    loongarch_pic_common_realize(dev, &local_err);
 +    lpc->parent_realize(dev, &local_err);
      if (local_err) {
          error_propagate(errp, local_err);
          return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
  }
 -static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
 +static void loongarch_pic_class_init(ObjectClass *klass, void *data)
  {
      DeviceClass *dc = DEVICE_CLASS(klass);
 +    LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
 -    dc->realize = loongarch_pch_pic_realize;
      device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
 -    dc->vmsd = &vmstate_loongarch_pic_common;
 -    device_class_set_props(dc, loongarch_pic_common_properties);
 +    device_class_set_parent_realize(dc, loongarch_pic_realize,
 +                                    &lpc->parent_realize);
  }
 -static const TypeInfo loongarch_pch_pic_info = {
 -    .name          = TYPE_LOONGARCH_PCH_PIC,
 -    .parent        = TYPE_SYS_BUS_DEVICE,
 -    .instance_size = sizeof(LoongArchPCHPIC),
 -    .class_init    = loongarch_pch_pic_class_init,
 +static const TypeInfo loongarch_pic_types[] = {
 +   {
 +        .name               = TYPE_LOONGARCH_PIC,
 +        .parent             = TYPE_LOONGARCH_PIC_COMMON,
 +        .instance_size      = sizeof(LoongarchPICState),
 +        .class_size         = sizeof(LoongarchPICClass),
 +        .class_init         = loongarch_pic_class_init,
 +    }
  };
--static void loongarch_pch_pic_register_types(void)
++static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
--{
++{
--    type_register_static(&loongarch_pch_pic_info);
++    struct efi_system_table *systab = p;
 -}
 -
 -type_init(loongarch_pch_pic_register_types)
 +DEFINE_TYPES(loongarch_pic_types)
 diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/intc/loongarch_pic_common.c
 +++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
   * Copyright (C) 2024 Loongson Technology Corporation Limited
   */
 +#include "qemu/osdep.h"
 +#include "qapi/error.h"
 +#include "hw/intc/loongarch_pic_common.h"
 +#include "hw/qdev-properties.h"
 +#include "migration/vmstate.h"
 +
- static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
++    info->a2 = p - start;
  {
 -    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
      if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
          error_setg(errp, "Invalid 'pic_irq_num'");
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
          VMSTATE_END_OF_LIST()
      }
  };
 +
-+static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
++    systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
-+{
++    systab->hdr.revision = EFI_SPECIFICATION_VERSION;
-+    DeviceClass *dc = DEVICE_CLASS(klass);
++    systab->hdr.revision = sizeof(struct efi_system_table),
-+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
++    systab->fw_revision = FW_VERSION << 16 | FW_PATCHLEVEL << 8;
 +    systab->runtime = 0;
 +    systab->boottime = 0;
 +    systab->nr_tables = 0;
 +
-+    device_class_set_parent_realize(dc, loongarch_pic_common_realize,
++    p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB);
-+                                    &lpcc->parent_realize);
++
-+    device_class_set_props(dc, loongarch_pic_common_properties);
++    systab->tables = p;
 +    dc->vmsd = &vmstate_loongarch_pic_common;
 +}
 +
-+static const TypeInfo loongarch_pic_common_types[] = {
+ static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
-+    {
+ {
-+        .name               = TYPE_LOONGARCH_PIC_COMMON,
+     hwaddr cmdline_addr = p - start;
-+        .parent             = TYPE_SYS_BUS_DEVICE,
+@@ -XXX,XX +XXX,XX @@ static void reset_load_elf(void *opaque)
-+        .instance_size      = sizeof(LoongArchPICCommonState),
+     if (cpu == LOONGARCH_CPU(first_cpu)) {
-+        .class_size         = sizeof(LoongArchPICCommonClass),
+             env->gpr[4] = env->boot_info->a0;
-+        .class_init         = loongarch_pic_common_class_init,
+             env->gpr[5] = env->boot_info->a1;
-+        .abstract           = true,
++            env->gpr[6] = env->boot_info->a2;
-+    }
+         }
          cpu_set_pc(CPU(cpu), env->elf_address);
      }
@@ -XXX,XX +XXX,XX @@ static void init_boot_rom(struct loongarch_boot_info *info, void *p)
      init_cmdline(info, p, start);
      p += COMMAND_LINE_SIZE;
 +
 +    init_systab(info, p, start);
  }
  static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
 diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/boot.h
 +++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@
  #ifndef HW_LOONGARCH_BOOT_H
  #define HW_LOONGARCH_BOOT_H
 +/* UEFI 2.10 */
 +#define EFI_SYSTEM_TABLE_SIGNATURE       0x5453595320494249
 +#define EFI_2_100_SYSTEM_TABLE_REVISION  ((2<<16) | (100))
 +#define EFI_SPECIFICATION_VERSION        EFI_SYSTEM_TABLE_REVISION
 +#define EFI_SYSTEM_TABLE_REVISION        EFI_2_100_SYSTEM_TABLE_REVISION
 +
 +#define FW_VERSION 0x1
 +#define FW_PATCHLEVEL 0x0
 +
 +typedef struct {
 +    uint8_t b[16];
 +} efi_guid_t QEMU_ALIGNED(8);
 +
 +struct efi_config_table {
 +    efi_guid_t guid;
 +    uint64_t *ptr;
 +    const char name[16];
 +};
 +
-+DEFINE_TYPES(loongarch_pic_common_types)
++typedef struct {
-diff --git a/hw/intc/meson.build b/hw/intc/meson.build
++    uint64_t signature;
-index XXXXXXX..XXXXXXX 100644
++    uint32_t revision;
---- a/hw/intc/meson.build
++    uint32_t headersize;
-+++ b/hw/intc/meson.build
++    uint32_t crc32;
-@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
++    uint32_t reserved;
- specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
++} efi_table_hdr_t;
  specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
  specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
 -specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
 +specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
  specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
  specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
 diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_pch_pic.h
 +++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
  #include "hw/intc/loongarch_pic_common.h"
 -#define LoongArchPCHPIC LoongArchPICCommonState
 -#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
 -#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
 -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 +#define TYPE_LOONGARCH_PIC  "loongarch_pic"
 +#define PCH_PIC_NAME(name)  TYPE_LOONGARCH_PIC#name
 +OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
 +
-+struct LoongarchPICState {
++struct efi_configuration_table {
-+    LoongArchPICCommonState parent_obj;
++    efi_guid_t guid;
 +    void *table;
 +};
 +
-+struct LoongarchPICClass {
++struct efi_system_table {
-+    LoongArchPICCommonClass parent_class;
++    efi_table_hdr_t hdr;
-+
++    uint64_t fw_vendor;        /* physical addr of CHAR16 vendor string */
-+    DeviceRealize parent_realize;
++    uint32_t fw_revision;
 +    uint64_t con_in_handle;
 +    uint64_t *con_in;
 +    uint64_t con_out_handle;
 +    uint64_t *con_out;
 +    uint64_t stderr_handle;
 +    uint64_t stderr_placeholder;
 +    uint64_t *runtime;
 +    uint64_t *boottime;
 +    uint64_t nr_tables;
 +    struct efi_configuration_table *tables;
 +};
 +
-+#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
+ struct loongarch_boot_info {
-+typedef struct LoongArchPICCommonState LoongArchPCHPIC;
+     uint64_t ram_size;
-+#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
+     const char *kernel_filename;
  #endif /* HW_LOONGARCH_PCH_PIC_H */
 diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_pic_common.h
 +++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
  #define POL_LO_START                    0x40
  #define POL_HI_START                    0x44
 +#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
 +OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
 +                    LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
 +
  struct LoongArchPICCommonState {
      SysBusDevice parent_obj;
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState {
      MemoryRegion iomem8;
      unsigned int irq_num;
  };
 +
 +struct LoongArchPICCommonClass {
 +    SysBusDeviceClass parent_class;
 +
 +    DeviceRealize parent_realize;
 +};
  #endif  /* HW_LOONGARCH_PIC_COMMON_H */
 --
-.43.5
+.25.1

-[PULL 10/18] include: Move struct LoongArchExtIOI to header file loongarch_extioi_common
+[PULL v2 06/17] hw/loongarch: Init efi_boot_memmap table
-Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h
+The efi_system_table adds a efi_boot_memmap configuration table.
 to file loongarch_extioi_common.h.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-7-gaosong@loongson.cn>
 ---
- include/hw/intc/loongarch_extioi.h        | 26 ----------------------
+ hw/loongarch/boot.c         | 40 +++++++++++++++++++++++++++++++++++++
- include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++
+ hw/loongarch/virt.c         | 11 ++--------
-files changed, 27 insertions(+), 26 deletions(-)
+ include/hw/loongarch/boot.h | 27 +++++++++++++++++++++++++
  include/hw/loongarch/virt.h | 10 ++++++++++
 files changed, 79 insertions(+), 9 deletions(-)
-diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/intc/loongarch_extioi.h
+--- a/hw/loongarch/boot.c
-+++ b/include/hw/intc/loongarch_extioi.h
++++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static const unsigned int slave_boot_code[] = {
 x4c000020,   /* jirl       $zero, $ra,0                   */
  };
 +static inline void *guidcpy(void *dst, const void *src)
 +{
 +    return memcpy(dst, src, sizeof(efi_guid_t));
 +}
 +
 +static void init_efi_boot_memmap(struct efi_system_table *systab,
 +                                 void *p, void *start)
 +{
 +    unsigned i;
 +    struct efi_boot_memmap *boot_memmap = p;
 +    efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID;
 +
 +    /* efi_configuration_table 1 */
 +    guidcpy(&systab->tables[0].guid, &tbl_guid);
 +    systab->tables[0].table = (struct efi_configuration_table *)(p - start);
 +    systab->nr_tables = 1;
 +
 +    boot_memmap->desc_size = sizeof(efi_memory_desc_t);
 +    boot_memmap->desc_ver = 1;
 +    boot_memmap->map_size = 0;
 +
 +    efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap);
 +    for (i = 0; i < memmap_entries; i++) {
 +        map = (void *)boot_memmap + sizeof(*map);
 +        map[i].type = memmap_table[i].type;
 +        map[i].phys_addr = ROUND_UP(memmap_table[i].address, 64 * KiB);
 +        map[i].num_pages = ROUND_DOWN(memmap_table[i].address +
 +                        memmap_table[i].length - map[i].phys_addr, 64 * KiB);
 +        p += sizeof(efi_memory_desc_t);
 +    }
 +}
 +
  static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
  {
 +    void *bp_tables_start;
      struct efi_system_table *systab = p;
      info->a2 = p - start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
      p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB);
      systab->tables = p;
 +    bp_tables_start = p;
 +
 +    init_efi_boot_memmap(systab, p, start);
 +    p += ROUND_UP(sizeof(struct efi_boot_memmap) +
 +                  sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
 +
 +    systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
  }
  static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_powerdown_req(Notifier *notifier, void *opaque)
      acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
  }
 -struct memmap_entry {
 -    uint64_t address;
 -    uint64_t length;
 -    uint32_t type;
 -    uint32_t reserved;
 -};
 -
 -static struct memmap_entry *memmap_table;
 -static unsigned memmap_entries;
 +struct memmap_entry *memmap_table;
 +unsigned memmap_entries;
  static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
  {
 diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/boot.h
 +++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
      uint8_t b[16];
  } efi_guid_t QEMU_ALIGNED(8);
 +#define EFI_GUID(a, b, c, d...) (efi_guid_t){ {                                \
 +        (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
 +        (b) & 0xff, ((b) >> 8) & 0xff,                                         \
 +        (c) & 0xff, ((c) >> 8) & 0xff, d } }
 +
 +#define LINUX_EFI_BOOT_MEMMAP_GUID \
 +        EFI_GUID(0x800f683f, 0xd08b, 0x423a,  0xa2, 0x93, \
 +                 0x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
 +
  struct efi_config_table {
      efi_guid_t guid;
      uint64_t *ptr;
@@ -XXX,XX +XXX,XX @@ struct efi_system_table {
      struct efi_configuration_table *tables;
  };
 +typedef struct {
 +    uint32_t type;
 +    uint32_t pad;
 +    uint64_t phys_addr;
 +    uint64_t virt_addr;
 +    uint64_t num_pages;
 +    uint64_t attribute;
 +} efi_memory_desc_t;
 +
 +struct efi_boot_memmap {
 +    uint64_t map_size;
 +    uint64_t desc_size;
 +    uint32_t desc_ver;
 +    uint64_t map_key;
 +    uint64_t buff_size;
 +    efi_memory_desc_t map[32];
 +};
 +
  struct loongarch_boot_info {
      uint64_t ram_size;
      const char *kernel_filename;
 diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/virt.h
 +++ b/include/hw/loongarch/virt.h
 @@ -XXX,XX +XXX,XX @@
- #include "hw/intc/loongarch_extioi_common.h"
+ #define COMMAND_LINE_SIZE       512
--typedef struct ExtIOICore {
++extern struct memmap_entry *memmap_table;
--    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
++extern unsigned memmap_entries;
 -    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
 -    qemu_irq parent_irq[LS3A_INTC_IP];
 -} ExtIOICore;
 -
  #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
  OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
 -struct LoongArchExtIOI {
 -    SysBusDevice parent_obj;
 -    uint32_t num_cpu;
 -    uint32_t features;
 -    uint32_t status;
 -    /* hardware state */
 -    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
 -    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
 -    uint32_t isr[EXTIOI_IRQS / 32];
 -    uint32_t enable[EXTIOI_IRQS / 32];
 -    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
 -    uint32_t coremap[EXTIOI_IRQS / 4];
 -    uint32_t sw_pending[EXTIOI_IRQS / 32];
 -    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
 -    uint8_t  sw_coremap[EXTIOI_IRQS];
 -    qemu_irq irq[EXTIOI_IRQS];
 -    ExtIOICore *cpu;
 -    MemoryRegion extioi_system_mem;
 -    MemoryRegion virt_extend;
 -};
  #endif /* LOONGARCH_EXTIOI_H */
 diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_extioi_common.h
 +++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
  #define  EXTIOI_ENABLE_CPU_ENCODE    (3)
  #define EXTIOI_VIRT_COREMAP_START    (0x40)
  #define EXTIOI_VIRT_COREMAP_END      (0x240)
 +
-+typedef struct ExtIOICore {
++struct memmap_entry {
-+    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
++    uint64_t address;
-+    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
++    uint64_t length;
-+    qemu_irq parent_irq[LS3A_INTC_IP];
++    uint32_t type;
-+} ExtIOICore;
++    uint32_t reserved;
 +};
 +
-+struct LoongArchExtIOI {
+ struct LoongArchMachineState {
-+    SysBusDevice parent_obj;
+     /*< private >*/
-+    uint32_t num_cpu;
+     MachineState parent_obj;
 +    uint32_t features;
 +    uint32_t status;
 +    /* hardware state */
 +    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
 +    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
 +    uint32_t isr[EXTIOI_IRQS / 32];
 +    uint32_t enable[EXTIOI_IRQS / 32];
 +    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
 +    uint32_t coremap[EXTIOI_IRQS / 4];
 +    uint32_t sw_pending[EXTIOI_IRQS / 32];
 +    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
 +    uint8_t  sw_coremap[EXTIOI_IRQS];
 +    qemu_irq irq[EXTIOI_IRQS];
 +    ExtIOICore *cpu;
 +    MemoryRegion extioi_system_mem;
 +    MemoryRegion virt_extend;
 +};
  #endif /* LOONGARCH_EXTIOI_H */
 --
-.43.5
+.25.1

-[PULL 05/18] hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
+[PULL v2 07/17] hw/loongarch: Init efi_initrd table
-Move some common functions to file loongarch_pic_common.c, the common
+The efi_system_table adds a efi_initrd configuration table.
 functions include loongarch_pic_common_realize(), property structure
 loongarch_pic_common_properties and vmstate structure
 vmstate_loongarch_pic_common.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-8-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pch_pic.c    | 37 +-----------------------------
+ hw/loongarch/boot.c         | 23 +++++++++++++++++++++--
- hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++
+ include/hw/loongarch/boot.h |  9 +++++++++
-files changed, 42 insertions(+), 36 deletions(-)
+files changed, 30 insertions(+), 2 deletions(-)
  create mode 100644 hw/intc/loongarch_pic_common.c
-diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pch_pic.c
+--- a/hw/loongarch/boot.c
-+++ b/hw/intc/loongarch_pch_pic.c
++++ b/hw/loongarch/boot.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+@@ -XXX,XX +XXX,XX @@
-     s->int_polarity = 0x0;
+ #include "sysemu/reset.h"
  #include "sysemu/qtest.h"
 +ram_addr_t initrd_offset;
 +uint64_t initrd_size;
 +
  static const unsigned int slave_boot_code[] = {
                    /* Configure reset ebase.                    */
 x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
@@ -XXX,XX +XXX,XX @@ static void init_efi_boot_memmap(struct efi_system_table *systab,
      }
  }
--static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
++static void init_efi_initrd_table(struct efi_system_table *systab,
--{
++                                  void *p, void *start)
--    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
++{
--
++    efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID;
--    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
++    struct efi_initrd *initrd_table  = p;
 -        error_setg(errp, "Invalid 'pic_irq_num'");
 -        return;
 -    }
 -}
 -
 +#include "loongarch_pic_common.c"
  static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
  {
      LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
  }
 -static Property loongarch_pic_common_properties[] = {
 -    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
 -    DEFINE_PROP_END_OF_LIST(),
 -};
 -
 -static const VMStateDescription vmstate_loongarch_pic_common = {
 -    .name = "loongarch_pch_pic",
 -    .version_id = 1,
 -    .minimum_version_id = 1,
 -    .fields = (const VMStateField[]) {
 -        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
 -        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
 -        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
 -        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
 -        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
 -        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
 -        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
 -        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
 -        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
 -        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
 -        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
 -        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
 -        VMSTATE_END_OF_LIST()
 -    }
 -};
 -
  static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
  {
      DeviceClass *dc = DEVICE_CLASS(klass);
 diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
 new file mode 100644
 index XXXXXXX..XXXXXXX
 --- /dev/null
 +++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +/*
 + * QEMU Loongson 7A1000 I/O interrupt controller.
 + * Copyright (C) 2024 Loongson Technology Corporation Limited
 + */
 +
-+static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
++    /* efi_configuration_table 2 */
-+{
++    guidcpy(&systab->tables[1].guid, &tbl_guid);
-+    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
++    systab->tables[1].table = (struct efi_configuration_table *)(p - start);
 +    systab->nr_tables = 2;
 +
-+    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
++    initrd_table->base = initrd_offset;
-+        error_setg(errp, "Invalid 'pic_irq_num'");
++    initrd_table->size = initrd_size;
 +        return;
 +    }
 +}
 +
-+static Property loongarch_pic_common_properties[] = {
+ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
-+    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
+ {
-+    DEFINE_PROP_END_OF_LIST(),
+     void *bp_tables_start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
      init_efi_boot_memmap(systab, p, start);
      p += ROUND_UP(sizeof(struct efi_boot_memmap) +
                    sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
 +    init_efi_initrd_table(systab, p, start);
 +    p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
      systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
  }
@@ -XXX,XX +XXX,XX @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
  static int64_t load_kernel_info(struct loongarch_boot_info *info)
  {
 -    uint64_t kernel_entry, kernel_low, kernel_high, initrd_size;
 -    ram_addr_t initrd_offset;
 +    uint64_t kernel_entry, kernel_low, kernel_high;
      ssize_t kernel_size;
      kernel_size = load_elf(info->kernel_filename, NULL,
 diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/boot.h
 +++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
          EFI_GUID(0x800f683f, 0xd08b, 0x423a,  0xa2, 0x93, \
 x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
 +#define LINUX_EFI_INITRD_MEDIA_GUID \
 +        EFI_GUID(0x5568e427, 0x68fc, 0x4f3d,  0xac, 0x74, \
 +                 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
 +
  struct efi_config_table {
      efi_guid_t guid;
      uint64_t *ptr;
@@ -XXX,XX +XXX,XX @@ struct efi_boot_memmap {
      efi_memory_desc_t map[32];
  };
 +struct efi_initrd {
 +    uint64_t base;
 +    uint64_t size;
 +};
 +
-+static const VMStateDescription vmstate_loongarch_pic_common = {
+ struct loongarch_boot_info {
-+    .name = "loongarch_pch_pic",
+     uint64_t ram_size;
-+    .version_id = 1,
+     const char *kernel_filename;
 +    .minimum_version_id = 1,
 +    .fields = (const VMStateField[]) {
 +        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
 +        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
 +        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
 +        VMSTATE_END_OF_LIST()
 +    }
 +};
 --
-.43.5
+.25.1

-[PULL 11/18] include: Rename LoongArchExtIOI with LoongArchExtIOICommonState
+[PULL v2 08/17] hw/loongarch: Init efi_fdt table
-Rename structure LoongArchExtIOI with LoongArchExtIOICommonState,
+The efi_system_table adds a efi_fdt configuration table.
 since it is defined in file loongarch_extioi_common.h
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-9-gaosong@loongson.cn>
 ---
- include/hw/intc/loongarch_extioi.h        | 1 +
+ hw/loongarch/boot.c         | 11 +++++++++++
- include/hw/intc/loongarch_extioi_common.h | 2 +-
+ hw/loongarch/virt.c         |  6 ++----
-files changed, 2 insertions(+), 1 deletion(-)
+ include/hw/loongarch/boot.h |  4 ++++
  include/hw/loongarch/virt.h |  2 ++
 files changed, 19 insertions(+), 4 deletions(-)
-diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
+diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/intc/loongarch_extioi.h
+--- a/hw/loongarch/boot.c
-+++ b/include/hw/intc/loongarch_extioi.h
++++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static void init_efi_initrd_table(struct efi_system_table *systab,
      initrd_table->size = initrd_size;
  }
 +static void init_efi_fdt_table(struct efi_system_table *systab)
 +{
 +    efi_guid_t tbl_guid = DEVICE_TREE_GUID;
 +
 +    /* efi_configuration_table 3 */
 +    guidcpy(&systab->tables[2].guid, &tbl_guid);
 +    systab->tables[2].table = (void *)FDT_BASE;
 +    systab->nr_tables = 3;
 +}
 +
  static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
  {
      void *bp_tables_start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
                    sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
      init_efi_initrd_table(systab, p, start);
      p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
 +    init_efi_fdt_table(systab);
      systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
  }
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
      int nb_numa_nodes = machine->numa_state->num_nodes;
      NodeInfo *numa_info = machine->numa_state->nodes;
      int i;
 -    hwaddr fdt_base;
      const CPUArchIdList *possible_cpus;
      MachineClass *mc = MACHINE_GET_CLASS(machine);
      CPUState *cpu;
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
       * Put the FDT into the memory map as a ROM image: this will ensure
       * the FDT is copied again upon reset, even if addr points into RAM.
       */
 -    fdt_base = 1 * MiB;
      qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, fdt_base,
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, FDT_BASE,
                            &address_space_memory);
      qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, fdt_base, lams->fdt_size));
 +            rom_ptr_for_as(&address_space_memory, FDT_BASE, lams->fdt_size));
      lams->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lams->bootinfo);
 diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/boot.h
 +++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
          EFI_GUID(0x5568e427, 0x68fc, 0x4f3d,  0xac, 0x74, \
 xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
 +#define DEVICE_TREE_GUID \
 +        EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5,  0x83, 0x0b, \
 +                 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0)
 +
  struct efi_config_table {
      efi_guid_t guid;
      uint64_t *ptr;
 diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/loongarch/virt.h
 +++ b/include/hw/loongarch/virt.h
 @@ -XXX,XX +XXX,XX @@
- #include "hw/intc/loongarch_extioi_common.h"
+ #define COMMAND_LINE_SIZE       512
-+#define LoongArchExtIOI LoongArchExtIOICommonState
++#define FDT_BASE                0x100000
- #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
++
- OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
+ extern struct memmap_entry *memmap_table;
- #endif /* LOONGARCH_EXTIOI_H */
+ extern unsigned memmap_entries;
-diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_extioi_common.h
 +++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore {
      qemu_irq parent_irq[LS3A_INTC_IP];
  } ExtIOICore;
 -struct LoongArchExtIOI {
 +struct LoongArchExtIOICommonState {
      SysBusDevice parent_obj;
      uint32_t num_cpu;
      uint32_t features;
 --
-.43.5
+.25.1

-New patch
+[PULL v2 09/17] hw/loongarch: Fix fdt memory node wrong 'reg'
+The right fdt memory node like [1], not [2]
+  [1]
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00 0x00 0x00 0x10000000>;
+        };
+  [2]
+        memory@0 {
+                device_type = "memory";
+                reg = <0x02 0x00 0x02 0x10000000>;
+        };
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
+Message-Id: <20240426091551.2397867-10-gaosong@loongson.cn>
+---
+ hw/loongarch/virt.c | 2 +-
+file changed, 1 insertion(+), 1 deletion(-)
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/virt.c
++++ b/hw/loongarch/virt.c
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
+     char *nodename = g_strdup_printf("/memory@%" PRIx64, base);
+     qemu_fdt_add_subnode(ms->fdt, nodename);
+-    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 2, base, 2, size);
++    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size);
+     qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory");
+     if (ms->numa_state && ms->numa_state->num_nodes) {
+--
+.25.1

-New patch
+[PULL v2 10/17] hw/loongarch: fdt adds cpu interrupt controller node
+fdt adds cpu interrupt controller node,
+we use 'loongson,cpu-interrupt-controller'.
+See:
+https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c
+https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn
+Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Message-Id: <20240426091551.2397867-11-gaosong@loongson.cn>
+---
+ hw/loongarch/virt.c | 21 +++++++++++++++++++++
+file changed, 21 insertions(+)
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/virt.c
++++ b/hw/loongarch/virt.c
+@@ -XXX,XX +XXX,XX @@ static void virt_flash_map(LoongArchMachineState *lams,
+     virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
+ }
++static void fdt_add_cpuic_node(LoongArchMachineState *lams,
++                               uint32_t *cpuintc_phandle)
++{
++    MachineState *ms = MACHINE(lams);
++    char *nodename;
++
++    *cpuintc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
++    nodename = g_strdup_printf("/cpuic");
++    qemu_fdt_add_subnode(ms->fdt, nodename);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle);
++    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
++                            "loongson,cpu-interrupt-controller");
++    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
++    g_free(nodename);
++}
++
+ static void fdt_add_flash_node(LoongArchMachineState *lams)
+ {
+     MachineState *ms = MACHINE(lams);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
+     CPULoongArchState *env;
+     CPUState *cpu_state;
+     int cpu, pin, i, start, num;
++    uint32_t cpuintc_phandle;
+     /*
+      * The connection of interrupts:
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
+     memory_region_add_subregion(&lams->system_iocsr, MAIL_SEND_ADDR,
+                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
++    /* Add cpu interrupt-controller */
++    fdt_add_cpuic_node(lams, &cpuintc_phandle);
++
+     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
+         cpu_state = qemu_get_cpu(cpu);
+         cpudev = DEVICE(cpu_state);
+--
+.25.1

-[PULL 09/18] include: Add loongarch_extioi_common header file
+[PULL v2 11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller
-Add common header file include/hw/intc/loongarch_extioi_common.h, and
+fdt adds Extend I/O Interrupt Controller,
-move some macro definition from include/hw/intc/loongarch_extioi.h to
+we use 'loongson,ls2k2000-eiointc'.
 the common header file.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+See:
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
 https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-12-gaosong@loongson.cn>
 ---
- include/hw/intc/loongarch_extioi.h        | 50 +------------------
+ hw/loongarch/virt.c                | 30 +++++++++++++++++++++++++++++-
- include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++
+ include/hw/intc/loongarch_extioi.h |  1 +
-files changed, 59 insertions(+), 49 deletions(-)
+files changed, 30 insertions(+), 1 deletion(-)
  create mode 100644 include/hw/intc/loongarch_extioi_common.h
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/loongarch/virt.c
++++ b/hw/loongarch/virt.c
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpuic_node(LoongArchMachineState *lams,
+     g_free(nodename);
+ }
++static void fdt_add_eiointc_node(LoongArchMachineState *lams,
++                                  uint32_t *cpuintc_phandle,
++                                  uint32_t *eiointc_phandle)
++{
++    MachineState *ms = MACHINE(lams);
++    char *nodename;
++    hwaddr extioi_base = APIC_BASE;
++    hwaddr extioi_size = EXTIOI_SIZE;
++
++    *eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
++    nodename = g_strdup_printf("/eiointc@%" PRIx64, extioi_base);
++    qemu_fdt_add_subnode(ms->fdt, nodename);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle);
++    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
++                            "loongson,ls2k2000-eiointc");
++    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
++                          *cpuintc_phandle);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3);
++    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0,
++                           extioi_base, 0x0, extioi_size);
++    g_free(nodename);
++}
++
+ static void fdt_add_flash_node(LoongArchMachineState *lams)
+ {
+     MachineState *ms = MACHINE(lams);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
+     CPULoongArchState *env;
+     CPUState *cpu_state;
+     int cpu, pin, i, start, num;
+-    uint32_t cpuintc_phandle;
++    uint32_t cpuintc_phandle, eiointc_phandle;
+     /*
+      * The connection of interrupts:
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
+         }
+     }
++    /* Add Extend I/O Interrupt Controller node */
++    fdt_add_eiointc_node(lams, &cpuintc_phandle, &eiointc_phandle);
++
+     pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+     num = VIRT_PCH_PIC_IRQ_NUM;
+     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
 diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_extioi.h
 +++ b/include/hw/intc/loongarch_extioi.h
 @@ -XXX,XX +XXX,XX @@
-  * Copyright (C) 2021 Loongson Technology Corporation Limited
+ #define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
-  */
+ #define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
+ #define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
--#include "hw/sysbus.h"
++#define EXTIOI_SIZE                  0x800
 -#include "hw/loongarch/virt.h"
 -
  #ifndef LOONGARCH_EXTIOI_H
  #define LOONGARCH_EXTIOI_H
 -#define LS3A_INTC_IP               8
 -#define EXTIOI_IRQS                (256)
 -#define EXTIOI_IRQS_BITMAP_SIZE    (256 / 8)
 -/* irq from EXTIOI is routed to no more than 4 cpus */
 -#define EXTIOI_CPUS                (4)
 -/* map to ipnum per 32 irqs */
 -#define EXTIOI_IRQS_IPMAP_SIZE     (256 / 32)
 -#define EXTIOI_IRQS_COREMAP_SIZE   256
 -#define EXTIOI_IRQS_NODETYPE_COUNT  16
 -#define EXTIOI_IRQS_GROUP_COUNT    8
 -
 -#define APIC_OFFSET                  0x400
 -#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
 -
 -#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
 -#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
 -#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
 -#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
 -#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
 -#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
 -#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
 -#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
 -#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
 -#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
 -#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
 -#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
 -#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
 -#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
 -#define EXTIOI_SIZE                  0x800
 -
 -#define EXTIOI_VIRT_BASE             (0x40000000)
 -#define EXTIOI_VIRT_SIZE             (0x1000)
 -#define EXTIOI_VIRT_FEATURES         (0x0)
 -#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
 -#define  EXTIOI_HAS_ENABLE_OPTION    (1)
 -#define  EXTIOI_HAS_INT_ENCODE       (2)
 -#define  EXTIOI_HAS_CPU_ENCODE       (3)
 -#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
 -                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
 -                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
 -#define EXTIOI_VIRT_CONFIG           (0x4)
 -#define  EXTIOI_ENABLE               (1)
 -#define  EXTIOI_ENABLE_INT_ENCODE    (2)
 -#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
 -#define EXTIOI_VIRT_COREMAP_START    (0x40)
 -#define EXTIOI_VIRT_COREMAP_END      (0x240)
 +#include "hw/intc/loongarch_extioi_common.h"
  typedef struct ExtIOICore {
      uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
-diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
-new file mode 100644
-index XXXXXXX..XXXXXXX
---- /dev/null
-+++ b/include/hw/intc/loongarch_extioi_common.h
-@@ -XXX,XX +XXX,XX @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+/*
-+ * LoongArch 3A5000 ext interrupt controller definitions
-+ * Copyright (C) 2024 Loongson Technology Corporation Limited
-+ */
-+
-+#ifndef LOONGARCH_EXTIOI_COMMON_H
-+#define LOONGARCH_EXTIOI_COMMON_H
-+
-+#include "hw/sysbus.h"
-+#include "hw/loongarch/virt.h"
-+
-+#define LS3A_INTC_IP                 8
-+#define EXTIOI_IRQS                  (256)
-+#define EXTIOI_IRQS_BITMAP_SIZE      (256 / 8)
-+/* irq from EXTIOI is routed to no more than 4 cpus */
-+#define EXTIOI_CPUS                  (4)
-+/* map to ipnum per 32 irqs */
-+#define EXTIOI_IRQS_IPMAP_SIZE       (256 / 32)
-+#define EXTIOI_IRQS_COREMAP_SIZE     256
-+#define EXTIOI_IRQS_NODETYPE_COUNT   16
-+#define EXTIOI_IRQS_GROUP_COUNT      8
-+
-+#define APIC_OFFSET                  0x400
-+#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
-+#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
-+#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
-+#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
-+#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
-+#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
-+#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
-+#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
-+#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
-+#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
-+#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
-+#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
-+#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
-+#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
-+#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
-+#define EXTIOI_SIZE                  0x800
-+
-+#define EXTIOI_VIRT_BASE             (0x40000000)
-+#define EXTIOI_VIRT_SIZE             (0x1000)
-+#define EXTIOI_VIRT_FEATURES         (0x0)
-+#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
-+#define  EXTIOI_HAS_ENABLE_OPTION    (1)
-+#define  EXTIOI_HAS_INT_ENCODE       (2)
-+#define  EXTIOI_HAS_CPU_ENCODE       (3)
-+#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
-+                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
-+                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
-+#define EXTIOI_VIRT_CONFIG           (0x4)
-+#define  EXTIOI_ENABLE               (1)
-+#define  EXTIOI_ENABLE_INT_ENCODE    (2)
-+#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
-+#define EXTIOI_VIRT_COREMAP_START    (0x40)
-+#define EXTIOI_VIRT_COREMAP_END      (0x240)
-+#endif /* LOONGARCH_EXTIOI_H */
 --
-.43.5
+.25.1

-[PULL 12/18] hw/intc/loongarch_extioi: Rename LoongArchExtIOI with LoongArchExtIOICommonState
+[PULL v2 12/17] hw/loongarch: fdt adds pch_pic Controller
-With some structure such as vmstate and property, rename LoongArchExtIOI
+fdt adds pch pic controller, we use 'loongson,pch-pic-1.0'
 with LoongArchExtIOICommonState, these common structure will be moved
 to common file.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+See:
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c
 https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.yang@flygoat.com
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-13-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++---------------
+ hw/loongarch/virt.c        | 30 +++++++++++++++++++++++++++++-
-file changed, 25 insertions(+), 16 deletions(-)
+ include/hw/pci-host/ls7a.h |  1 +
 files changed, 30 insertions(+), 1 deletion(-)
-diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_extioi.c
+--- a/hw/loongarch/virt.c
-+++ b/hw/intc/loongarch_extioi.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_eiointc_node(LoongArchMachineState *lams,
-     return 0;
+     g_free(nodename);
  }
-+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
++static void fdt_add_pch_pic_node(LoongArchMachineState *lams,
 +                                 uint32_t *eiointc_phandle,
 +                                 uint32_t *pch_pic_phandle)
 +{
-+    return vmstate_extioi_post_load(opaque, version_id);
++    MachineState *ms = MACHINE(lams);
 +    char *nodename;
 +    hwaddr pch_pic_base = VIRT_PCH_REG_BASE;
 +    hwaddr pch_pic_size = VIRT_PCH_REG_SIZE;
 +
 +    *pch_pic_phandle = qemu_fdt_alloc_phandle(ms->fdt);
 +    nodename = g_strdup_printf("/platic@%" PRIx64, pch_pic_base);
 +    qemu_fdt_add_subnode(ms->fdt, nodename);
 +    qemu_fdt_setprop_cell(ms->fdt,  nodename, "phandle", *pch_pic_phandle);
 +    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
 +                            "loongson,pch-pic-1.0");
 +    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0,
 +                           pch_pic_base, 0, pch_pic_size);
 +    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 2);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
 +                          *eiointc_phandle);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,pic-base-vec", 0);
 +    g_free(nodename);
 +}
 +
- static const VMStateDescription vmstate_extioi_core = {
+ static void fdt_add_flash_node(LoongArchMachineState *lams)
-     .name = "extioi-core",
+ {
-     .version_id = 1,
+     MachineState *ms = MACHINE(lams);
-@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = {
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
- };
+     CPULoongArchState *env;
+     CPUState *cpu_state;
- static const VMStateDescription vmstate_loongarch_extioi = {
+     int cpu, pin, i, start, num;
--    .name = TYPE_LOONGARCH_EXTIOI,
+-    uint32_t cpuintc_phandle, eiointc_phandle;
-+    .name = "loongarch.extioi",
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle;
-     .version_id = 3,
-     .minimum_version_id = 3,
+     /*
--    .post_load = vmstate_extioi_post_load,
+      * The connection of interrupts:
-+    .post_load = loongarch_extioi_common_post_load,
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
-     .fields = (const VMStateField[]) {
+         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
 -        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
 -        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
 +        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS_GROUP_COUNT),
 +        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
                               EXTIOI_IRQS_NODETYPE_COUNT / 2),
 -        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
 -        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
 -        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
 -        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
 -
 -        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
 -                         vmstate_extioi_core, ExtIOICore),
 -        VMSTATE_UINT32(features, LoongArchExtIOI),
 -        VMSTATE_UINT32(status, LoongArchExtIOI),
 +        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 32),
 +        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 32),
 +        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS_IPMAP_SIZE / 4),
 +        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 4),
 +        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
 +                             num_cpu, vmstate_extioi_core, ExtIOICore),
 +        VMSTATE_UINT32(features, LoongArchExtIOICommonState),
 +        VMSTATE_UINT32(status, LoongArchExtIOICommonState),
          VMSTATE_END_OF_LIST()
      }
- };
++    /* Add PCH PIC node */
- static Property extioi_properties[] = {
++    fdt_add_pch_pic_node(lams, &eiointc_phandle, &pch_pic_phandle);
--    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
++
--    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
+     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
--                    EXTIOI_HAS_VIRT_EXTENSION, 0),
+     start   =  num;
-+    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
+     num = EXTIOI_IRQS - start;
-+    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
+diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
-+                    features, EXTIOI_HAS_VIRT_EXTENSION, 0),
+index XXXXXXX..XXXXXXX 100644
-     DEFINE_PROP_END_OF_LIST(),
+--- a/include/hw/pci-host/ls7a.h
- };
++++ b/include/hw/pci-host/ls7a.h
+@@ -XXX,XX +XXX,XX @@
  #define VIRT_PCH_REG_BASE        0x10000000UL
  #define VIRT_IOAPIC_REG_BASE     (VIRT_PCH_REG_BASE)
  #define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
 +#define VIRT_PCH_REG_SIZE        0x400
  /*
   * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
 --
-.43.5
+.25.1

-[PULL 04/18] hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
+[PULL v2 13/17] hw/loongarch: fdt adds pch_msi Controller
-With pic vmstate, rename structure name vmstate_loongarch_pch_pic with
+fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'.
 vmstate_loongarch_pic_common, and with pic property rename
 loongarch_pch_pic_properties with loongarch_pic_common_properties.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+See:
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c
 https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.yang@flygoat.com
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-14-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++--------------
+ hw/loongarch/virt.c        | 33 ++++++++++++++++++++++++++++++++-
-file changed, 32 insertions(+), 20 deletions(-)
+ include/hw/pci-host/ls7a.h |  1 +
 files changed, 33 insertions(+), 1 deletion(-)
-diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pch_pic.c
+--- a/hw/loongarch/virt.c
-+++ b/hw/intc/loongarch_pch_pic.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_pch_pic_node(LoongArchMachineState *lams,
-     s->int_polarity = 0x0;
+     g_free(nodename);
  }
-+static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
++static void fdt_add_pch_msi_node(LoongArchMachineState *lams,
 +                                 uint32_t *eiointc_phandle,
 +                                 uint32_t *pch_msi_phandle)
 +{
-+    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
++    MachineState *ms = MACHINE(lams);
 +    char *nodename;
 +    hwaddr pch_msi_base = VIRT_PCH_MSI_ADDR_LOW;
 +    hwaddr pch_msi_size = VIRT_PCH_MSI_SIZE;
 +
-+    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
++    *pch_msi_phandle = qemu_fdt_alloc_phandle(ms->fdt);
-+        error_setg(errp, "Invalid 'pic_irq_num'");
++    nodename = g_strdup_printf("/msi@%" PRIx64, pch_msi_base);
-+        return;
++    qemu_fdt_add_subnode(ms->fdt, nodename);
-+    }
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *pch_msi_phandle);
 +    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
 +                            "loongson,pch-msi-1.0");
 +    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg",
 +                           0, pch_msi_base,
 +                           0, pch_msi_size);
 +    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
 +                          *eiointc_phandle);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-base-vec",
 +                          VIRT_PCH_PIC_IRQ_NUM);
 +    qemu_fdt_setprop_cell(ms->fdt, nodename, "loongson,msi-num-vecs",
 +                          EXTIOI_IRQS - VIRT_PCH_PIC_IRQ_NUM);
 +    g_free(nodename);
 +}
 +
- static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+ static void fdt_add_flash_node(LoongArchMachineState *lams)
  {
-     LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
+     MachineState *ms = MACHINE(lams);
-     SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
-+    Error *local_err = NULL;
+     CPULoongArchState *env;
+     CPUState *cpu_state;
--    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
+     int cpu, pin, i, start, num;
--        error_setg(errp, "Invalid 'pic_irq_num'");
+-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle;
-+    loongarch_pic_common_realize(dev, &local_err);
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
-+    if (local_err) {
-+        error_propagate(errp, local_err);
+     /*
-         return;
+      * The connection of interrupts:
@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
                                qdev_get_gpio_in(extioi, i + start));
      }
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
++    /* Add PCH MSI node */
++    fdt_add_pch_msi_node(lams, &eiointc_phandle, &pch_msi_phandle);
 +
      loongarch_devices_init(pch_pic, lams);
  }
--static Property loongarch_pch_pic_properties[] = {
+diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
--    DEFINE_PROP_UINT32("pch_pic_irq_num",  LoongArchPCHPIC, irq_num, 0),
+index XXXXXXX..XXXXXXX 100644
-+static Property loongarch_pic_common_properties[] = {
+--- a/include/hw/pci-host/ls7a.h
-+    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
++++ b/include/hw/pci-host/ls7a.h
-     DEFINE_PROP_END_OF_LIST(),
+@@ -XXX,XX +XXX,XX @@
- };
+ #define VIRT_IOAPIC_REG_BASE     (VIRT_PCH_REG_BASE)
+ #define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
--static const VMStateDescription vmstate_loongarch_pch_pic = {
+ #define VIRT_PCH_REG_SIZE        0x400
--    .name = TYPE_LOONGARCH_PCH_PIC,
++#define VIRT_PCH_MSI_SIZE        0x8
-+static const VMStateDescription vmstate_loongarch_pic_common = {
-+    .name = "loongarch_pch_pic",
+ /*
-     .version_id = 1,
+  * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
      .minimum_version_id = 1,
      .fields = (const VMStateField[]) {
 -        VMSTATE_UINT64(int_mask, LoongArchPCHPIC),
 -        VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intedge, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intclr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC),
 -        VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC),
 -        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64),
 -        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64),
 -        VMSTATE_UINT64(last_intirr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intirr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intisr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(int_polarity, LoongArchPCHPIC),
 +        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
 +        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
 +        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
          VMSTATE_END_OF_LIST()
      }
  };
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
      dc->realize = loongarch_pch_pic_realize;
      device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
 -    dc->vmsd = &vmstate_loongarch_pch_pic;
 -    device_class_set_props(dc, loongarch_pch_pic_properties);
 +    dc->vmsd = &vmstate_loongarch_pic_common;
 +    device_class_set_props(dc, loongarch_pic_common_properties);
  }
  static const TypeInfo loongarch_pch_pic_info = {
 --
-.43.5
+.25.1

-[PULL 07/18] hw/intc/loongarch_pch: Add pre_save and post_load interfaces
+[PULL v2 14/17] hw/loongarch: fdt adds pcie irq_map node
-Add vmstate pre_save and post_load interfaces, which can be used
+This patch adds pcie irq_map node for FDT.
 by pic kvm driver in future.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-15-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pic_common.c         | 26 ++++++++++++++++++++++++++
+ hw/loongarch/virt.c | 73 ++++++++++++++++++++++++++++++++++++++++++---
- include/hw/intc/loongarch_pic_common.h |  2 ++
+file changed, 69 insertions(+), 4 deletions(-)
 files changed, 28 insertions(+)
-diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pic_common.c
+--- a/hw/loongarch/virt.c
-+++ b/hw/intc/loongarch_pic_common.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_fw_cfg_node(const LoongArchMachineState *lams)
- #include "hw/qdev-properties.h"
+     g_free(nodename);
- #include "migration/vmstate.h"
+ }
-+static int loongarch_pic_pre_save(void *opaque)
+-static void fdt_add_pcie_node(const LoongArchMachineState *lams)
 +static void fdt_add_pcie_irq_map_node(const LoongArchMachineState *lams,
 +                                      char *nodename,
 +                                      uint32_t *pch_pic_phandle)
 +{
-+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
++    int pin, dev;
-+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
++    uint32_t irq_map_stride = 0;
 +    uint32_t full_irq_map[GPEX_NUM_IRQS *GPEX_NUM_IRQS * 10] = {};
 +    uint32_t *irq_map = full_irq_map;
 +    const MachineState *ms = MACHINE(lams);
 +
-+    if (lpcc->pre_save) {
++    /* This code creates a standard swizzle of interrupts such that
-+        return lpcc->pre_save(s);
++     * each device's first interrupt is based on it's PCI_SLOT number.
 +     * (See pci_swizzle_map_irq_fn())
 +     *
 +     * We only need one entry per interrupt in the table (not one per
 +     * possible slot) seeing the interrupt-map-mask will allow the table
 +     * to wrap to any number of devices.
 +     */
 +
 +    for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
 +        int devfn = dev * 0x8;
 +
 +        for (pin = 0; pin  < GPEX_NUM_IRQS; pin++) {
 +            int irq_nr = 16 + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
 +            int i = 0;
 +
 +            /* Fill PCI address cells */
 +            irq_map[i] = cpu_to_be32(devfn << 8);
 +            i += 3;
 +
 +            /* Fill PCI Interrupt cells */
 +            irq_map[i] = cpu_to_be32(pin + 1);
 +            i += 1;
 +
 +            /* Fill interrupt controller phandle and cells */
 +            irq_map[i++] = cpu_to_be32(*pch_pic_phandle);
 +            irq_map[i++] = cpu_to_be32(irq_nr);
 +
 +            if (!irq_map_stride) {
 +                irq_map_stride = i;
 +            }
 +            irq_map += irq_map_stride;
 +        }
 +    }
 +
-+    return 0;
++
 +    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map,
 +                     GPEX_NUM_IRQS * GPEX_NUM_IRQS *
 +                     irq_map_stride * sizeof(uint32_t));
 +    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask",
 +                     0x1800, 0, 0, 0x7);
 +}
 +
-+static int loongarch_pic_post_load(void *opaque, int version_id)
++static void fdt_add_pcie_node(const LoongArchMachineState *lams,
-+{
++                              uint32_t *pch_pic_phandle,
-+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
++                              uint32_t *pch_msi_phandle)
-+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+ {
      char *nodename;
      hwaddr base_mmio = VIRT_PCI_MEM_BASE;
@@ -XXX,XX +XXX,XX @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
 , base_pio, 2, size_pio,
 , FDT_PCI_RANGE_MMIO, 2, base_mmio,
 , base_mmio, 2, size_mmio);
 +    qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map",
 +                           0, *pch_msi_phandle, 0, 0x10000);
 +
-+    if (lpcc->post_load) {
++    fdt_add_pcie_irq_map_node(lams, nodename, pch_pic_phandle);
 +        return lpcc->post_load(s, version_id);
 +    }
 +
-+    return 0;
+     g_free(nodename);
-+}
+ }
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
      return dev;
  }
 -static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *lams)
 +static void loongarch_devices_init(DeviceState *pch_pic,
 +                                   LoongArchMachineState *lams,
 +                                   uint32_t *pch_pic_phandle,
 +                                   uint32_t *pch_msi_phandle)
  {
      MachineClass *mc = MACHINE_GET_CLASS(lams);
      DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
          gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
      }
 +    /* Add pcie node */
 +    fdt_add_pcie_node(lams, pch_pic_phandle, pch_msi_phandle);
 +
- static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
+     serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
- {
+                    qdev_get_gpio_in(pch_pic,
-     LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+                                     VIRT_UART_IRQ - VIRT_GSI_BASE),
-@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
+@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
-     .name = "loongarch_pch_pic",
+     /* Add PCH MSI node */
-     .version_id = 1,
+     fdt_add_pch_msi_node(lams, &eiointc_phandle, &pch_msi_phandle);
-     .minimum_version_id = 1,
-+    .pre_save  = loongarch_pic_pre_save,
+-    loongarch_devices_init(pch_pic, lams);
-+    .post_load = loongarch_pic_post_load,
++    loongarch_devices_init(pch_pic, lams, &pch_pic_phandle, &pch_msi_phandle);
-     .fields = (const VMStateField[]) {
+ }
-         VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
-         VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
+ static void loongarch_firmware_init(LoongArchMachineState *lams)
-diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
+@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
-index XXXXXXX..XXXXXXX 100644
+     lams->powerdown_notifier.notify = virt_powerdown_req;
---- a/include/hw/intc/loongarch_pic_common.h
+     qemu_register_powerdown_notifier(&lams->powerdown_notifier);
-+++ b/include/hw/intc/loongarch_pic_common.h
-@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass {
+-    fdt_add_pcie_node(lams);
-     SysBusDeviceClass parent_class;
+     /*
+      * Since lowmem region starts from 0 and Linux kernel legacy start address
-     DeviceRealize parent_realize;
+      * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 +    int (*pre_save)(LoongArchPICCommonState *s);
 +    int (*post_load)(LoongArchPICCommonState *s, int version_id);
  };
  #endif  /* HW_LOONGARCH_PIC_COMMON_H */
 --
-.43.5
+.25.1

-[PULL 03/18] hw/intc/loongarch_pch: Merge instance_init() into realize()
+[PULL v2 15/17] hw/loongarch: fdt remove unused irqchip node
-Memory region is created in instance_init(), merge it into function
+This patch removes the unused fdt irqchip node.
 realize(). There is no special class_init() for loongarch_pch object.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-16-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pch_pic.c | 15 ++++-----------
+ hw/loongarch/virt.c | 31 +------------------------------
-file changed, 4 insertions(+), 11 deletions(-)
+file changed, 1 insertion(+), 30 deletions(-)
-diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pch_pic.c
+--- a/hw/loongarch/virt.c
-+++ b/hw/intc/loongarch_pch_pic.c
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams,
- static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+     g_free(nodename);
- {
+ }
-     LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
-+    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
+-static void fdt_add_irqchip_node(LoongArchMachineState *lams)
+-{
-     if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
+-    MachineState *ms = MACHINE(lams);
-         error_setg(errp, "Invalid 'pic_irq_num'");
+-    char *nodename;
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+-    uint32_t irqchip_phandle;
+-
-     qdev_init_gpio_out(dev, s->parent_irq, s->irq_num);
+-    irqchip_phandle = qemu_fdt_alloc_phandle(ms->fdt);
-     qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);
+-    qemu_fdt_setprop_cell(ms->fdt, "/", "interrupt-parent", irqchip_phandle);
 -
 -    nodename = g_strdup_printf("/intc@%lx", VIRT_IOAPIC_REG_BASE);
 -    qemu_fdt_add_subnode(ms->fdt, nodename);
 -    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 3);
 -    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
 -    qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2);
 -    qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2);
 -    qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0);
 -
 -    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
 -                            "loongarch,ls7a");
 -
 -    qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
 -                                 2, VIRT_IOAPIC_REG_BASE,
 -                                 2, PCH_PIC_ROUTE_ENTRY_OFFSET);
 -
 -    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", irqchip_phandle);
 -    g_free(nodename);
 -}
 -
--static void loongarch_pch_pic_init(Object *obj)
+ static void fdt_add_memory_node(MachineState *ms,
--{
+                                 uint64_t base, uint64_t size, int node_id)
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj);
+ {
--    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
--
--    memory_region_init_io(&s->iomem32_low, obj,
+     /* Initialize the IO interrupt subsystem */
-+    memory_region_init_io(&s->iomem32_low, OBJECT(dev),
+     loongarch_irq_init(lams);
-                           &loongarch_pch_pic_reg32_low_ops,
+-    fdt_add_irqchip_node(lams);
-                           s, PCH_PIC_NAME(.reg32_part1), 0x100);
+-    platform_bus_add_all_fdt_nodes(machine->fdt, "/intc",
--    memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops,
++    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-+    memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops,
+                                    VIRT_PLATFORM_BUS_BASEADDRESS,
-                           s, PCH_PIC_NAME(.reg8), 0x2a0);
+                                    VIRT_PLATFORM_BUS_SIZE,
--    memory_region_init_io(&s->iomem32_high, obj,
+                                    VIRT_PLATFORM_BUS_IRQ);
 +    memory_region_init_io(&s->iomem32_high, OBJECT(dev),
                            &loongarch_pch_pic_reg32_high_ops,
                            s, PCH_PIC_NAME(.reg32_part2), 0xc60);
      sysbus_init_mmio(sbd, &s->iomem32_low);
@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = {
      .name          = TYPE_LOONGARCH_PCH_PIC,
      .parent        = TYPE_SYS_BUS_DEVICE,
      .instance_size = sizeof(LoongArchPCHPIC),
 -    .instance_init = loongarch_pch_pic_init,
      .class_init    = loongarch_pch_pic_class_init,
  };
 --
-.43.5
+.25.1

-[PULL 08/18] hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic
+[PULL v2 16/17] hw/loongarch: Add cells missing from uart node
-Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and
+uart node need interrupts and interrupt-parent cells.
 replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON
 separately. Also remove unnecessary header files.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-17-gaosong@loongson.cn>
 ---
- hw/intc/loongarch_pch_pic.c         | 24 ++++++++++--------------
+ hw/loongarch/virt.c | 9 +++++++--
- hw/loongarch/virt.c                 |  2 +-
+file changed, 7 insertions(+), 2 deletions(-)
  include/hw/intc/loongarch_pch_pic.h |  4 ----
 files changed, 11 insertions(+), 19 deletions(-)
-diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/loongarch_pch_pic.c
-+++ b/hw/intc/loongarch_pch_pic.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qemu/bitops.h"
--#include "hw/sysbus.h"
--#include "hw/loongarch/virt.h"
--#include "hw/pci-host/ls7a.h"
- #include "hw/irq.h"
- #include "hw/intc/loongarch_pch_pic.h"
--#include "hw/qdev-properties.h"
--#include "migration/vmstate.h"
- #include "trace.h"
- #include "qapi/error.h"
--static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
-+static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
-+                               int level)
- {
-     uint64_t val;
-     int irq;
-@@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
- static void pch_pic_irq_handler(void *opaque, int irq, int level)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint64_t mask = 1ULL << irq;
-     assert(irq < s->irq_num);
-@@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
- static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
-                                             unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint64_t val = 0;
-     uint32_t offset = addr & 0xfff;
-@@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)
- static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
-                                          uint64_t value, unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint32_t offset, old_valid, data = (uint32_t)value;
-     uint64_t old, int_mask;
-     offset = addr & 0xfff;
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
- static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
-                                         unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint64_t val = 0;
-     uint32_t offset = addr & 0xfff;
-@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
- static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
-                                      uint64_t value, unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint32_t offset, data = (uint32_t)value;
-     offset = addr & 0xfff;
-@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
- static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
-                                         unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     uint64_t val = 0;
-     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
-     int64_t offset_tmp;
-@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
- static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
-                                      uint64_t data, unsigned size)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
-     int32_t offset_tmp;
-     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
-@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {
- static void loongarch_pch_pic_reset(DeviceState *d)
- {
--    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
-+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
-     int i;
-     s->int_mask = -1;
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_rtc_node(LoongArchMachineState *lams)
-     /* Add Extend I/O Interrupt Controller node */
+     g_free(nodename);
-     fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+ }
--    pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+-static void fdt_add_uart_node(LoongArchMachineState *lams)
-+    pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
++static void fdt_add_uart_node(LoongArchMachineState *lams,
-     num = VIRT_PCH_PIC_IRQ_NUM;
++                              uint32_t *pch_pic_phandle)
-     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
+ {
-     d = SYS_BUS_DEVICE(pch_pic);
+     char *nodename;
-diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+     hwaddr base = VIRT_UART_BASE;
-index XXXXXXX..XXXXXXX 100644
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_uart_node(LoongArchMachineState *lams)
---- a/include/hw/intc/loongarch_pch_pic.h
+     qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size);
-+++ b/include/hw/intc/loongarch_pch_pic.h
+     qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000);
-@@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass {
+     qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
-     DeviceRealize parent_realize;
++    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
- };
++                           VIRT_UART_IRQ - VIRT_GSI_BASE, 0x4);
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
--#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
++                          *pch_pic_phandle);
--typedef struct LoongArchPICCommonState LoongArchPCHPIC;
+     g_free(nodename);
--#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
+ }
--
- #endif /* HW_LOONGARCH_PCH_PIC_H */
+@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic,
                     qdev_get_gpio_in(pch_pic,
                                      VIRT_UART_IRQ - VIRT_GSI_BASE),
 , serial_hd(0), DEVICE_LITTLE_ENDIAN);
 -    fdt_add_uart_node(lams);
 +    fdt_add_uart_node(lams, pch_pic_phandle);
      /* Network init */
      pci_init_nic_devices(pci_bus, mc->default_nic);
 --
-.43.5
+.25.1

-[PULL 02/18] include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
+[PULL v2 17/17] hw/loongarch: Add cells missing from rtc node
-Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h
+rtc node need interrupts and interrupt-parent cells.
 to file loongarch_pic_common.h, and rename structure name with
 LoongArchPICCommonState.
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240426091551.2397867-18-gaosong@loongson.cn>
 ---
- include/hw/intc/loongarch_pch_pic.h    | 27 +------------------------
+ hw/loongarch/virt.c | 12 +++++++++---
- include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++
+file changed, 9 insertions(+), 3 deletions(-)
 files changed, 29 insertions(+), 26 deletions(-)
-diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/intc/loongarch_pch_pic.h
+--- a/hw/loongarch/virt.c
-+++ b/include/hw/intc/loongarch_pch_pic.h
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_flash_node(LoongArchMachineState *lams)
+     g_free(nodename);
- #include "hw/intc/loongarch_pic_common.h"
+ }
-+#define LoongArchPCHPIC LoongArchPICCommonState
+-static void fdt_add_rtc_node(LoongArchMachineState *lams)
- #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
++static void fdt_add_rtc_node(LoongArchMachineState *lams,
- #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
++                             uint32_t *pch_pic_phandle)
- OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+ {
+     char *nodename;
--struct LoongArchPCHPIC {
+     hwaddr base = VIRT_RTC_REG_BASE;
--    SysBusDevice parent_obj;
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_rtc_node(LoongArchMachineState *lams)
--    qemu_irq parent_irq[64];
--    uint64_t int_mask; /*0x020 interrupt mask register*/
+     nodename = g_strdup_printf("/rtc@%" PRIx64, base);
--    uint64_t htmsi_en; /*0x040 1=msi*/
+     qemu_fdt_add_subnode(ms->fdt, nodename);
--    uint64_t intedge; /*0x060 edge=1 level  =0*/
+-    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "loongson,ls7a-rtc");
--    uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
++    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
--    uint64_t auto_crtl0; /*0x0c0*/
++                            "loongson,ls7a-rtc");
--    uint64_t auto_crtl1; /*0x0e0*/
+     qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size);
--    uint64_t last_intirr;    /* edge detection */
++    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
--    uint64_t intirr; /* 0x380 interrupt request register */
++                           VIRT_RTC_IRQ - VIRT_GSI_BASE , 0x4);
--    uint64_t intisr; /* 0x3a0 interrupt service register */
++    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
--    /*
++                          *pch_pic_phandle);
--     * 0x3e0 interrupt level polarity selection
+     g_free(nodename);
--     * register 0 for high level trigger
+ }
--     */
--    uint64_t int_polarity;
+@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic,
--
+     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
--    uint8_t route_entry[64]; /*0x100 - 0x138*/
+                          qdev_get_gpio_in(pch_pic,
--    uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
+                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
--
+-    fdt_add_rtc_node(lams);
--    MemoryRegion iomem32_low;
++    fdt_add_rtc_node(lams, pch_pic_phandle);
--    MemoryRegion iomem32_high;
--    MemoryRegion iomem8;
+     /* acpi ged */
--    unsigned int irq_num;
+     lams->acpi_ged = create_acpi_ged(pch_pic, lams);
 -};
  #endif /* HW_LOONGARCH_PCH_PIC_H */
 diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_pic_common.h
 +++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
  #define STATUS_HI_START                 0x4
  #define POL_LO_START                    0x40
  #define POL_HI_START                    0x44
 +
 +struct LoongArchPICCommonState {
 +    SysBusDevice parent_obj;
 +
 +    qemu_irq parent_irq[64];
 +    uint64_t int_mask;        /* 0x020 interrupt mask register */
 +    uint64_t htmsi_en;        /* 0x040 1=msi */
 +    uint64_t intedge;         /* 0x060 edge=1 level=0 */
 +    uint64_t intclr;          /* 0x080 clean edge int, set 1 clean, 0 noused */
 +    uint64_t auto_crtl0;      /* 0x0c0 */
 +    uint64_t auto_crtl1;      /* 0x0e0 */
 +    uint64_t last_intirr;     /* edge detection */
 +    uint64_t intirr;          /* 0x380 interrupt request register */
 +    uint64_t intisr;          /* 0x3a0 interrupt service register */
 +    /*
 +     * 0x3e0 interrupt level polarity selection
 +     * register 0 for high level trigger
 +     */
 +    uint64_t int_polarity;
 +
 +    uint8_t route_entry[64];  /* 0x100 - 0x138 */
 +    uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
 +
 +    MemoryRegion iomem32_low;
 +    MemoryRegion iomem32_high;
 +    MemoryRegion iomem8;
 +    unsigned int irq_num;
 +};
  #endif  /* HW_LOONGARCH_PIC_COMMON_H */
 --
-.43.5
+.25.1

The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:

Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213

for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b:

hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800)

----------------------------------------------------------------
pull-loongarch-20241213

----------------------------------------------------------------
Bibo Mao (8):
      include: Add loongarch_pic_common header file
      include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
      hw/intc/loongarch_pch: Merge instance_init() into realize()
      hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
      hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
      hw/intc/loongarch_pch: Inherit from loongarch_pic_common
      hw/intc/loongarch_pch: Add pre_save and post_load interfaces
      hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic

hw/intc/loongarch_pch_pic.c            | 106 +++++++++++----------------------
 hw/intc/loongarch_pic_common.c         |  97 ++++++++++++++++++++++++++++++
 hw/intc/meson.build                    |   2 +-
 hw/loongarch/virt.c                    |   2 +-
 include/hw/intc/loongarch_pch_pic.h    |  70 +++++-----------------
 include/hw/intc/loongarch_pic_common.h |  82 +++++++++++++++++++++++++
 6 files changed, 230 insertions(+), 129 deletions(-)
 create mode 100644 hw/intc/loongarch_pic_common.c
 create mode 100644 include/hw/intc/loongarch_pic_common.h

Add common header file hw/intc/loongarch_pic_common.h, and move
some macro definition from hw/intc/loongarch_pch_pic.h to the common
header file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_pch_pic.h    | 36 +++-------------------
 include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 31 deletions(-)
 create mode 100644 include/hw/intc/loongarch_pic_common.h

diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
  * Copyright (c) 2021 Loongson Technology Corporation Limited
  */
 
-#include "hw/sysbus.h"
+#ifndef HW_LOONGARCH_PCH_PIC_H
+#define HW_LOONGARCH_PCH_PIC_H
+
+#include "hw/intc/loongarch_pic_common.h"
 
 #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
 #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 
-#define PCH_PIC_INT_ID_VAL              0x7000000UL
-#define PCH_PIC_INT_ID_VER              0x1UL
-
-#define PCH_PIC_INT_ID_LO               0x00
-#define PCH_PIC_INT_ID_HI               0x04
-#define PCH_PIC_INT_MASK_LO             0x20
-#define PCH_PIC_INT_MASK_HI             0x24
-#define PCH_PIC_HTMSI_EN_LO             0x40
-#define PCH_PIC_HTMSI_EN_HI             0x44
-#define PCH_PIC_INT_EDGE_LO             0x60
-#define PCH_PIC_INT_EDGE_HI             0x64
-#define PCH_PIC_INT_CLEAR_LO            0x80
-#define PCH_PIC_INT_CLEAR_HI            0x84
-#define PCH_PIC_AUTO_CTRL0_LO           0xc0
-#define PCH_PIC_AUTO_CTRL0_HI           0xc4
-#define PCH_PIC_AUTO_CTRL1_LO           0xe0
-#define PCH_PIC_AUTO_CTRL1_HI           0xe4
-#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
-#define PCH_PIC_ROUTE_ENTRY_END         0x13f
-#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
-#define PCH_PIC_HTMSI_VEC_END           0x23f
-#define PCH_PIC_INT_STATUS_LO           0x3a0
-#define PCH_PIC_INT_STATUS_HI           0x3a4
-#define PCH_PIC_INT_POL_LO              0x3e0
-#define PCH_PIC_INT_POL_HI              0x3e4
-
-#define STATUS_LO_START                 0
-#define STATUS_HI_START                 0x4
-#define POL_LO_START                    0x40
-#define POL_HI_START                    0x44
 struct LoongArchPCHPIC {
     SysBusDevice parent_obj;
     qemu_irq parent_irq[64];
@@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC {
     MemoryRegion iomem8;
     unsigned int irq_num;
 };
+#endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 7A1000 I/O interrupt controller definitions
+ * Copyright (c) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_PIC_COMMON_H
+#define HW_LOONGARCH_PIC_COMMON_H
+
+#include "hw/pci-host/ls7a.h"
+#include "hw/sysbus.h"
+
+#define PCH_PIC_INT_ID_VAL              0x7000000UL
+#define PCH_PIC_INT_ID_VER              0x1UL
+#define PCH_PIC_INT_ID_LO               0x00
+#define PCH_PIC_INT_ID_HI               0x04
+#define PCH_PIC_INT_MASK_LO             0x20
+#define PCH_PIC_INT_MASK_HI             0x24
+#define PCH_PIC_HTMSI_EN_LO             0x40
+#define PCH_PIC_HTMSI_EN_HI             0x44
+#define PCH_PIC_INT_EDGE_LO             0x60
+#define PCH_PIC_INT_EDGE_HI             0x64
+#define PCH_PIC_INT_CLEAR_LO            0x80
+#define PCH_PIC_INT_CLEAR_HI            0x84
+#define PCH_PIC_AUTO_CTRL0_LO           0xc0
+#define PCH_PIC_AUTO_CTRL0_HI           0xc4
+#define PCH_PIC_AUTO_CTRL1_LO           0xe0
+#define PCH_PIC_AUTO_CTRL1_HI           0xe4
+#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
+#define PCH_PIC_ROUTE_ENTRY_END         0x13f
+#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
+#define PCH_PIC_HTMSI_VEC_END           0x23f
+#define PCH_PIC_INT_STATUS_LO           0x3a0
+#define PCH_PIC_INT_STATUS_HI           0x3a4
+#define PCH_PIC_INT_POL_LO              0x3e0
+#define PCH_PIC_INT_POL_HI              0x3e4
+
+#define STATUS_LO_START                 0
+#define STATUS_HI_START                 0x4
+#define POL_LO_START                    0x40
+#define POL_HI_START                    0x44
+#endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h
to file loongarch_pic_common.h, and rename structure name with
LoongArchPICCommonState.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_pch_pic.h    | 27 +------------------------
 include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++
 2 files changed, 29 insertions(+), 26 deletions(-)

diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_pic_common.h"
 
+#define LoongArchPCHPIC LoongArchPICCommonState
 #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
 #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 
-struct LoongArchPCHPIC {
-    SysBusDevice parent_obj;
-    qemu_irq parent_irq[64];
-    uint64_t int_mask; /*0x020 interrupt mask register*/
-    uint64_t htmsi_en; /*0x040 1=msi*/
-    uint64_t intedge; /*0x060 edge=1 level  =0*/
-    uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
-    uint64_t auto_crtl0; /*0x0c0*/
-    uint64_t auto_crtl1; /*0x0e0*/
-    uint64_t last_intirr;    /* edge detection */
-    uint64_t intirr; /* 0x380 interrupt request register */
-    uint64_t intisr; /* 0x3a0 interrupt service register */
-    /*
-     * 0x3e0 interrupt level polarity selection
-     * register 0 for high level trigger
-     */
-    uint64_t int_polarity;
-
-    uint8_t route_entry[64]; /*0x100 - 0x138*/
-    uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
-
-    MemoryRegion iomem32_low;
-    MemoryRegion iomem32_high;
-    MemoryRegion iomem8;
-    unsigned int irq_num;
-};
 #endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
 #define STATUS_HI_START                 0x4
 #define POL_LO_START                    0x40
 #define POL_HI_START                    0x44
+
+struct LoongArchPICCommonState {
+    SysBusDevice parent_obj;
+
+    qemu_irq parent_irq[64];
+    uint64_t int_mask;        /* 0x020 interrupt mask register */
+    uint64_t htmsi_en;        /* 0x040 1=msi */
+    uint64_t intedge;         /* 0x060 edge=1 level=0 */
+    uint64_t intclr;          /* 0x080 clean edge int, set 1 clean, 0 noused */
+    uint64_t auto_crtl0;      /* 0x0c0 */
+    uint64_t auto_crtl1;      /* 0x0e0 */
+    uint64_t last_intirr;     /* edge detection */
+    uint64_t intirr;          /* 0x380 interrupt request register */
+    uint64_t intisr;          /* 0x3a0 interrupt service register */
+    /*
+     * 0x3e0 interrupt level polarity selection
+     * register 0 for high level trigger
+     */
+    uint64_t int_polarity;
+
+    uint8_t route_entry[64];  /* 0x100 - 0x138 */
+    uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
+
+    MemoryRegion iomem32_low;
+    MemoryRegion iomem32_high;
+    MemoryRegion iomem8;
+    unsigned int irq_num;
+};
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Memory region is created in instance_init(), merge it into function
realize(). There is no special class_init() for loongarch_pch object.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

With pic vmstate, rename structure name vmstate_loongarch_pch_pic with
vmstate_loongarch_pic_common, and with pic property rename
loongarch_pch_pic_properties with loongarch_pic_common_properties.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++--------------
 1 file changed, 32 insertions(+), 20 deletions(-)

Move some common functions to file loongarch_pic_common.c, the common
functions include loongarch_pic_common_realize(), property structure
loongarch_pic_common_properties and vmstate structure
vmstate_loongarch_pic_common.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c    | 37 +-----------------------------
 hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 36 deletions(-)
 create mode 100644 hw/intc/loongarch_pic_common.c

Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object,
it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has
its own realize() function.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c            | 38 ++++++++++++--------------
 hw/intc/loongarch_pic_common.c         | 32 +++++++++++++++++++++-
 hw/intc/meson.build                    |  2 +-
 include/hw/intc/loongarch_pch_pic.h    | 21 +++++++++++---
 include/hw/intc/loongarch_pic_common.h | 10 +++++++
 5 files changed, 77 insertions(+), 26 deletions(-)

diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
     s->int_polarity = 0x0;
 }
 
-#include "loongarch_pic_common.c"
-static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+static void loongarch_pic_realize(DeviceState *dev, Error **errp)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
-    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+    LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     Error *local_err = NULL;
 
-    loongarch_pic_common_realize(dev, &local_err);
+    lpc->parent_realize(dev, &local_err);
     if (local_err) {
         error_propagate(errp, local_err);
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
 
 }
 
-static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
+static void loongarch_pic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
 
-    dc->realize = loongarch_pch_pic_realize;
     device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
-    dc->vmsd = &vmstate_loongarch_pic_common;
-    device_class_set_props(dc, loongarch_pic_common_properties);
+    device_class_set_parent_realize(dc, loongarch_pic_realize,
+                                    &lpc->parent_realize);
 }
 
-static const TypeInfo loongarch_pch_pic_info = {
-    .name          = TYPE_LOONGARCH_PCH_PIC,
-    .parent        = TYPE_SYS_BUS_DEVICE,
-    .instance_size = sizeof(LoongArchPCHPIC),
-    .class_init    = loongarch_pch_pic_class_init,
+static const TypeInfo loongarch_pic_types[] = {
+   {
+        .name               = TYPE_LOONGARCH_PIC,
+        .parent             = TYPE_LOONGARCH_PIC_COMMON,
+        .instance_size      = sizeof(LoongarchPICState),
+        .class_size         = sizeof(LoongarchPICClass),
+        .class_init         = loongarch_pic_class_init,
+    }
 };
 
-static void loongarch_pch_pic_register_types(void)
-{
-    type_register_static(&loongarch_pch_pic_info);
-}
-
-type_init(loongarch_pch_pic_register_types)
+DEFINE_TYPES(loongarch_pic_types)
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pic_common.c
+++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
  * Copyright (C) 2024 Loongson Technology Corporation Limited
  */
 
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/intc/loongarch_pic_common.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+
 static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
 {
-    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
 
     if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
         error_setg(errp, "Invalid 'pic_irq_num'");
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
         VMSTATE_END_OF_LIST()
     }
 };
+
+static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
+
+    device_class_set_parent_realize(dc, loongarch_pic_common_realize,
+                                    &lpcc->parent_realize);
+    device_class_set_props(dc, loongarch_pic_common_properties);
+    dc->vmsd = &vmstate_loongarch_pic_common;
+}
+
+static const TypeInfo loongarch_pic_common_types[] = {
+    {
+        .name               = TYPE_LOONGARCH_PIC_COMMON,
+        .parent             = TYPE_SYS_BUS_DEVICE,
+        .instance_size      = sizeof(LoongArchPICCommonState),
+        .class_size         = sizeof(LoongArchPICCommonClass),
+        .class_init         = loongarch_pic_common_class_init,
+        .abstract           = true,
+    }
+};
+
+DEFINE_TYPES(loongarch_pic_common_types)
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
 specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
 specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
-specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
+specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_pic_common.h"
 
-#define LoongArchPCHPIC LoongArchPICCommonState
-#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
-#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+#define TYPE_LOONGARCH_PIC  "loongarch_pic"
+#define PCH_PIC_NAME(name)  TYPE_LOONGARCH_PIC#name
+OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
+
+struct LoongarchPICState {
+    LoongArchPICCommonState parent_obj;
+};
+
+struct LoongarchPICClass {
+    LoongArchPICCommonClass parent_class;
+
+    DeviceRealize parent_realize;
+};
+
+#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
+typedef struct LoongArchPICCommonState LoongArchPCHPIC;
+#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
 
 #endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
 #define POL_LO_START                    0x40
 #define POL_HI_START                    0x44
 
+#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
+OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
+                    LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
+
 struct LoongArchPICCommonState {
     SysBusDevice parent_obj;
 
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState {
     MemoryRegion iomem8;
     unsigned int irq_num;
 };
+
+struct LoongArchPICCommonClass {
+    SysBusDeviceClass parent_class;
+
+    DeviceRealize parent_realize;
+};
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Add vmstate pre_save and post_load interfaces, which can be used
by pic kvm driver in future.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pic_common.c         | 26 ++++++++++++++++++++++++++
 include/hw/intc/loongarch_pic_common.h |  2 ++
 2 files changed, 28 insertions(+)

diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pic_common.c
+++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 
+static int loongarch_pic_pre_save(void *opaque)
+{
+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+    if (lpcc->pre_save) {
+        return lpcc->pre_save(s);
+    }
+
+    return 0;
+}
+
+static int loongarch_pic_post_load(void *opaque, int version_id)
+{
+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+    if (lpcc->post_load) {
+        return lpcc->post_load(s, version_id);
+    }
+
+    return 0;
+}
+
 static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
 {
     LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
     .name = "loongarch_pch_pic",
     .version_id = 1,
     .minimum_version_id = 1,
+    .pre_save  = loongarch_pic_pre_save,
+    .post_load = loongarch_pic_post_load,
     .fields = (const VMStateField[]) {
         VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
         VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass {
     SysBusDeviceClass parent_class;
 
     DeviceRealize parent_realize;
+    int (*pre_save)(LoongArchPICCommonState *s);
+    int (*post_load)(LoongArchPICCommonState *s, int version_id);
 };
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and
replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON
separately. Also remove unnecessary header files.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c         | 24 ++++++++++--------------
 hw/loongarch/virt.c                 |  2 +-
 include/hw/intc/loongarch_pch_pic.h |  4 ----
 3 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -XXX,XX +XXX,XX @@
 
 #include "qemu/osdep.h"
 #include "qemu/bitops.h"
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-#include "hw/pci-host/ls7a.h"
 #include "hw/irq.h"
 #include "hw/intc/loongarch_pch_pic.h"
-#include "hw/qdev-properties.h"
-#include "migration/vmstate.h"
 #include "trace.h"
 #include "qapi/error.h"
 
-static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
+static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
+                               int level)
 {
     uint64_t val;
     int irq;
@@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
 
 static void pch_pic_irq_handler(void *opaque, int irq, int level)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t mask = 1ULL << irq;
 
     assert(irq < s->irq_num);
@@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
 static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
                                             unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)
 static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
                                          uint64_t value, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint32_t offset, old_valid, data = (uint32_t)value;
     uint64_t old, int_mask;
     offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
 static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
                                         unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
 static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
                                      uint64_t value, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint32_t offset, data = (uint32_t)value;
     offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
 static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
                                         unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
     int64_t offset_tmp;
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
 static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
                                      uint64_t data, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     int32_t offset_tmp;
     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
 
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {
 
 static void loongarch_pch_pic_reset(DeviceState *d)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
     int i;
 
     s->int_mask = -1;
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     /* Add Extend I/O Interrupt Controller node */
     fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 
-    pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+    pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
     d = SYS_BUS_DEVICE(pch_pic);
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass {
     DeviceRealize parent_realize;
 };
 
-#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
-typedef struct LoongArchPICCommonState LoongArchPCHPIC;
-#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
-
 #endif /* HW_LOONGARCH_PCH_PIC_H */
-- 
2.43.5

Add common header file include/hw/intc/loongarch_extioi_common.h, and
move some macro definition from include/hw/intc/loongarch_extioi.h to
the common header file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 50 +------------------
 include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++
 2 files changed, 59 insertions(+), 49 deletions(-)
 create mode 100644 include/hw/intc/loongarch_extioi_common.h

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
  * Copyright (C) 2021 Loongson Technology Corporation Limited
  */
 
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-
 #ifndef LOONGARCH_EXTIOI_H
 #define LOONGARCH_EXTIOI_H
 
-#define LS3A_INTC_IP               8
-#define EXTIOI_IRQS                (256)
-#define EXTIOI_IRQS_BITMAP_SIZE    (256 / 8)
-/* irq from EXTIOI is routed to no more than 4 cpus */
-#define EXTIOI_CPUS                (4)
-/* map to ipnum per 32 irqs */
-#define EXTIOI_IRQS_IPMAP_SIZE     (256 / 32)
-#define EXTIOI_IRQS_COREMAP_SIZE   256
-#define EXTIOI_IRQS_NODETYPE_COUNT  16
-#define EXTIOI_IRQS_GROUP_COUNT    8
-
-#define APIC_OFFSET                  0x400
-#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
-
-#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
-#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
-#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
-#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
-#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
-#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
-#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
-#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
-#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
-#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
-#define EXTIOI_SIZE                  0x800
-
-#define EXTIOI_VIRT_BASE             (0x40000000)
-#define EXTIOI_VIRT_SIZE             (0x1000)
-#define EXTIOI_VIRT_FEATURES         (0x0)
-#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
-#define  EXTIOI_HAS_ENABLE_OPTION    (1)
-#define  EXTIOI_HAS_INT_ENCODE       (2)
-#define  EXTIOI_HAS_CPU_ENCODE       (3)
-#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
-                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
-                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
-#define EXTIOI_VIRT_CONFIG           (0x4)
-#define  EXTIOI_ENABLE               (1)
-#define  EXTIOI_ENABLE_INT_ENCODE    (2)
-#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
-#define EXTIOI_VIRT_COREMAP_START    (0x40)
-#define EXTIOI_VIRT_COREMAP_END      (0x240)
+#include "hw/intc/loongarch_extioi_common.h"
 
 typedef struct ExtIOICore {
     uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 3A5000 ext interrupt controller definitions
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef LOONGARCH_EXTIOI_COMMON_H
+#define LOONGARCH_EXTIOI_COMMON_H
+
+#include "hw/sysbus.h"
+#include "hw/loongarch/virt.h"
+
+#define LS3A_INTC_IP                 8
+#define EXTIOI_IRQS                  (256)
+#define EXTIOI_IRQS_BITMAP_SIZE      (256 / 8)
+/* irq from EXTIOI is routed to no more than 4 cpus */
+#define EXTIOI_CPUS                  (4)
+/* map to ipnum per 32 irqs */
+#define EXTIOI_IRQS_IPMAP_SIZE       (256 / 32)
+#define EXTIOI_IRQS_COREMAP_SIZE     256
+#define EXTIOI_IRQS_NODETYPE_COUNT   16
+#define EXTIOI_IRQS_GROUP_COUNT      8
+
+#define APIC_OFFSET                  0x400
+#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
+#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
+#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
+#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
+#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
+#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
+#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
+#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
+#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
+#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
+#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
+#define EXTIOI_SIZE                  0x800
+
+#define EXTIOI_VIRT_BASE             (0x40000000)
+#define EXTIOI_VIRT_SIZE             (0x1000)
+#define EXTIOI_VIRT_FEATURES         (0x0)
+#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
+#define  EXTIOI_HAS_ENABLE_OPTION    (1)
+#define  EXTIOI_HAS_INT_ENCODE       (2)
+#define  EXTIOI_HAS_CPU_ENCODE       (3)
+#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
+                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
+                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
+#define EXTIOI_VIRT_CONFIG           (0x4)
+#define  EXTIOI_ENABLE               (1)
+#define  EXTIOI_ENABLE_INT_ENCODE    (2)
+#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
+#define EXTIOI_VIRT_COREMAP_START    (0x40)
+#define EXTIOI_VIRT_COREMAP_END      (0x240)
+#endif /* LOONGARCH_EXTIOI_H */
-- 
2.43.5

Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h
to file loongarch_extioi_common.h.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 26 ----------------------
 include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++
 2 files changed, 27 insertions(+), 26 deletions(-)

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_extioi_common.h"
 
-typedef struct ExtIOICore {
-    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
-    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
-    qemu_irq parent_irq[LS3A_INTC_IP];
-} ExtIOICore;
-
 #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
-struct LoongArchExtIOI {
-    SysBusDevice parent_obj;
-    uint32_t num_cpu;
-    uint32_t features;
-    uint32_t status;
-    /* hardware state */
-    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
-    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
-    uint32_t isr[EXTIOI_IRQS / 32];
-    uint32_t enable[EXTIOI_IRQS / 32];
-    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
-    uint32_t coremap[EXTIOI_IRQS / 4];
-    uint32_t sw_pending[EXTIOI_IRQS / 32];
-    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
-    uint8_t  sw_coremap[EXTIOI_IRQS];
-    qemu_irq irq[EXTIOI_IRQS];
-    ExtIOICore *cpu;
-    MemoryRegion extioi_system_mem;
-    MemoryRegion virt_extend;
-};
 #endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
 #define  EXTIOI_ENABLE_CPU_ENCODE    (3)
 #define EXTIOI_VIRT_COREMAP_START    (0x40)
 #define EXTIOI_VIRT_COREMAP_END      (0x240)
+
+typedef struct ExtIOICore {
+    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
+    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
+    qemu_irq parent_irq[LS3A_INTC_IP];
+} ExtIOICore;
+
+struct LoongArchExtIOI {
+    SysBusDevice parent_obj;
+    uint32_t num_cpu;
+    uint32_t features;
+    uint32_t status;
+    /* hardware state */
+    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
+    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
+    uint32_t isr[EXTIOI_IRQS / 32];
+    uint32_t enable[EXTIOI_IRQS / 32];
+    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
+    uint32_t coremap[EXTIOI_IRQS / 4];
+    uint32_t sw_pending[EXTIOI_IRQS / 32];
+    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
+    uint8_t  sw_coremap[EXTIOI_IRQS];
+    qemu_irq irq[EXTIOI_IRQS];
+    ExtIOICore *cpu;
+    MemoryRegion extioi_system_mem;
+    MemoryRegion virt_extend;
+};
 #endif /* LOONGARCH_EXTIOI_H */
-- 
2.43.5

Rename structure LoongArchExtIOI with LoongArchExtIOICommonState,
since it is defined in file loongarch_extioi_common.h

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 1 +
 include/hw/intc/loongarch_extioi_common.h | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_extioi_common.h"
 
+#define LoongArchExtIOI LoongArchExtIOICommonState
 #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
 #endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore {
     qemu_irq parent_irq[LS3A_INTC_IP];
 } ExtIOICore;
 
-struct LoongArchExtIOI {
+struct LoongArchExtIOICommonState {
     SysBusDevice parent_obj;
     uint32_t num_cpu;
     uint32_t features;
-- 
2.43.5

With some structure such as vmstate and property, rename LoongArchExtIOI
with LoongArchExtIOICommonState, these common structure will be moved
to common file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++---------------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
     return 0;
 }
 
+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
+{
+    return vmstate_extioi_post_load(opaque, version_id);
+}
+
 static const VMStateDescription vmstate_extioi_core = {
     .name = "extioi-core",
     .version_id = 1,
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = {
 };
 
 static const VMStateDescription vmstate_loongarch_extioi = {
-    .name = TYPE_LOONGARCH_EXTIOI,
+    .name = "loongarch.extioi",
     .version_id = 3,
     .minimum_version_id = 3,
-    .post_load = vmstate_extioi_post_load,
+    .post_load = loongarch_extioi_common_post_load,
     .fields = (const VMStateField[]) {
-        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
-        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
+        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS_GROUP_COUNT),
+        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
                              EXTIOI_IRQS_NODETYPE_COUNT / 2),
-        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
-        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
-        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
-        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
-
-        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
-                         vmstate_extioi_core, ExtIOICore),
-        VMSTATE_UINT32(features, LoongArchExtIOI),
-        VMSTATE_UINT32(status, LoongArchExtIOI),
+        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 32),
+        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 32),
+        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS_IPMAP_SIZE / 4),
+        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 4),
+        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
+                             num_cpu, vmstate_extioi_core, ExtIOICore),
+        VMSTATE_UINT32(features, LoongArchExtIOICommonState),
+        VMSTATE_UINT32(status, LoongArchExtIOICommonState),
         VMSTATE_END_OF_LIST()
     }
 };
 
 static Property extioi_properties[] = {
-    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
-    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
-                    EXTIOI_HAS_VIRT_EXTENSION, 0),
+    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
+    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
+                    features, EXTIOI_HAS_VIRT_EXTENSION, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
 
-- 
2.43.5

The following changes since commit fd87be1dada5672f877e03c2ca8504458292c479:

Merge tag 'accel-20240426' of https://github.com/philmd/qemu into staging (2024-04-26 15:28:13 -0700)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240429

for you to fetch changes up to 841ef2c9df5317e32de590424b0c5c36fbb4de78:

hw/loongarch: Add cells missing from rtc node (2024-04-29 10:25:56 +0800)

----------------------------------------------------------------
Add boot LoongArch elf kernel with FDT

v2: Fix 'make check-tcg' failed.

----------------------------------------------------------------
Song Gao (17):
      hw/loongarch: Move boot functions to boot.c
      hw/loongarch: Add load initrd
      hw/loongarch: Add slave cpu boot_code
      hw/loongarch: Add init_cmdline
      hw/loongarch: Init efi_system_table
      hw/loongarch: Init efi_boot_memmap table
      hw/loongarch: Init efi_initrd table
      hw/loongarch: Init efi_fdt table
      hw/loongarch: Fix fdt memory node wrong 'reg'
      hw/loongarch: fdt adds cpu interrupt controller node
      hw/loongarch: fdt adds Extend I/O Interrupt Controller
      hw/loongarch: fdt adds pch_pic Controller
      hw/loongarch: fdt adds pch_msi Controller
      hw/loongarch: fdt adds pcie irq_map node
      hw/loongarch: fdt remove unused irqchip node
      hw/loongarch: Add cells missing from uart node
      hw/loongarch: Add cells missing from rtc node

hw/loongarch/boot.c                | 336 ++++++++++++++++++++++++++++++++++
 hw/loongarch/meson.build           |   1 +
 hw/loongarch/virt.c                | 365 +++++++++++++++++++++----------------
 include/hw/intc/loongarch_extioi.h |   1 +
 include/hw/loongarch/boot.h        | 109 +++++++++++
 include/hw/loongarch/virt.h        |  16 ++
 include/hw/pci-host/ls7a.h         |   2 +
 target/loongarch/cpu.h             |   2 +
 8 files changed, 670 insertions(+), 162 deletions(-)
 create mode 100644 hw/loongarch/boot.c
 create mode 100644 include/hw/loongarch/boot.h

Move some boot functions to boot.c and struct
loongarch_boot_info into struct LoongArchMachineState.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240426091551.2397867-2-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 128 ++++++++++++++++++++++++++++++++++++
 hw/loongarch/meson.build    |   1 +
 hw/loongarch/virt.c         | 121 +++-------------------------------
 include/hw/loongarch/boot.h |  21 ++++++
 include/hw/loongarch/virt.h |   2 +
 5 files changed, 160 insertions(+), 113 deletions(-)
 create mode 100644 hw/loongarch/boot.c
 create mode 100644 include/hw/loongarch/boot.h

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch boot helper functions.
+ *
+ * Copyright (c) 2023 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "target/loongarch/cpu.h"
+#include "hw/loongarch/virt.h"
+#include "hw/loader.h"
+#include "elf.h"
+#include "qemu/error-report.h"
+#include "sysemu/reset.h"
+#include "sysemu/qtest.h"
+
+static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
+{
+    return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
+}
+
+static int64_t load_kernel_info(struct loongarch_boot_info *info)
+{
+    uint64_t kernel_entry, kernel_low, kernel_high;
+    ssize_t kernel_size;
+
+    kernel_size = load_elf(info->kernel_filename, NULL,
+                           cpu_loongarch_virt_to_phys, NULL,
+                           &kernel_entry, &kernel_low,
+                           &kernel_high, NULL, 0,
+                           EM_LOONGARCH, 1, 0);
+
+    if (kernel_size < 0) {
+        error_report("could not load kernel '%s': %s",
+                     info->kernel_filename,
+                     load_elf_strerror(kernel_size));
+        exit(1);
+    }
+    return kernel_entry;
+}
+
+static void reset_load_elf(void *opaque)
+{
+    LoongArchCPU *cpu = opaque;
+    CPULoongArchState *env = &cpu->env;
+
+    cpu_reset(CPU(cpu));
+    if (env->load_elf) {
+        cpu_set_pc(CPU(cpu), env->elf_address);
+    }
+}
+
+static void fw_cfg_add_kernel_info(struct loongarch_boot_info *info,
+                                   FWCfgState *fw_cfg)
+{
+    /*
+     * Expose the kernel, the command line, and the initrd in fw_cfg.
+     * We don't process them here at all, it's all left to the
+     * firmware.
+     */
+    load_image_to_fw_cfg(fw_cfg,
+                         FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
+                         info->kernel_filename,
+                         false);
+
+    if (info->initrd_filename) {
+        load_image_to_fw_cfg(fw_cfg,
+                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
+                             info->initrd_filename, false);
+    }
+
+    if (info->kernel_cmdline) {
+        fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
+                       strlen(info->kernel_cmdline) + 1);
+        fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
+                          info->kernel_cmdline);
+    }
+}
+
+static void loongarch_firmware_boot(LoongArchMachineState *lams,
+                                    struct loongarch_boot_info *info)
+{
+    fw_cfg_add_kernel_info(info, lams->fw_cfg);
+}
+
+static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+{
+    int64_t kernel_addr = 0;
+    LoongArchCPU *lacpu;
+    CPUState *cs;
+
+    if (info->kernel_filename) {
+        kernel_addr = load_kernel_info(info);
+    } else {
+        if(!qtest_enabled()) {
+            error_report("Need kernel filename\n");
+            exit(1);
+        }
+    }
+
+    CPU_FOREACH(cs) {
+        lacpu = LOONGARCH_CPU(cs);
+        lacpu->env.load_elf = true;
+        lacpu->env.elf_address = kernel_addr;
+    }
+}
+
+void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
+{
+    LoongArchMachineState *lams = LOONGARCH_MACHINE(ms);
+    int i;
+
+    /* register reset function */
+    for (i = 0; i < ms->smp.cpus; i++) {
+        qemu_register_reset(reset_load_elf, LOONGARCH_CPU(qemu_get_cpu(i)));
+    }
+
+    info->kernel_filename = ms->kernel_filename;
+    info->kernel_cmdline = ms->kernel_cmdline;
+    info->initrd_filename = ms->initrd_filename;
+
+    if (lams->bios_loaded) {
+        loongarch_firmware_boot(lams, info);
+    } else {
+        loongarch_direct_kernel_boot(info);
+    }
+}
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/meson.build
+++ b/hw/loongarch/meson.build
@@ -XXX,XX +XXX,XX @@
 loongarch_ss = ss.source_set()
 loongarch_ss.add(files(
     'fw_cfg.c',
+    'boot.c',
 ))
 loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: [files('virt.c'), fdt])
 loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/block/flash.h"
 #include "qemu/error-report.h"
 
-
-struct loaderparams {
-    uint64_t ram_size;
-    const char *kernel_filename;
-    const char *kernel_cmdline;
-    const char *initrd_filename;
-};
-
 static PFlashCFI01 *virt_flash_create1(LoongArchMachineState *lams,
                                        const char *name,
                                        const char *alias_prop_name)
@@ -XXX,XX +XXX,XX @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
     memmap_entries++;
 }
 
-static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
-{
-    return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
-}
-
-static int64_t load_kernel_info(const struct loaderparams *loaderparams)
-{
-    uint64_t kernel_entry, kernel_low, kernel_high;
-    ssize_t kernel_size;
-
-    kernel_size = load_elf(loaderparams->kernel_filename, NULL,
-                           cpu_loongarch_virt_to_phys, NULL,
-                           &kernel_entry, &kernel_low,
-                           &kernel_high, NULL, 0,
-                           EM_LOONGARCH, 1, 0);
-
-    if (kernel_size < 0) {
-        error_report("could not load kernel '%s': %s",
-                     loaderparams->kernel_filename,
-                     load_elf_strerror(kernel_size));
-        exit(1);
-    }
-    return kernel_entry;
-}
-
 static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState *lams)
 {
     DeviceState *dev;
@@ -XXX,XX +XXX,XX @@ static void loongarch_firmware_init(LoongArchMachineState *lams)
     }
 }
 
-static void reset_load_elf(void *opaque)
-{
-    LoongArchCPU *cpu = opaque;
-    CPULoongArchState *env = &cpu->env;
-
-    cpu_reset(CPU(cpu));
-    if (env->load_elf) {
-        cpu_set_pc(CPU(cpu), env->elf_address);
-    }
-}
-
-static void fw_cfg_add_kernel_info(const struct loaderparams *loaderparams,
-                                   FWCfgState *fw_cfg)
-{
-    /*
-     * Expose the kernel, the command line, and the initrd in fw_cfg.
-     * We don't process them here at all, it's all left to the
-     * firmware.
-     */
-    load_image_to_fw_cfg(fw_cfg,
-                         FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
-                         loaderparams->kernel_filename,
-                         false);
-
-    if (loaderparams->initrd_filename) {
-        load_image_to_fw_cfg(fw_cfg,
-                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
-                             loaderparams->initrd_filename, false);
-    }
-
-    if (loaderparams->kernel_cmdline) {
-        fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
-                       strlen(loaderparams->kernel_cmdline) + 1);
-        fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
-                          loaderparams->kernel_cmdline);
-    }
-}
-
-static void loongarch_firmware_boot(LoongArchMachineState *lams,
-                                    const struct loaderparams *loaderparams)
-{
-    fw_cfg_add_kernel_info(loaderparams, lams->fw_cfg);
-}
-
-static void loongarch_direct_kernel_boot(LoongArchMachineState *lams,
-                                         const struct loaderparams *loaderparams)
-{
-    MachineState *machine = MACHINE(lams);
-    int64_t kernel_addr = 0;
-    LoongArchCPU *lacpu;
-    int i;
-
-    kernel_addr = load_kernel_info(loaderparams);
-    if (!machine->firmware) {
-        for (i = 0; i < machine->smp.cpus; i++) {
-            lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
-            lacpu->env.load_elf = true;
-            lacpu->env.elf_address = kernel_addr;
-        }
-    }
-}
 
 static void loongarch_qemu_write(void *opaque, hwaddr addr,
                                  uint64_t val, unsigned size)
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     CPUState *cpu;
     char *ramName = NULL;
-    struct loaderparams loaderparams = { };
 
     if (!cpu_model) {
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
     fdt_add_fw_cfg_node(lams);
-    loaderparams.ram_size = ram_size;
-    loaderparams.kernel_filename = machine->kernel_filename;
-    loaderparams.kernel_cmdline = machine->kernel_cmdline;
-    loaderparams.initrd_filename = machine->initrd_filename;
-    /* load the kernel. */
-    if (loaderparams.kernel_filename) {
-        if (lams->bios_loaded) {
-            loongarch_firmware_boot(lams, &loaderparams);
-        } else {
-            loongarch_direct_kernel_boot(lams, &loaderparams);
-        }
-    }
     fdt_add_flash_node(lams);
-    /* register reset function */
-    for (i = 0; i < machine->smp.cpus; i++) {
-        lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
-        qemu_register_reset(reset_load_elf, lacpu);
-    }
+
     /* Initialize the IO interrupt subsystem */
     loongarch_irq_init(lams);
     fdt_add_irqchip_node(lams);
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
      */
     fdt_base = 1 * MiB;
     qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
-    rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, fdt_base,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, fdt_base, lams->fdt_size));
+
+    lams->bootinfo.ram_size = ram_size;
+    loongarch_load_kernel(machine, &lams->bootinfo);
 }
 
 bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Definitions for LoongArch boot.
+ *
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_BOOT_H
+#define HW_LOONGARCH_BOOT_H
+
+struct loongarch_boot_info {
+    uint64_t ram_size;
+    const char *kernel_filename;
+    const char *kernel_cmdline;
+    const char *initrd_filename;
+    uint64_t a0, a1, a2;
+};
+
+void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info);
+
+#endif /* HW_LOONGARCH_BOOT_H */
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@
 #include "qemu/queue.h"
 #include "hw/intc/loongarch_ipi.h"
 #include "hw/block/flash.h"
+#include "hw/loongarch/boot.h"
 
 #define LOONGARCH_MAX_CPUS      256
 
@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
     MemoryRegion system_iocsr;
     MemoryRegion iocsr_mem;
     AddressSpace as_iocsr;
+    struct loongarch_boot_info bootinfo;
 };
 
 #define TYPE_LOONGARCH_MACHINE  MACHINE_TYPE_NAME("virt")
-- 
2.25.1

we load initrd ramdisk after kernel_high address

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-3-gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 
 static int64_t load_kernel_info(struct loongarch_boot_info *info)
 {
-    uint64_t kernel_entry, kernel_low, kernel_high;
+    uint64_t kernel_entry, kernel_low, kernel_high, initrd_size;
+    ram_addr_t initrd_offset;
     ssize_t kernel_size;
 
     kernel_size = load_elf(info->kernel_filename, NULL,
@@ -XXX,XX +XXX,XX @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
                      load_elf_strerror(kernel_size));
         exit(1);
     }
+
+    if (info->initrd_filename) {
+        initrd_size = get_image_size(info->initrd_filename);
+        if (initrd_size > 0) {
+            initrd_offset = ROUND_UP(kernel_high + 4 * kernel_size, 64 * KiB);
+
+            if (initrd_offset + initrd_size > info->ram_size) {
+                error_report("memory too small for initial ram disk '%s'",
+                             info->initrd_filename);
+                exit(1);
+            }
+
+            initrd_size = load_image_targphys(info->initrd_filename, initrd_offset,
+                                              info->ram_size - initrd_offset);
+        }
+
+        if (initrd_size == (target_ulong)-1) {
+            error_report("could not load initial ram disk '%s'",
+                         info->initrd_filename);
+            exit(1);
+        }
+    } else {
+        initrd_size = 0;
+    }
+
     return kernel_entry;
 }
 
-- 
2.25.1

Load the slave CPU boot code at pflash0 and set
the slave CPU elf_address to VIRT_FLASH0_BASE.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-4-gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 62 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 61 insertions(+), 1 deletion(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/reset.h"
 #include "sysemu/qtest.h"
 
+static const unsigned int slave_boot_code[] = {
+                  /* Configure reset ebase.                    */
+    0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
+
+                  /* Disable interrupt.                        */
+    0x0380100c,   /* ori        $t0, $zero,0x4                 */
+    0x04000180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_CRMD */
+
+                  /* Clear mailbox.                            */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20  */
+    0x06481da0,   /* iocsrwr.d  $zero, $t1                     */
+
+                  /* Enable IPI interrupt.                     */
+    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
+    0x0400118c,   /* csrxchg    $t0, $t0, LOONGARCH_CSR_ECFG   */
+    0x02fffc0c,   /* addi.d     $t0, $r0,-1(0xfff)             */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038011ad,   /* ori        $t1, $t1, CORE_EN_OFF          */
+    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
+
+                  /* Wait for wakeup  <.L11>:                  */
+    0x06488000,   /* idle       0x0                            */
+    0x03400000,   /* andi       $zero, $zero, 0x0              */
+    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
+    0x43fff59f,   /* beqz       $t0, -12(0x7ffff4) # 48 <.L11> */
+
+                  /* Read and clear IPI interrupt.             */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038031ad,   /* ori        $t1, $t1, CORE_CLEAR_OFF       */
+    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
+
+                  /* Disable  IPI interrupt.                   */
+    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
+    0x04001180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_ECFG */
+
+                  /* Read mail buf and jump to specified entry */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
+    0x06480dac,   /* iocsrrd.d  $t0, $t1                       */
+    0x00150181,   /* move       $ra, $t0                       */
+    0x4c000020,   /* jirl       $zero, $ra,0                   */
+};
+
 static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 {
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
         }
     }
 
+    /* Load slave boot code at pflash0 . */
+    void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
+    memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
+    rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
+
     CPU_FOREACH(cs) {
         lacpu = LOONGARCH_CPU(cs);
         lacpu->env.load_elf = true;
-        lacpu->env.elf_address = kernel_addr;
+        if (cs == first_cpu) {
+            lacpu->env.elf_address = kernel_addr;
+        } else {
+            lacpu->env.elf_address = VIRT_FLASH0_BASE;
+        }
+        lacpu->env.boot_info = info;
     }
+
+    g_free(boot_code);
 }
 
 void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
-- 
2.25.1

Add init_cmline and set boot_info->a0, a1

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-5-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 30 ++++++++++++++++++++++++++++++
 include/hw/loongarch/virt.h |  2 ++
 target/loongarch/cpu.h      |  2 ++
 3 files changed, 34 insertions(+)

Add init_systab and set boot_info->a2

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-6-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 22 +++++++++++++++++
 include/hw/loongarch/boot.h | 48 +++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)

The efi_system_table adds a efi_boot_memmap configuration table.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-7-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 40 +++++++++++++++++++++++++++++++++++++
 hw/loongarch/virt.c         | 11 ++--------
 include/hw/loongarch/boot.h | 27 +++++++++++++++++++++++++
 include/hw/loongarch/virt.h | 10 ++++++++++
 4 files changed, 79 insertions(+), 9 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static const unsigned int slave_boot_code[] = {
     0x4c000020,   /* jirl       $zero, $ra,0                   */
 };
 
+static inline void *guidcpy(void *dst, const void *src)
+{
+    return memcpy(dst, src, sizeof(efi_guid_t));
+}
+
+static void init_efi_boot_memmap(struct efi_system_table *systab,
+                                 void *p, void *start)
+{
+    unsigned i;
+    struct efi_boot_memmap *boot_memmap = p;
+    efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID;
+
+    /* efi_configuration_table 1 */
+    guidcpy(&systab->tables[0].guid, &tbl_guid);
+    systab->tables[0].table = (struct efi_configuration_table *)(p - start);
+    systab->nr_tables = 1;
+
+    boot_memmap->desc_size = sizeof(efi_memory_desc_t);
+    boot_memmap->desc_ver = 1;
+    boot_memmap->map_size = 0;
+
+    efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap);
+    for (i = 0; i < memmap_entries; i++) {
+        map = (void *)boot_memmap + sizeof(*map);
+        map[i].type = memmap_table[i].type;
+        map[i].phys_addr = ROUND_UP(memmap_table[i].address, 64 * KiB);
+        map[i].num_pages = ROUND_DOWN(memmap_table[i].address +
+                        memmap_table[i].length - map[i].phys_addr, 64 * KiB);
+        p += sizeof(efi_memory_desc_t);
+    }
+}
+
 static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
 {
+    void *bp_tables_start;
     struct efi_system_table *systab = p;
 
     info->a2 = p - start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
     p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB);
 
     systab->tables = p;
+    bp_tables_start = p;
+
+    init_efi_boot_memmap(systab, p, start);
+    p += ROUND_UP(sizeof(struct efi_boot_memmap) +
+                  sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
+
+    systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
 }
 
 static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_powerdown_req(Notifier *notifier, void *opaque)
     acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
 }
 
-struct memmap_entry {
-    uint64_t address;
-    uint64_t length;
-    uint32_t type;
-    uint32_t reserved;
-};
-
-static struct memmap_entry *memmap_table;
-static unsigned memmap_entries;
+struct memmap_entry *memmap_table;
+unsigned memmap_entries;
 
 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/boot.h
+++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
     uint8_t b[16];
 } efi_guid_t QEMU_ALIGNED(8);
 
+#define EFI_GUID(a, b, c, d...) (efi_guid_t){ {                                \
+        (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
+        (b) & 0xff, ((b) >> 8) & 0xff,                                         \
+        (c) & 0xff, ((c) >> 8) & 0xff, d } }
+
+#define LINUX_EFI_BOOT_MEMMAP_GUID \
+        EFI_GUID(0x800f683f, 0xd08b, 0x423a,  0xa2, 0x93, \
+                 0x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
+
 struct efi_config_table {
     efi_guid_t guid;
     uint64_t *ptr;
@@ -XXX,XX +XXX,XX @@ struct efi_system_table {
     struct efi_configuration_table *tables;
 };
 
+typedef struct {
+    uint32_t type;
+    uint32_t pad;
+    uint64_t phys_addr;
+    uint64_t virt_addr;
+    uint64_t num_pages;
+    uint64_t attribute;
+} efi_memory_desc_t;
+
+struct efi_boot_memmap {
+    uint64_t map_size;
+    uint64_t desc_size;
+    uint32_t desc_ver;
+    uint64_t map_key;
+    uint64_t buff_size;
+    efi_memory_desc_t map[32];
+};
+
 struct loongarch_boot_info {
     uint64_t ram_size;
     const char *kernel_filename;
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@
 
 #define COMMAND_LINE_SIZE       512
 
+extern struct memmap_entry *memmap_table;
+extern unsigned memmap_entries;
+
+struct memmap_entry {
+    uint64_t address;
+    uint64_t length;
+    uint32_t type;
+    uint32_t reserved;
+};
+
 struct LoongArchMachineState {
     /*< private >*/
     MachineState parent_obj;
-- 
2.25.1

The efi_system_table adds a efi_initrd configuration table.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-8-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 23 +++++++++++++++++++++--
 include/hw/loongarch/boot.h |  9 +++++++++
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/reset.h"
 #include "sysemu/qtest.h"
 
+ram_addr_t initrd_offset;
+uint64_t initrd_size;
+
 static const unsigned int slave_boot_code[] = {
                   /* Configure reset ebase.                    */
     0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
@@ -XXX,XX +XXX,XX @@ static void init_efi_boot_memmap(struct efi_system_table *systab,
     }
 }
 
+static void init_efi_initrd_table(struct efi_system_table *systab,
+                                  void *p, void *start)
+{
+    efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID;
+    struct efi_initrd *initrd_table  = p;
+
+    /* efi_configuration_table 2 */
+    guidcpy(&systab->tables[1].guid, &tbl_guid);
+    systab->tables[1].table = (struct efi_configuration_table *)(p - start);
+    systab->nr_tables = 2;
+
+    initrd_table->base = initrd_offset;
+    initrd_table->size = initrd_size;
+}
+
 static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
 {
     void *bp_tables_start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
     init_efi_boot_memmap(systab, p, start);
     p += ROUND_UP(sizeof(struct efi_boot_memmap) +
                   sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
+    init_efi_initrd_table(systab, p, start);
+    p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
 
     systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
 }
@@ -XXX,XX +XXX,XX @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 
 static int64_t load_kernel_info(struct loongarch_boot_info *info)
 {
-    uint64_t kernel_entry, kernel_low, kernel_high, initrd_size;
-    ram_addr_t initrd_offset;
+    uint64_t kernel_entry, kernel_low, kernel_high;
     ssize_t kernel_size;
 
     kernel_size = load_elf(info->kernel_filename, NULL,
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/boot.h
+++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
         EFI_GUID(0x800f683f, 0xd08b, 0x423a,  0xa2, 0x93, \
                  0x96, 0x5c, 0x3c, 0x6f, 0xe2, 0xb4)
 
+#define LINUX_EFI_INITRD_MEDIA_GUID \
+        EFI_GUID(0x5568e427, 0x68fc, 0x4f3d,  0xac, 0x74, \
+                 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
+
 struct efi_config_table {
     efi_guid_t guid;
     uint64_t *ptr;
@@ -XXX,XX +XXX,XX @@ struct efi_boot_memmap {
     efi_memory_desc_t map[32];
 };
 
+struct efi_initrd {
+    uint64_t base;
+    uint64_t size;
+};
+
 struct loongarch_boot_info {
     uint64_t ram_size;
     const char *kernel_filename;
-- 
2.25.1

The efi_system_table adds a efi_fdt configuration table.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-9-gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 11 +++++++++++
 hw/loongarch/virt.c         |  6 ++----
 include/hw/loongarch/boot.h |  4 ++++
 include/hw/loongarch/virt.h |  2 ++
 4 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static void init_efi_initrd_table(struct efi_system_table *systab,
     initrd_table->size = initrd_size;
 }
 
+static void init_efi_fdt_table(struct efi_system_table *systab)
+{
+    efi_guid_t tbl_guid = DEVICE_TREE_GUID;
+
+    /* efi_configuration_table 3 */
+    guidcpy(&systab->tables[2].guid, &tbl_guid);
+    systab->tables[2].table = (void *)FDT_BASE;
+    systab->nr_tables = 3;
+}
+
 static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
 {
     void *bp_tables_start;
@@ -XXX,XX +XXX,XX @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
                   sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
     init_efi_initrd_table(systab, p, start);
     p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
+    init_efi_fdt_table(systab);
 
     systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
 }
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
     int nb_numa_nodes = machine->numa_state->num_nodes;
     NodeInfo *numa_info = machine->numa_state->nodes;
     int i;
-    hwaddr fdt_base;
     const CPUArchIdList *possible_cpus;
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     CPUState *cpu;
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
      * Put the FDT into the memory map as a ROM image: this will ensure
      * the FDT is copied again upon reset, even if addr points into RAM.
      */
-    fdt_base = 1 * MiB;
     qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, fdt_base,
+    rom_add_blob_fixed_as("fdt", machine->fdt, lams->fdt_size, FDT_BASE,
                           &address_space_memory);
     qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, fdt_base, lams->fdt_size));
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lams->fdt_size));
 
     lams->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lams->bootinfo);
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/boot.h
+++ b/include/hw/loongarch/boot.h
@@ -XXX,XX +XXX,XX @@ typedef struct {
         EFI_GUID(0x5568e427, 0x68fc, 0x4f3d,  0xac, 0x74, \
                  0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
 
+#define DEVICE_TREE_GUID \
+        EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5,  0x83, 0x0b, \
+                 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0)
+
 struct efi_config_table {
     efi_guid_t guid;
     uint64_t *ptr;
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@
 
 #define COMMAND_LINE_SIZE       512
 
+#define FDT_BASE                0x100000
+
 extern struct memmap_entry *memmap_table;
 extern unsigned memmap_entries;
 
-- 
2.25.1

The right fdt memory node like [1], not [2]

[1]
        memory@0 {
                device_type = "memory";
                reg = <0x00 0x00 0x00 0x10000000>;
        };
  [2]
        memory@0 {
                device_type = "memory";
                reg = <0x02 0x00 0x02 0x10000000>;
        };

Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240426091551.2397867-10-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
     char *nodename = g_strdup_printf("/memory@%" PRIx64, base);
 
     qemu_fdt_add_subnode(ms->fdt, nodename);
-    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 2, base, 2, size);
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0, base, 0, size);
     qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory");
 
     if (ms->numa_state && ms->numa_state->num_nodes) {
-- 
2.25.1

fdt adds cpu interrupt controller node,
we use 'loongson,cpu-interrupt-controller'.

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c
https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-11-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_flash_map(LoongArchMachineState *lams,
     virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
 }
 
+static void fdt_add_cpuic_node(LoongArchMachineState *lams,
+                               uint32_t *cpuintc_phandle)
+{
+    MachineState *ms = MACHINE(lams);
+    char *nodename;
+
+    *cpuintc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+    nodename = g_strdup_printf("/cpuic");
+    qemu_fdt_add_subnode(ms->fdt, nodename);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle);
+    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+                            "loongson,cpu-interrupt-controller");
+    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
+    g_free(nodename);
+}
+
 static void fdt_add_flash_node(LoongArchMachineState *lams)
 {
     MachineState *ms = MACHINE(lams);
@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
+    uint32_t cpuintc_phandle;
 
     /*
      * The connection of interrupts:
@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
     memory_region_add_subregion(&lams->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lams, &cpuintc_phandle);
+
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
-- 
2.25.1

fdt adds Extend I/O Interrupt Controller,
we use 'loongson,ls2k2000-eiointc'.

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-12-gaosong@loongson.cn>
---
 hw/loongarch/virt.c                | 30 +++++++++++++++++++++++++++++-
 include/hw/intc/loongarch_extioi.h |  1 +
 2 files changed, 30 insertions(+), 1 deletion(-)

fdt adds pch pic controller, we use 'loongson,pch-pic-1.0'

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c
https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.yang@flygoat.com

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-13-gaosong@loongson.cn>
---
 hw/loongarch/virt.c        | 30 +++++++++++++++++++++++++++++-
 include/hw/pci-host/ls7a.h |  1 +
 2 files changed, 30 insertions(+), 1 deletion(-)

fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'.

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c
https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.yang@flygoat.com

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-14-gaosong@loongson.cn>
---
 hw/loongarch/virt.c        | 33 ++++++++++++++++++++++++++++++++-
 include/hw/pci-host/ls7a.h |  1 +
 2 files changed, 33 insertions(+), 1 deletion(-)

This patch adds pcie irq_map node for FDT.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-15-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 73 ++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 69 insertions(+), 4 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_fw_cfg_node(const LoongArchMachineState *lams)
     g_free(nodename);
 }
 
-static void fdt_add_pcie_node(const LoongArchMachineState *lams)
+static void fdt_add_pcie_irq_map_node(const LoongArchMachineState *lams,
+                                      char *nodename,
+                                      uint32_t *pch_pic_phandle)
+{
+    int pin, dev;
+    uint32_t irq_map_stride = 0;
+    uint32_t full_irq_map[GPEX_NUM_IRQS *GPEX_NUM_IRQS * 10] = {};
+    uint32_t *irq_map = full_irq_map;
+    const MachineState *ms = MACHINE(lams);
+
+    /* This code creates a standard swizzle of interrupts such that
+     * each device's first interrupt is based on it's PCI_SLOT number.
+     * (See pci_swizzle_map_irq_fn())
+     *
+     * We only need one entry per interrupt in the table (not one per
+     * possible slot) seeing the interrupt-map-mask will allow the table
+     * to wrap to any number of devices.
+     */
+
+    for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
+        int devfn = dev * 0x8;
+
+        for (pin = 0; pin  < GPEX_NUM_IRQS; pin++) {
+            int irq_nr = 16 + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
+            int i = 0;
+
+            /* Fill PCI address cells */
+            irq_map[i] = cpu_to_be32(devfn << 8);
+            i += 3;
+
+            /* Fill PCI Interrupt cells */
+            irq_map[i] = cpu_to_be32(pin + 1);
+            i += 1;
+
+            /* Fill interrupt controller phandle and cells */
+            irq_map[i++] = cpu_to_be32(*pch_pic_phandle);
+            irq_map[i++] = cpu_to_be32(irq_nr);
+
+            if (!irq_map_stride) {
+                irq_map_stride = i;
+            }
+            irq_map += irq_map_stride;
+        }
+    }
+
+
+    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map,
+                     GPEX_NUM_IRQS * GPEX_NUM_IRQS *
+                     irq_map_stride * sizeof(uint32_t));
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask",
+                     0x1800, 0, 0, 0x7);
+}
+
+static void fdt_add_pcie_node(const LoongArchMachineState *lams,
+                              uint32_t *pch_pic_phandle,
+                              uint32_t *pch_msi_phandle)
 {
     char *nodename;
     hwaddr base_mmio = VIRT_PCI_MEM_BASE;
@@ -XXX,XX +XXX,XX @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
                                  2, base_pio, 2, size_pio,
                                  1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
                                  2, base_mmio, 2, size_mmio);
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map",
+                           0, *pch_msi_phandle, 0, 0x10000);
+
+    fdt_add_pcie_irq_map_node(lams, nodename, pch_pic_phandle);
+
     g_free(nodename);
 }
 
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
     return dev;
 }
 
-static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *lams)
+static void loongarch_devices_init(DeviceState *pch_pic,
+                                   LoongArchMachineState *lams,
+                                   uint32_t *pch_pic_phandle,
+                                   uint32_t *pch_msi_phandle)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lams);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
+    /* Add pcie node */
+    fdt_add_pcie_node(lams, pch_pic_phandle, pch_msi_phandle);
+
     serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
                    qdev_get_gpio_in(pch_pic,
                                     VIRT_UART_IRQ - VIRT_GSI_BASE),
@@ -XXX,XX +XXX,XX @@ static void loongarch_irq_init(LoongArchMachineState *lams)
     /* Add PCH MSI node */
     fdt_add_pch_msi_node(lams, &eiointc_phandle, &pch_msi_phandle);
 
-    loongarch_devices_init(pch_pic, lams);
+    loongarch_devices_init(pch_pic, lams, &pch_pic_phandle, &pch_msi_phandle);
 }
 
 static void loongarch_firmware_init(LoongArchMachineState *lams)
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
     lams->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lams->powerdown_notifier);
 
-    fdt_add_pcie_node(lams);
     /*
      * Since lowmem region starts from 0 and Linux kernel legacy start address
      * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-- 
2.25.1

This patch removes the unused fdt irqchip node.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-16-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 31 +------------------------------
 1 file changed, 1 insertion(+), 30 deletions(-)

uart node need interrupts and interrupt-parent cells.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-17-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

rtc node need interrupts and interrupt-parent cells.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-18-gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)