| 1 | Pretty small still, but there are two patches that ought | 1 | v2: Fix bsd-user signal.c Werror. |
|---|---|---|---|
| 2 | to get backported to stable, so no point in delaying. | 2 | I've conformed that it merges well with Warner's bsd-user pull. |
| 3 | |||
| 3 | 4 | ||
| 4 | r~ | 5 | r~ |
| 5 | 6 | ||
| 6 | The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307: | 7 | |
| 7 | 8 | The following changes since commit da1034094d375afe9e3d8ec8980550ea0f06f7e0: | |
| 8 | Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000) | 9 | |
| 10 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2023-10-03 07:43:44 -0400) | ||
| 9 | 11 | ||
| 10 | are available in the Git repository at: | 12 | are available in the Git repository at: |
| 11 | 13 | ||
| 12 | https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212 | 14 | https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20231004 |
| 13 | 15 | ||
| 14 | for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf: | 16 | for you to fetch changes up to 79de3960ae1e322835112755d99187ee9b63a270: |
| 15 | 17 | ||
| 16 | target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600) | 18 | tcg/loongarch64: Fix buid error (2023-10-04 11:03:54 -0700) |
| 17 | 19 | ||
| 18 | ---------------------------------------------------------------- | 20 | ---------------------------------------------------------------- |
| 19 | tcg: Reset free_temps before tcg_optimize | 21 | accel: Introduce AccelClass::cpu_common_[un]realize |
| 20 | tcg/riscv: Fix StoreStore barrier generation | 22 | accel: Target agnostic code movement |
| 21 | include/exec: Introduce fpst alias in helper-head.h.inc | 23 | accel/tcg: Cleanups to use CPUState instead of CPUArchState |
| 22 | target/sparc: Use memcpy() and remove memcpy32() | 24 | accel/tcg: Move CPUNegativeOffsetState into CPUState |
| 25 | tcg: Split out tcg init functions to tcg/startup.h | ||
| 26 | linux-user/hppa: Fix struct target_sigcontext layout | ||
| 27 | build: Remove --enable-gprof | ||
| 23 | 28 | ||
| 24 | ---------------------------------------------------------------- | 29 | ---------------------------------------------------------------- |
| 25 | Philippe Mathieu-Daudé (1): | 30 | Anton Johansson (9): |
| 26 | target/sparc: Use memcpy() and remove memcpy32() | 31 | target/arm: Replace TARGET_PAGE_ENTRY_EXTRA |
| 27 | 32 | accel/tcg: Modify tlb_*() to use CPUState | |
| 28 | Richard Henderson (2): | 33 | accel/tcg: Modify probe_access_internal() to use CPUState |
| 29 | tcg: Reset free_temps before tcg_optimize | 34 | accel/tcg: Modify memory access functions to use CPUState |
| 30 | include/exec: Introduce fpst alias in helper-head.h.inc | 35 | accel/tcg: Modify atomic_mmu_lookup() to use CPUState |
| 31 | 36 | accel/tcg: Use CPUState in atomicity helpers | |
| 32 | Roman Artemev (1): | 37 | accel/tcg: Remove env_tlb() |
| 33 | tcg/riscv: Fix StoreStore barrier generation | 38 | accel/tcg: Unify user and softmmu do_[st|ld]*_mmu() |
| 34 | 39 | accel/tcg: move ld/st helpers to ldst_common.c.inc | |
| 35 | include/tcg/tcg-temp-internal.h | 6 ++++++ | 40 | |
| 36 | accel/tcg/plugin-gen.c | 2 +- | 41 | Philippe Mathieu-Daudé (19): |
| 37 | target/sparc/win_helper.c | 26 ++++++++------------------ | 42 | accel: Rename accel_cpu_realizefn() -> accel_cpu_realize() |
| 38 | tcg/tcg.c | 5 ++++- | 43 | accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize() |
| 39 | include/exec/helper-head.h.inc | 3 +++ | 44 | accel: Rename accel_cpu_realize() -> accel_cpu_common_realize() |
| 40 | tcg/riscv/tcg-target.c.inc | 2 +- | 45 | accel: Introduce accel_cpu_common_unrealize() stub |
| 41 | 6 files changed, 23 insertions(+), 21 deletions(-) | 46 | accel: Declare AccelClass::cpu_common_[un]realize() handlers |
| 42 | 47 | accel/tcg: Have tcg_exec_realizefn() return a boolean | |
| 48 | accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG | ||
| 49 | exec: Make EXCP_FOO definitions target agnostic | ||
| 50 | exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h' | ||
| 51 | accel/tcg: Restrict dump_exec_info() declaration | ||
| 52 | accel: Make accel-blocker.o target agnostic | ||
| 53 | accel: Rename accel-common.c -> accel-target.c | ||
| 54 | exec: Rename cpu.c -> cpu-target.c | ||
| 55 | exec: Rename target specific page-vary.c -> page-vary-target.c | ||
| 56 | accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h' | ||
| 57 | accel/tcg: Make monitor.c a target-agnostic unit | ||
| 58 | accel/tcg: Make icount.o a target agnostic unit | ||
| 59 | accel/tcg: Make cpu-exec-common.c a target agnostic unit | ||
| 60 | tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed) | ||
| 61 | |||
| 62 | Richard Henderson (18): | ||
| 63 | accel/tcg: Move CPUTLB definitions from cpu-defs.h | ||
| 64 | qom: Propagate alignment through type system | ||
| 65 | target/arm: Remove size and alignment for cpu subclasses | ||
| 66 | target/*: Add instance_align to all cpu base classes | ||
| 67 | accel/tcg: Validate placement of CPUNegativeOffsetState | ||
| 68 | accel/tcg: Move CPUNegativeOffsetState into CPUState | ||
| 69 | accel/tcg: Remove CPUState.icount_decr_ptr | ||
| 70 | accel/tcg: Move can_do_io to CPUNegativeOffsetState | ||
| 71 | accel/tcg: Remove cpu_neg() | ||
| 72 | tcg: Rename cpu_env to tcg_env | ||
| 73 | accel/tcg: Replace CPUState.env_ptr with cpu_env() | ||
| 74 | accel/tcg: Remove cpu_set_cpustate_pointers | ||
| 75 | accel/tcg: Remove env_neg() | ||
| 76 | tcg: Remove TCGContext.tlb_fast_offset | ||
| 77 | tcg: Remove argument to tcg_prologue_init | ||
| 78 | tcg: Split out tcg init functions to tcg/startup.h | ||
| 79 | linux-user/hppa: Fix struct target_sigcontext layout | ||
| 80 | build: Remove --enable-gprof | ||
| 81 | |||
| 82 | gaosong (1): | ||
| 83 | tcg/loongarch64: Fix buid error | ||
| 84 | |||
| 85 | MAINTAINERS | 7 +- | ||
| 86 | docs/about/deprecated.rst | 14 - | ||
| 87 | meson.build | 18 +- | ||
| 88 | accel/tcg/atomic_template.h | 20 +- | ||
| 89 | accel/tcg/internal-common.h | 28 + | ||
| 90 | accel/tcg/{internal.h => internal-target.h} | 21 +- | ||
| 91 | bsd-user/bsd-proc.h | 3 - | ||
| 92 | include/exec/cpu-all.h | 67 +- | ||
| 93 | include/exec/cpu-common.h | 39 + | ||
| 94 | include/exec/cpu-defs.h | 138 --- | ||
| 95 | include/exec/cpu_ldst.h | 8 +- | ||
| 96 | include/exec/exec-all.h | 32 +- | ||
| 97 | include/hw/core/accel-cpu.h | 2 +- | ||
| 98 | include/hw/core/cpu.h | 171 ++- | ||
| 99 | include/qemu/accel.h | 12 +- | ||
| 100 | include/tcg/startup.h | 58 + | ||
| 101 | include/tcg/tcg.h | 6 +- | ||
| 102 | target/alpha/cpu.h | 1 - | ||
| 103 | target/arm/common-semi-target.h | 2 +- | ||
| 104 | target/arm/cpu-param.h | 12 - | ||
| 105 | target/arm/cpu.h | 1 - | ||
| 106 | target/arm/tcg/translate-a32.h | 2 +- | ||
| 107 | target/arm/tcg/translate-a64.h | 4 +- | ||
| 108 | target/arm/tcg/translate.h | 16 +- | ||
| 109 | target/avr/cpu.h | 1 - | ||
| 110 | target/cris/cpu.h | 1 - | ||
| 111 | target/hexagon/cpu.h | 2 +- | ||
| 112 | target/hexagon/gen_tcg.h | 120 +- | ||
| 113 | target/hexagon/gen_tcg_hvx.h | 20 +- | ||
| 114 | target/hexagon/macros.h | 8 +- | ||
| 115 | target/hppa/cpu.h | 1 - | ||
| 116 | target/i386/cpu.h | 1 - | ||
| 117 | target/loongarch/cpu.h | 1 - | ||
| 118 | target/m68k/cpu.h | 1 - | ||
| 119 | target/microblaze/cpu.h | 6 +- | ||
| 120 | target/mips/cpu.h | 4 +- | ||
| 121 | target/mips/tcg/translate.h | 6 +- | ||
| 122 | target/nios2/cpu.h | 1 - | ||
| 123 | target/openrisc/cpu.h | 1 - | ||
| 124 | target/ppc/cpu.h | 1 - | ||
| 125 | target/riscv/cpu.h | 2 +- | ||
| 126 | target/rx/cpu.h | 1 - | ||
| 127 | target/s390x/cpu.h | 1 - | ||
| 128 | target/sh4/cpu.h | 1 - | ||
| 129 | target/sparc/cpu.h | 1 - | ||
| 130 | target/tricore/cpu.h | 1 - | ||
| 131 | target/xtensa/cpu.h | 3 +- | ||
| 132 | accel/{accel-common.c => accel-target.c} | 27 +- | ||
| 133 | accel/dummy-cpus.c | 2 +- | ||
| 134 | accel/hvf/hvf-accel-ops.c | 2 +- | ||
| 135 | accel/kvm/kvm-accel-ops.c | 2 +- | ||
| 136 | accel/tcg/cpu-exec-common.c | 5 +- | ||
| 137 | accel/tcg/cpu-exec.c | 31 +- | ||
| 138 | accel/tcg/cputlb.c | 787 +++++------- | ||
| 139 | softmmu/icount.c => accel/tcg/icount-common.c | 7 +- | ||
| 140 | accel/tcg/monitor.c | 2 +- | ||
| 141 | accel/tcg/plugin-gen.c | 10 +- | ||
| 142 | accel/tcg/tb-maint.c | 3 +- | ||
| 143 | accel/tcg/tcg-accel-ops-icount.c | 8 +- | ||
| 144 | accel/tcg/tcg-accel-ops-mttcg.c | 4 +- | ||
| 145 | accel/tcg/tcg-accel-ops-rr.c | 6 +- | ||
| 146 | accel/tcg/tcg-accel-ops.c | 2 +- | ||
| 147 | accel/tcg/tcg-all.c | 8 +- | ||
| 148 | accel/tcg/translate-all.c | 15 +- | ||
| 149 | accel/tcg/translator.c | 24 +- | ||
| 150 | accel/tcg/user-exec.c | 279 +---- | ||
| 151 | bsd-user/main.c | 6 +- | ||
| 152 | bsd-user/signal.c | 14 +- | ||
| 153 | cpus-common.c => cpu-common.c | 0 | ||
| 154 | cpu.c => cpu-target.c | 13 +- | ||
| 155 | gdbstub/gdbstub.c | 4 +- | ||
| 156 | gdbstub/user-target.c | 2 +- | ||
| 157 | hw/core/cpu-common.c | 6 +- | ||
| 158 | hw/i386/kvm/clock.c | 2 +- | ||
| 159 | hw/intc/mips_gic.c | 2 +- | ||
| 160 | hw/intc/riscv_aclint.c | 12 +- | ||
| 161 | hw/intc/riscv_imsic.c | 2 +- | ||
| 162 | hw/ppc/e500.c | 4 +- | ||
| 163 | hw/ppc/spapr.c | 2 +- | ||
| 164 | linux-user/elfload.c | 4 +- | ||
| 165 | linux-user/exit.c | 6 - | ||
| 166 | linux-user/hppa/signal.c | 2 +- | ||
| 167 | linux-user/i386/cpu_loop.c | 2 +- | ||
| 168 | linux-user/main.c | 8 +- | ||
| 169 | linux-user/signal.c | 20 +- | ||
| 170 | linux-user/syscall.c | 2 +- | ||
| 171 | monitor/hmp-cmds-target.c | 2 +- | ||
| 172 | page-vary.c => page-vary-target.c | 0 | ||
| 173 | qom/object.c | 14 + | ||
| 174 | semihosting/arm-compat-semi.c | 6 +- | ||
| 175 | semihosting/syscalls.c | 28 +- | ||
| 176 | softmmu/watchpoint.c | 2 +- | ||
| 177 | target/alpha/cpu.c | 3 +- | ||
| 178 | target/alpha/translate.c | 146 +-- | ||
| 179 | target/arm/cpu.c | 12 +- | ||
| 180 | target/arm/cpu64.c | 4 - | ||
| 181 | target/arm/helper.c | 2 +- | ||
| 182 | target/arm/ptw.c | 4 +- | ||
| 183 | target/arm/tcg/mte_helper.c | 2 +- | ||
| 184 | target/arm/tcg/sve_helper.c | 2 +- | ||
| 185 | target/arm/tcg/tlb_helper.c | 4 +- | ||
| 186 | target/arm/tcg/translate-a64.c | 384 +++--- | ||
| 187 | target/arm/tcg/translate-m-nocp.c | 24 +- | ||
| 188 | target/arm/tcg/translate-mve.c | 52 +- | ||
| 189 | target/arm/tcg/translate-neon.c | 78 +- | ||
| 190 | target/arm/tcg/translate-sme.c | 8 +- | ||
| 191 | target/arm/tcg/translate-sve.c | 172 +-- | ||
| 192 | target/arm/tcg/translate-vfp.c | 56 +- | ||
| 193 | target/arm/tcg/translate.c | 234 ++-- | ||
| 194 | target/avr/cpu.c | 3 +- | ||
| 195 | target/avr/translate.c | 66 +- | ||
| 196 | target/cris/cpu.c | 3 +- | ||
| 197 | target/cris/translate.c | 72 +- | ||
| 198 | target/hexagon/cpu.c | 4 +- | ||
| 199 | target/hexagon/genptr.c | 36 +- | ||
| 200 | target/hexagon/idef-parser/parser-helpers.c | 2 +- | ||
| 201 | target/hexagon/translate.c | 52 +- | ||
| 202 | target/hppa/cpu.c | 2 +- | ||
| 203 | target/hppa/mem_helper.c | 2 +- | ||
| 204 | target/hppa/translate.c | 161 ++- | ||
| 205 | target/i386/cpu.c | 2 +- | ||
| 206 | target/i386/hvf/hvf-cpu.c | 2 +- | ||
| 207 | target/i386/kvm/kvm-cpu.c | 4 +- | ||
| 208 | target/i386/nvmm/nvmm-all.c | 14 +- | ||
| 209 | target/i386/tcg/sysemu/excp_helper.c | 2 +- | ||
| 210 | target/i386/tcg/tcg-cpu.c | 4 +- | ||
| 211 | target/i386/tcg/translate.c | 584 ++++----- | ||
| 212 | target/i386/whpx/whpx-all.c | 26 +- | ||
| 213 | target/loongarch/cpu.c | 9 +- | ||
| 214 | target/loongarch/translate.c | 22 +- | ||
| 215 | target/m68k/cpu.c | 9 +- | ||
| 216 | target/m68k/translate.c | 306 ++--- | ||
| 217 | target/microblaze/cpu.c | 2 +- | ||
| 218 | target/microblaze/translate.c | 52 +- | ||
| 219 | target/mips/cpu.c | 2 +- | ||
| 220 | target/mips/tcg/lcsr_translate.c | 6 +- | ||
| 221 | target/mips/tcg/msa_translate.c | 34 +- | ||
| 222 | target/mips/tcg/mxu_translate.c | 4 +- | ||
| 223 | target/mips/tcg/sysemu/mips-semi.c | 4 +- | ||
| 224 | target/mips/tcg/translate.c | 1288 ++++++++++---------- | ||
| 225 | target/mips/tcg/vr54xx_translate.c | 2 +- | ||
| 226 | target/nios2/cpu.c | 5 +- | ||
| 227 | target/nios2/translate.c | 52 +- | ||
| 228 | target/openrisc/cpu.c | 7 +- | ||
| 229 | target/openrisc/translate.c | 86 +- | ||
| 230 | target/ppc/cpu_init.c | 1 - | ||
| 231 | target/ppc/excp_helper.c | 10 +- | ||
| 232 | target/ppc/translate.c | 366 +++--- | ||
| 233 | target/riscv/cpu.c | 8 +- | ||
| 234 | target/riscv/translate.c | 56 +- | ||
| 235 | target/rx/cpu.c | 5 +- | ||
| 236 | target/rx/translate.c | 58 +- | ||
| 237 | target/s390x/cpu.c | 2 - | ||
| 238 | target/s390x/tcg/translate.c | 426 +++---- | ||
| 239 | target/sh4/cpu.c | 3 +- | ||
| 240 | target/sh4/op_helper.c | 2 +- | ||
| 241 | target/sh4/translate.c | 128 +- | ||
| 242 | target/sparc/cpu.c | 3 +- | ||
| 243 | target/sparc/translate.c | 332 ++--- | ||
| 244 | target/tricore/cpu.c | 10 +- | ||
| 245 | target/tricore/translate.c | 230 ++-- | ||
| 246 | target/xtensa/cpu.c | 2 +- | ||
| 247 | target/xtensa/translate.c | 192 +-- | ||
| 248 | tcg/tcg-op-gvec.c | 300 ++--- | ||
| 249 | tcg/tcg-op-ldst.c | 22 +- | ||
| 250 | tcg/tcg-op.c | 2 +- | ||
| 251 | tcg/tcg.c | 23 +- | ||
| 252 | accel/tcg/ldst_atomicity.c.inc | 88 +- | ||
| 253 | accel/tcg/ldst_common.c.inc | 225 ++++ | ||
| 254 | target/cris/translate_v10.c.inc | 28 +- | ||
| 255 | target/i386/tcg/decode-new.c.inc | 4 +- | ||
| 256 | target/i386/tcg/emit.c.inc | 262 ++-- | ||
| 257 | target/loongarch/insn_trans/trans_atomic.c.inc | 4 +- | ||
| 258 | target/loongarch/insn_trans/trans_branch.c.inc | 2 +- | ||
| 259 | target/loongarch/insn_trans/trans_extra.c.inc | 10 +- | ||
| 260 | target/loongarch/insn_trans/trans_farith.c.inc | 6 +- | ||
| 261 | target/loongarch/insn_trans/trans_fcmp.c.inc | 8 +- | ||
| 262 | target/loongarch/insn_trans/trans_fmemory.c.inc | 8 +- | ||
| 263 | target/loongarch/insn_trans/trans_fmov.c.inc | 20 +- | ||
| 264 | target/loongarch/insn_trans/trans_memory.c.inc | 8 +- | ||
| 265 | target/loongarch/insn_trans/trans_privileged.c.inc | 52 +- | ||
| 266 | target/loongarch/insn_trans/trans_vec.c.inc | 24 +- | ||
| 267 | target/mips/tcg/micromips_translate.c.inc | 12 +- | ||
| 268 | target/mips/tcg/nanomips_translate.c.inc | 200 +-- | ||
| 269 | target/ppc/power8-pmu-regs.c.inc | 8 +- | ||
| 270 | target/ppc/translate/branch-impl.c.inc | 2 +- | ||
| 271 | target/ppc/translate/dfp-impl.c.inc | 22 +- | ||
| 272 | target/ppc/translate/fixedpoint-impl.c.inc | 2 +- | ||
| 273 | target/ppc/translate/fp-impl.c.inc | 50 +- | ||
| 274 | target/ppc/translate/processor-ctrl-impl.c.inc | 8 +- | ||
| 275 | target/ppc/translate/spe-impl.c.inc | 30 +- | ||
| 276 | target/ppc/translate/storage-ctrl-impl.c.inc | 26 +- | ||
| 277 | target/ppc/translate/vmx-impl.c.inc | 34 +- | ||
| 278 | target/ppc/translate/vsx-impl.c.inc | 54 +- | ||
| 279 | target/riscv/insn_trans/trans_privileged.c.inc | 8 +- | ||
| 280 | target/riscv/insn_trans/trans_rvbf16.c.inc | 10 +- | ||
| 281 | target/riscv/insn_trans/trans_rvd.c.inc | 48 +- | ||
| 282 | target/riscv/insn_trans/trans_rvf.c.inc | 46 +- | ||
| 283 | target/riscv/insn_trans/trans_rvh.c.inc | 8 +- | ||
| 284 | target/riscv/insn_trans/trans_rvi.c.inc | 16 +- | ||
| 285 | target/riscv/insn_trans/trans_rvm.c.inc | 16 +- | ||
| 286 | target/riscv/insn_trans/trans_rvv.c.inc | 130 +- | ||
| 287 | target/riscv/insn_trans/trans_rvvk.c.inc | 30 +- | ||
| 288 | target/riscv/insn_trans/trans_rvzce.c.inc | 2 +- | ||
| 289 | target/riscv/insn_trans/trans_rvzfa.c.inc | 38 +- | ||
| 290 | target/riscv/insn_trans/trans_rvzfh.c.inc | 54 +- | ||
| 291 | target/riscv/insn_trans/trans_rvzicbo.c.inc | 8 +- | ||
| 292 | target/riscv/insn_trans/trans_svinval.c.inc | 6 +- | ||
| 293 | target/riscv/insn_trans/trans_xthead.c.inc | 2 +- | ||
| 294 | target/s390x/tcg/translate_vx.c.inc | 104 +- | ||
| 295 | tcg/aarch64/tcg-target.c.inc | 2 +- | ||
| 296 | tcg/arm/tcg-target.c.inc | 2 +- | ||
| 297 | tcg/loongarch64/tcg-target.c.inc | 68 +- | ||
| 298 | accel/meson.build | 4 +- | ||
| 299 | accel/tcg/meson.build | 8 +- | ||
| 300 | meson_options.txt | 3 - | ||
| 301 | scripts/meson-buildoptions.sh | 3 - | ||
| 302 | softmmu/meson.build | 4 - | ||
| 303 | target/hexagon/README | 10 +- | ||
| 304 | target/hexagon/gen_tcg_funcs.py | 16 +- | ||
| 305 | tests/avocado/boot_linux_console.py | 7 - | ||
| 306 | tests/avocado/machine_mips_malta.py | 6 - | ||
| 307 | tests/avocado/replay_kernel.py | 7 - | ||
| 308 | tests/avocado/tuxrun_baselines.py | 4 - | ||
| 309 | tests/qemu-iotests/meson.build | 2 +- | ||
| 310 | 225 files changed, 5101 insertions(+), 5323 deletions(-) | ||
| 311 | create mode 100644 accel/tcg/internal-common.h | ||
| 312 | rename accel/tcg/{internal.h => internal-target.h} (89%) | ||
| 313 | create mode 100644 include/tcg/startup.h | ||
| 314 | rename accel/{accel-common.c => accel-target.c} (86%) | ||
| 315 | rename softmmu/icount.c => accel/tcg/icount-common.c (99%) | ||
| 316 | rename cpus-common.c => cpu-common.c (100%) | ||
| 317 | rename cpu.c => cpu-target.c (97%) | ||
| 318 | rename page-vary.c => page-vary-target.c (100%) | ||
| 319 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | When allocating new temps during tcg_optmize, do not re-use | ||
| 2 | any EBB temps that were used within the TB. We do not have | ||
| 3 | any idea what span of the TB in which the temp was live. | ||
| 4 | 1 | ||
| 5 | Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize, | ||
| 6 | as well as replacing the equivalent in plugin_gen_inject and | ||
| 7 | tcg_func_start. | ||
| 8 | |||
| 9 | Cc: qemu-stable@nongnu.org | ||
| 10 | Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported") | ||
| 11 | Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711 | ||
| 12 | Reported-by: wannacu <wannacu2049@gmail.com> | ||
| 13 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 14 | Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> | ||
| 15 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 16 | --- | ||
| 17 | include/tcg/tcg-temp-internal.h | 6 ++++++ | ||
| 18 | accel/tcg/plugin-gen.c | 2 +- | ||
| 19 | tcg/tcg.c | 5 ++++- | ||
| 20 | 3 files changed, 11 insertions(+), 2 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h | ||
| 23 | index XXXXXXX..XXXXXXX 100644 | ||
| 24 | --- a/include/tcg/tcg-temp-internal.h | ||
| 25 | +++ b/include/tcg/tcg-temp-internal.h | ||
| 26 | @@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void); | ||
| 27 | TCGv_ptr tcg_temp_ebb_new_ptr(void); | ||
| 28 | TCGv_i128 tcg_temp_ebb_new_i128(void); | ||
| 29 | |||
| 30 | +/* Forget all freed EBB temps, so that new allocations produce new temps. */ | ||
| 31 | +static inline void tcg_temp_ebb_reset_freed(TCGContext *s) | ||
| 32 | +{ | ||
| 33 | + memset(s->free_temps, 0, sizeof(s->free_temps)); | ||
| 34 | +} | ||
| 35 | + | ||
| 36 | #endif /* TCG_TEMP_FREE_H */ | ||
| 37 | diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c | ||
| 38 | index XXXXXXX..XXXXXXX 100644 | ||
| 39 | --- a/accel/tcg/plugin-gen.c | ||
| 40 | +++ b/accel/tcg/plugin-gen.c | ||
| 41 | @@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) | ||
| 42 | * that might be live within the existing opcode stream. | ||
| 43 | * The simplest solution is to release them all and create new. | ||
| 44 | */ | ||
| 45 | - memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps)); | ||
| 46 | + tcg_temp_ebb_reset_freed(tcg_ctx); | ||
| 47 | |||
| 48 | QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) { | ||
| 49 | switch (op->opc) { | ||
| 50 | diff --git a/tcg/tcg.c b/tcg/tcg.c | ||
| 51 | index XXXXXXX..XXXXXXX 100644 | ||
| 52 | --- a/tcg/tcg.c | ||
| 53 | +++ b/tcg/tcg.c | ||
| 54 | @@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s) | ||
| 55 | s->nb_temps = s->nb_globals; | ||
| 56 | |||
| 57 | /* No temps have been previously allocated for size or locality. */ | ||
| 58 | - memset(s->free_temps, 0, sizeof(s->free_temps)); | ||
| 59 | + tcg_temp_ebb_reset_freed(s); | ||
| 60 | |||
| 61 | /* No constant temps have been previously allocated. */ | ||
| 62 | for (int i = 0; i < TCG_TYPE_COUNT; ++i) { | ||
| 63 | @@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start) | ||
| 64 | } | ||
| 65 | #endif | ||
| 66 | |||
| 67 | + /* Do not reuse any EBB that may be allocated within the TB. */ | ||
| 68 | + tcg_temp_ebb_reset_freed(s); | ||
| 69 | + | ||
| 70 | tcg_optimize(s); | ||
| 71 | |||
| 72 | reachable_code_pass(s); | ||
| 73 | -- | ||
| 74 | 2.43.0 | ||
| 75 | |||
| 76 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Roman Artemev <roman.artemev@syntacore.com> | ||
| 2 | 1 | ||
| 3 | On RISC-V to StoreStore barrier corresponds | ||
| 4 | `fence w, w` not `fence r, r` | ||
| 5 | |||
| 6 | Cc: qemu-stable@nongnu.org | ||
| 7 | Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions") | ||
| 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 9 | Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com> | ||
| 10 | Signed-off-by: Roman Artemev <roman.artemev@syntacore.com> | ||
| 11 | Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com> | ||
| 12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 13 | --- | ||
| 14 | tcg/riscv/tcg-target.c.inc | 2 +- | ||
| 15 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 16 | |||
| 17 | diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc | ||
| 18 | index XXXXXXX..XXXXXXX 100644 | ||
| 19 | --- a/tcg/riscv/tcg-target.c.inc | ||
| 20 | +++ b/tcg/riscv/tcg-target.c.inc | ||
| 21 | @@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) | ||
| 22 | insn |= 0x02100000; | ||
| 23 | } | ||
| 24 | if (a0 & TCG_MO_ST_ST) { | ||
| 25 | - insn |= 0x02200000; | ||
| 26 | + insn |= 0x01100000; | ||
| 27 | } | ||
| 28 | tcg_out32(s, insn); | ||
| 29 | } | ||
| 30 | -- | ||
| 31 | 2.43.0 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | This allows targets to declare that the helper requires a | ||
| 2 | float_status pointer and instead of a generic void pointer. | ||
| 3 | 1 | ||
| 4 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 5 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 6 | --- | ||
| 7 | include/exec/helper-head.h.inc | 3 +++ | ||
| 8 | 1 file changed, 3 insertions(+) | ||
| 9 | |||
| 10 | diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc | ||
| 11 | index XXXXXXX..XXXXXXX 100644 | ||
| 12 | --- a/include/exec/helper-head.h.inc | ||
| 13 | +++ b/include/exec/helper-head.h.inc | ||
| 14 | @@ -XXX,XX +XXX,XX @@ | ||
| 15 | #define dh_alias_ptr ptr | ||
| 16 | #define dh_alias_cptr ptr | ||
| 17 | #define dh_alias_env ptr | ||
| 18 | +#define dh_alias_fpst ptr | ||
| 19 | #define dh_alias_void void | ||
| 20 | #define dh_alias_noreturn noreturn | ||
| 21 | #define dh_alias(t) glue(dh_alias_, t) | ||
| 22 | @@ -XXX,XX +XXX,XX @@ | ||
| 23 | #define dh_ctype_ptr void * | ||
| 24 | #define dh_ctype_cptr const void * | ||
| 25 | #define dh_ctype_env CPUArchState * | ||
| 26 | +#define dh_ctype_fpst float_status * | ||
| 27 | #define dh_ctype_void void | ||
| 28 | #define dh_ctype_noreturn G_NORETURN void | ||
| 29 | #define dh_ctype(t) dh_ctype_##t | ||
| 30 | @@ -XXX,XX +XXX,XX @@ | ||
| 31 | #define dh_typecode_f64 dh_typecode_i64 | ||
| 32 | #define dh_typecode_cptr dh_typecode_ptr | ||
| 33 | #define dh_typecode_env dh_typecode_ptr | ||
| 34 | +#define dh_typecode_fpst dh_typecode_ptr | ||
| 35 | #define dh_typecode(t) dh_typecode_##t | ||
| 36 | |||
| 37 | #define dh_callflag_i32 0 | ||
| 38 | -- | ||
| 39 | 2.43.0 | ||
| 40 | |||
| 41 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 2 | 1 | ||
| 3 | Rather than manually copying each register, use | ||
| 4 | the libc memcpy(), which is well optimized nowadays. | ||
| 5 | |||
| 6 | Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> | ||
| 7 | Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> | ||
| 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 9 | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
| 10 | Message-ID: <20241205205418.67613-1-philmd@linaro.org> | ||
| 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 12 | --- | ||
| 13 | target/sparc/win_helper.c | 26 ++++++++------------------ | ||
| 14 | 1 file changed, 8 insertions(+), 18 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | ||
| 18 | --- a/target/sparc/win_helper.c | ||
| 19 | +++ b/target/sparc/win_helper.c | ||
| 20 | @@ -XXX,XX +XXX,XX @@ | ||
| 21 | #include "exec/helper-proto.h" | ||
| 22 | #include "trace.h" | ||
| 23 | |||
| 24 | -static inline void memcpy32(target_ulong *dst, const target_ulong *src) | ||
| 25 | -{ | ||
| 26 | - dst[0] = src[0]; | ||
| 27 | - dst[1] = src[1]; | ||
| 28 | - dst[2] = src[2]; | ||
| 29 | - dst[3] = src[3]; | ||
| 30 | - dst[4] = src[4]; | ||
| 31 | - dst[5] = src[5]; | ||
| 32 | - dst[6] = src[6]; | ||
| 33 | - dst[7] = src[7]; | ||
| 34 | -} | ||
| 35 | - | ||
| 36 | void cpu_set_cwp(CPUSPARCState *env, int new_cwp) | ||
| 37 | { | ||
| 38 | /* put the modified wrap registers at their proper location */ | ||
| 39 | if (env->cwp == env->nwindows - 1) { | ||
| 40 | - memcpy32(env->regbase, env->regbase + env->nwindows * 16); | ||
| 41 | + memcpy(env->regbase, env->regbase + env->nwindows * 16, | ||
| 42 | + sizeof(env->gregs)); | ||
| 43 | } | ||
| 44 | env->cwp = new_cwp; | ||
| 45 | |||
| 46 | /* put the wrap registers at their temporary location */ | ||
| 47 | if (new_cwp == env->nwindows - 1) { | ||
| 48 | - memcpy32(env->regbase + env->nwindows * 16, env->regbase); | ||
| 49 | + memcpy(env->regbase + env->nwindows * 16, env->regbase, | ||
| 50 | + sizeof(env->gregs)); | ||
| 51 | } | ||
| 52 | env->regwptr = env->regbase + (new_cwp * 16); | ||
| 53 | } | ||
| 54 | @@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl) | ||
| 55 | dst = get_gl_gregset(env, env->gl); | ||
| 56 | |||
| 57 | if (src != dst) { | ||
| 58 | - memcpy32(dst, env->gregs); | ||
| 59 | - memcpy32(env->gregs, src); | ||
| 60 | + memcpy(dst, env->gregs, sizeof(env->gregs)); | ||
| 61 | + memcpy(env->gregs, src, sizeof(env->gregs)); | ||
| 62 | } | ||
| 63 | } | ||
| 64 | |||
| 65 | @@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate) | ||
| 66 | /* Switch global register bank */ | ||
| 67 | src = get_gregset(env, new_pstate_regs); | ||
| 68 | dst = get_gregset(env, pstate_regs); | ||
| 69 | - memcpy32(dst, env->gregs); | ||
| 70 | - memcpy32(env->gregs, src); | ||
| 71 | + memcpy(dst, env->gregs, sizeof(env->gregs)); | ||
| 72 | + memcpy(env->gregs, src, sizeof(env->gregs)); | ||
| 73 | } else { | ||
| 74 | trace_win_helper_no_switch_pstate(new_pstate_regs); | ||
| 75 | } | ||
| 76 | -- | ||
| 77 | 2.43.0 | ||
| 78 | |||
| 79 | diff view generated by jsdifflib |